IZ0065 INTEGRAL | Alldatasheet

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Technical content

40 Channel Segment / Common Driver For Dot Matrix LCD

The IZ0065 is a LCD driver LSI which is fabricated by low power CMOS technology. Basically this LSI consists of 20 × 2 bit bi-directional shift register, 20 × 2 bit data latch and 20 × 2 bit driver. This LSI can be used a common or segment driver.

FEATURES

  • Display driving bias: static -1/5
  • Power supply voltage: +5V ± 10%, +3V ± 10%
  • Supply voltage for display: 0 ~ -5V(V EE
  • Interface FUNCTIONS
  • Dot matrix LCD driver with 40-channel output.
  • Selectable function to use common/segment drivers simultaneously.
  • Input / Output signal - output: 20 × 2 channel waveform for LCD driving - input: - Serial display data and control pulse from the controller LSI.
  • Bias voltage (V driver(cascade connection) controller Other IZ0065 IZ0066 KS0066 HD44780 SED1278
  • CMOS Process
  • Bare chip available ABSOLUTE MAXIMUM RATING (Ta = 25 o Characteristic Symbol Value Unit Operating Voltage V DD -0.3 ~ 7.0 V Driver Supply Voltage V LCD V DD - 13.5 ~ V DD + 0.3 V Input Voltage 1 V IN1 - 0.3 ~ V DD + 0.3 V Input Voltage 2 (V IN2 V DD + 0.3 ~ V EE - 0.3 V Operating Temperature T OPR -30 ~ +85 o C Storage Temperature T STG -55 ~ +125 o C Voltage greater than above may damage to then circuit. V EE : connect protection resistor (220Ω ± 5%) IZ0065

ELECTRICAL CHARACTERISTICS

=2.7~5.5V, V DD - V EE =3~13V, V SS =0V, Ta=-30 ~ +85 O C ) Characteristic Symbol Test Condition Min Max Unit Applicable pin Operating Current * I DD f CL2 =400KHz - 1 mA - Supply Current * I EE f CL1 =1KHz - 10 µA Input High Voltage V IH -0 . 7 V DD V DD V CL1, CL2, DL1, DL2, Input Low Voltage V IL 00 . 3 V DD DR1, DR2, Input Leakage Current I LKG V IN =0-V DD -5 5 µA SHL1, SHL2, M, FCS Output High Voltage V OH I OH = -0.4mA V DD 0.4 - DL1, DL2, DR1, DR2 Output Low Voltage V OL I OL = +0.4mA - 0.4 V Voltage Descending V I ON =0.1mA for one of SC1-SC40 -1 . 1 V ( V SC(SC -SC V I ON =0.5mA for each SC1-SC40 -1 . 5 Leakage Current I V V IH= V DD ~ V EE (Output SC1- SC40:floating) -10 10 µA V * V DD EE =4V AC characteristics DD =2.7~5.5V, V DD - V EE =3~13V, V SS =0V, Ta=-30 ~ +85 O C ) Characteristic Symbol Test Condition Min Max Unit Applicable pin Data Shift Frequency f CL - - 400 KHz CL2 Clock High Level Width t WCKH - 800 - CL1, CL2 Clock Low Level Width t WCKL - 800 - CL2 Clock Set-up Time t LS from CL2 to CL1 500 - t LS from CL1 to CL2 500 - ns CL1, CL2 Clock Rise/Fall Time t R F - - 200 Data Set-up Time t SU - 300 - DL1, DL2, DR1, DR2, Data Hold Time t DH - 300 - FLM Data Delay Time t D CL=15pF - 500 DL1, DL2, DR1, DR2 Input/Output current excluded; When input is at the intermediate level with CMOS, excessive current flows through the input circuit to the power supply,To avoid this, input level must be fixed at «H» or «L».

(20 bit) LCD DRIVER DATA LATCH (20 bit) BIDIRECTIONAL SHIFT REGISTER (20bit) BIDIRECTIONAL SHIFT REGISTER (20bit) SW CONTR LOGIC VDD Vss VEE CL2 CL1 M S C S C S C S C S C S C S C S C 9 V2 PART 2PART 1 S H L D R D L D R S H L D L F C S

PIN № INP/ OUTP NAME DESCRIPTION INTER- FACE VDD (24) Operating Voltage For logical circuit (+5 V ± 10% , +3 V ± 10% ) Power GND (34) Power 0 V (GND) Supply VEE (31) Negative Supply Voltage For LCD driver circuit (-5 V) V1 V2 (44,45) Input Bias Voltage Bias voltage level for LCD drive (select level) Power SC1÷÷÷÷SC20 Output LCD driver LCD driver output LCD V3 V4 (46,47) Input PART 1 Bias Voltage Bias voltage level for LCD drive (nonselect level) Power SHL1 Input Data interface Selection of the shift direction of Part 1 shift register V DD (41) SHL1 DL1 DR1 or VDD out in V SS VSS in out DL1,DR1 (35,36) Input/ Output Data input/output of Part 1 shift register Controller or IZ0065 SC21÷÷÷÷ SC40 Output LCD driver LCD driver output V5 V6 (48,49) Input PART 2 Bias Voltage Bias voltage level for LCD drive (nonselect level) Power SHL2 Input Data interface Selection of the shift direction of Part 2 shift register V DD (42) SHL2 DL2 DR2 or VDD out in V SS VSS in out DL2,DR2 (37,38) Input/ Output Data input/output of Part 2 shift register Controller or IZ0065 M Input Alternated (40) signal for LCD PART FCS CL1 CL2 M polarity Controller driver output 1 V SS latch clock shift clock M CL1,CL2 Input Data shift / latch clock V DD ( )( ) (32,33) 2V SS shift clock latch clock _ FCS (43) Input Mode selection V DD ( )( )M Shift/latch clock of display data and polarity of M signal are changed by FCS signal. By setting FCS to V DD level , user can select the function that use Part 1 as segment driver and Part 2 as common driver simultaneously. NC(39) No connection pin N.C

V (1/ 5 bias )LC D LC D Panel COM1~COM16SEG 1~ SEG 40 D OS C1 OS C2 VSS M CL K1 CL K2 VDD V5 DB ~ DB07 SC ~ SC14 0SC ~ SC14 0SC ~ SC14 0 DL2 DR1 DR2 CL 1 CL 2 M DL 2 DR1 DR2 CL 1 CL 2 M DL2 DR1 DR2 CL 1 CL 2 M VEE V1 V2 V3 V4 V5 V6VEE V1 V2 V3 V4 V5 V6VEE V1 V2 V3 V4 V5 V6 VDD VSS SHL2 SHL1 FC S DL1 VDD VSS SHL2 SHL1 FC S DL1 VDD VSS SHL2 SHL1 FCS DL1 BT1510BT1510 BT1510 VDD GND or other voltage To MP U IZ44780 IZ0065IZ0065IZ0065

Pad Pad Pad Pad X Y Pad Pad № Name XY № Name № Name XY 1 VEE -1384 -840 21 SC38 1381 -627.5 41 SC18 -185 1135 2 CL1 -1344 -1140 22 SC37 1381 -477.5 42 SC17 -335 1135 3 CL2 -1190 -1140 23 SC36 1381 -327.5 43 SC16 -485 1135 4 VSS -1002 -1140 24 SC35 1381 -177.5 44 SC15 -635 1135 5 DL1 -852 -1140 25 SC30 1381 -29.5 45 SC14 -785 1135 6 DR1 -702 -1140 26 SC31 1381 120.5 46 SC13 -1033 1135 7 DL2 -552 -1140 27 SC32 1381 270.5 47 SC12 -1183 1135 8 DR2 -402 -1140 28 SC33 1381 420.5 48 SC9 -1384 970 9 M -252 -1140 29 SC34 1381 570.5 49 SC10 -1384 820 10 SHL1 -102 -1140 30 SC29 1381 720.5 50 SC11 -1384 670

11 SHL2 48 -1140 31 SC28 1380 1135 51 SC8 -1384 520

12 FCS 198 -1140 32 SC27 1232 1135 52 SC7 -1384 370

13 V1 482 -1140 33 SC26 1082 1135 53 VDD -1384 220

14 V2 632 -1140 34 SC25 932 1135 54 SC6 -1384 70

15 V3 782 -1140 35 SC24 782 1135 55 SC5 -1384 -80

16 V4 932 -1140 36 SC23 632 1135 56 SC4 -1384 -230

17 V5 1082 -1140 37 SC22 482 1135 57 SC3 -1384 -380

18 V6 1232 -1140 38 SC21 332 1135 58 SC2 -1384 -528

19 SC40 1382 -1140 39 SC20 115 1135 59 SC1 -1384 -678

20 SC39 1381 -777.5 40 SC19 -35 1135 313247 46 45 333435363738394041424344 2 19183 4 5 17161514131211109876 IZ0065 (CHIP) X Y (0,0) Chip size:3240×2740 Pad size:100×100 Unit : µm