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Features
+ N-channel rab + Very low on-resistance Rosjon) + Superior thermal resistance + 100% avalanche tested 123) + Pb-free lead plating; ROHS compliant 4567) + Halogen-free according to IEC61249-2-21 8 Product validation Fully qualified according to JEDEC for Industrial Applications Table 1 Key Performance Parameters aT (8) @ RoHS IPTO44N15N5 PG-HSOF-8 o4anisns | Final Data Sheet 1 Rev. 2.0, 2021-09-10
OptiMOS™ 5 Power-Transistor, 150 V Cinfi neon IPTO44N15N5 Table of Contents Final Data Sheet 2 Rev. 2.0, 2021-09-10
OptiMOS™ 5 Power-Transistor, 150 V ¢ In ineon IPTO44N15N5
1 Maximum ratings
at Ta=25 °C, unless otherwise specified Table 2__ Maximum ratings Paramet Note / Test Condit ‘arameter lote est ondition [in. |Typ._[Max._|
174 Ves=10 V, Tc=25 °C
. a 123 Ves=10 V, Tc=100 °C 4) » Continuous drain current Io 115 A Ves=8 V, Tc=100 °C 19.4 Vos=10V, Ta=25°C,Rinsa=40°C/W?) Avalanche energy, single pulse® les |= —s|- —s[t89 mu Ip=100 A, Res=25 Q sci tt 300 Tc=25 °C Power dissipation me EF Beh | Ta=25 °C, Roua=40 °C/W? Operating and storage temperature ite [ss | is fo | La caatic category; DIN IEC 68-1:
2 Thermal characteristics
Table 3 Thermal characteristics Paramet Note / Test Condit arameter ote / Test Condition [min. |Typ. [Max._| Thermal resistance, junction - case Rec [- ss sf. fee - Thermal resistance, junction - ambient, ° 6 em cooling area Row Fao ow. Thermal resistance, junction - ambient, ey minimal footprint Fon Fee fo *) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2, De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm? (one layer, 70 ym thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information ” See Diagram 13 for more detailed information Final Data Sheet 3 Rev. 2.0, 2021-09-10
OptiMOS™ 5 Power-Transistor, 150 V nrineon IPTO44N15N5 3_ Electrical characteristics at Tj=25 °C, unless otherwise specified Table 4 Static characteristics Paramet symbol Note / Test Condit ‘arameter yymbol [Min. | lote est Condition Typ. [Max.__ Drain-source breakdown voltage [Veaoss 150 |- |- |v | Ves=0 V, lb=1 mA Gate threshold voltage [Vesm [30 [88 (46 [V_|Vos=Vos, =221 WA Zero gate voltage drain current lees | oo 1a ele vr yaad Mi patps sc Gate-source leakage current licss [= ——«|10—s[t00. [na Ves=20 V, Vos=0 V Drain-source on-state resistance roam 3 $0 Vee eae Transconductance a ge Se [Vos|22|/o|Ros(on)max, Ib=50 A Table 5 Dynamic characteristics Paramet yma [taut Note / Test Condit ‘arameter [Min. | ote est Condition Typ. Max. | Input capacitance” [Css _-[-__ [5000 _[@500 Ves=0 V, Vos=75 V, f=1 MHz Output capacitance” [Con [= [4200 [1600 Ves=0 V, Vos=75 V, f=1 MHz Reverse transfer capacitance” [Case 2951p Ves=0 V, Vos=75 V, f&1 MHz ee SO ot #1. ext 1. a ot 1. Table 6 Gate charge characteristics” Paramet symbst a a Note / Test Conditi ‘arameter [Min | lote / Test Condition Typ. [Max Gate to source charge [ase ——27_—s- [nC _| Voo=75 V, f0=50 A, Vos=0 to 10 V Gate charge at threshold [Quem > «(19.2 [+ nC _| Voo=75 V, o=50 A, Vos=0 to 10 V Gate to drain charge” [Qe (13.5 [20 nC Voo=75 V, lb=50 A, Vos=0 to 10 V Switching charge [Qu [-———*f22- [nC _ | Von 75 V, fo=50 A, Vos=0 to 10 V Gate charge total” la, se ——ife7 [84 |n_| Voo= 75 V, lo=50 A, Vos=0 to 10 V Gate plateau voltage [Vows (5.4 | |V | Voo= 75 V, fo=50 A, Vos=0 to 10 V ») Defined by design. Not subject to production test. 2) See "Gate charge waveforms” for parameter definition Final Data Sheet 4 Rev. 2.0, 2021-09-10
OptiMOS™ 5 Power-Transistor, 150 V ¢ In fi neon IPTO44N415N5 Table 7 Reverse diode arameter ymbo lote / Test Condition [min. [Typ [Max._| Diode continuous forward current lis estas Tc=25 °C Diode pulse current icone F696 fa |To=25 °c Diode forward voltage [Vo |- «0.82 |4.0 |V__ | Vas=0 V, k=50 A, Ti=25 °C Reverse recovery time” lt _'|- ——*(45.2 [904 Ins | Va=75 V, Ir=50 A, die/dt=100 A/us Reverse recovery charge") la —«- __—*|49.0 [98.0 [nc | Vp=75 V, Ir=50 A, dic/dt=100 A/us ‘) Defined by design. Not subject to production test. Final Data Sheet 5 Rev. 2.0, 2021-09-10
OptiMOS™ 5 Power-Transistor, 150 V Cin fi neon IPT044N15N5
4 Electrical characteristics diagrams
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OptiMOS™ 5 Power-Transistor, 150 V Cin fi neon IPTO44N45N5 EEE eee |” EAE | oe eo EEE EE EEE EEE Hae i eee 4 a Ee so EEE HAE Pee CoCo eee] sf || Yt ttt Hy BEE | EE - MOO ees |e Hee SS Ee a ES] — coe eee ae © oy EEE AEE | Eee 300 (46>=—se8 soo, (2 ee ee EEE eee J@ 0 ERY aoe) 4 ==
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» ZECEEE EEE EEE EEE EEE EE $5 v a 0 1 2 3 4 5 (0) 50 100 150 200 250 300 350 Vos [V] bo TAl 320 12 CTT EEEE-HE-EEEEEEEE-EEF ooo ETT HERE EH CTT PA OEE asc EEE) COO HEE 240 f A | | CCCCCCCECEE EEE EEE CHEER SSE wee EEECECCECECEETCETECTTT) | EERE EERE ERR ES= COCOA] Je EEE EERE REESE a z HHP HEN TEE CUT
120 Hy & A
TEETH rec eee | GHEE 40 / A A | TECCHCTEECTECrE pe |” EEEEREEEEE EERE o LOTT TTT] 9) GEE EEE EEE er eee 0 1 2 3 4 5 6 7 0 5 10 15 20 Ves [V] Ves [V] Final Data Sheet 7 Rev. 2.0, 2021-09-10
— eon infin TT] Itage [TTT [Ty ‘sv ToS Sees istor, te t TT aa TT TTT | ist . gat an [TI TTI Cr TT ns : Typ. rH Cro He-KH HEE -Tral m 10: CO Co HEE Cc Co an er: jiagra TT HALL ro He = EH TTT Ll ows ™ 5 P 8 SRisig RESCH HH Lo CI a <e FSH Co co iMOS ce ee tiM N5 istan mM HH SO a ERSTE SS SEN Op’ N451 n resi LT cl C Hea HSH [29 044 <0 HELE HHH He HEPA max aa IPT our HHH CH 40 HEE HEH HHS Na HEE Col + YA ized dra EEE EH HAH HEH HAH HEHE HEN lize I on CI A] CH on ro CH cI Cr rH C C al E-HEE anne a ERENT He aa : Norm: oa co Ce co an CO CH tt on CT C tT LT aa LY °: To co CH Co LTA CT 7 Co Co co CH CC rH on Ty jagram an co Cor Co Coo au co on H=-KH CH CO He-KH CCH Cr “THHE HA BESaEEEaE 1 HHH 24 =H HEHEHE HAT HEEL Hie Se ae a = ne a z ee 20 a g, ee HH pate ee ee -ePEeeE 200 os ee ee 60 S 16 a jatiatiiani ot @ co EEE - HAH Cr Coo cH dl 1 nEaanEE Cor 12 a CT Co CH ae CT Ce TT] CH CH Cr Co oa 80 24H HERE eH im — CH HHH HHH 2 =H HH Coo CH Co CH | CH CH Co 40 [°C]
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2: ve aE C 4 . co to 7 vagrant — ae ] A — 5 °C, 7 ===e 1=50 =e HEEL yi i BREE AT, = o== 178 Lt | /| SEzznocnss Rosion= FREER [ome TI l sziritecetoct — =i Ss eciaaia jie iss Ol SFeecrecenat TT pacitan se | at cal SSrizssssirs co i FEE (1 | : Typ. eH re CH LH S5R 255555 VI Co | 11: SSE LH 02 Seite ‘aan == ram eee AH CA 1 HEE co na EEE EERE nal a 10° SSHiRiinii Ht HH EE EHH LH H Fee aes Cy CH [| === CH peat Co A 1 Fotos | LITT Jee =aaea: a cl Ul « =EEP BPE 7 i TH SSrettiinin: co ll SSrerintaiar CH CH FEE Coo an sprestntczas ct an Screrersrtn! cco rn ot FEE Hee rT 0 SSsterestet CH CH 1 BEECH HT Vor 15 Seeeeestttseee na EEE LH 125 10° ie CH Hs HAH CH ; PCH a cH BEE Co an 4.00 NenSaR TT =EESaEE ru ACH LH | Siriniics [| | 075 ‘ TNE He eetce Hii oe Ni ===== i ° oF ee res | See il 00 7 . sari Css HT eter: Ti 40 10° Haar 150 ; param 1-09- CEE CH Vso); 202 cote HI ts HH HE 100 Rev. LL | 75 10" * iz
0 VP MH 8
=0V; i Vos =A(Vos) et Shee Final Data
OptiMOS™ 5 Power-Transistor, 150 V In neon IPTO44N15N5 Diagram 13: Avalanche characteristics Diagram 14: Typ. gate charge See H—-7sv HTT A => 784 COCO ae a rb 120 YICCeCeeceeeeEELLLV Vaunnl
1 Pepe see EERE =<
oe EAT IE ETT Se CCCOECCEEC Cee ee cos COCO Ae CTT ANETTA PST TT] COOCECC EECA) NS ASTIN 6 A KK SE CO z ECC eee 2 —— HEH HHP PRS | CECE EH ast 400 °C / CC CNS COCOA COCOA ow SOUT TPS) EES SE 150 °C SEH SSE ES SS SS 2000) SE08 Se Sal smal nat a fasantadantatostatesntad DZS 107 0 a ZECEPCE EEE CE EEE 10" 10° 10° 107 10° (0) 10 20 30 40 50 60 70 tav [us] Qgate [NC] Ins=f(tav); Res=25 Q; parameter: T;start Ves=f(Qoate), lo=50 A pulsed, T=25 °C; parameter: Voo Diagram 15: Drain-source breakdown voltage Diagram Gate charge waveforms 160 — oe A eee ee eee eee ee eee 158 eee ee eee eee Ves A A A 7 eee ee ee eee eee ee ee ae Q eee ee ee ee g
96 EEE EE EEE EEE EH
19 FREE EEE EEEEEEE EEE EEEEEEEE EH
g 182 CEEEE EEE EEEEEAE EEE EEE EE 8 eee eee e eee 2 eee 190-FEEE EEE EERE EEE EEE EE EEE EH eee eee eee ee eee eee 4 eee | 148 ae ee eee / A eee ee eee Cerra tTry yee FREE EERE EE EERE EEE EEE Q r 146 fi eee Gown Se, eee ee eee eee ee eee 144 eee ee eee Polo | Qou -80 -40 0 40 80 120 160 200 Tre] Vereossi-1(Ti) o=1 mA LT Final Data Sheet 9 Rev. 2.0, 2021-09-10
OptiMOS™ 5 Power-Transistor, 150 V ¢ Infi neon IPTO44N15N5
5 Package Outlines
E 5 A ee Kr) i SY x a KY yn ! s DICITITIOI LILI Ty ¢ " 8xb i le] ia ——| E Ea w ES z 1) Mold Flash area = ALA SAA | [| 2: 1) partially covered with Mold Flash [___mumerers [INCHES [om a ae ae DOCUMENT NO. ———— [or 970890 032 0.380 0 [ba oan oso Toot 0.020 SCALE [e040 050] | ea) a 2 | 2 [e970 t0.t0 0382 0398 | 0 2 a a | "sm a a 7 | (re 20 esc) 0a esc) EUROPEAN PROJECTION a CC a A <2 | Ce © ck: a a a, << =: ISSUE DATE a | a 7: SX 7 ee a a | 02 Figure 1 Outline PG-HSOF-8, dimensions in mm/inches Final Data Sheet 10 Rev. 2.0, 2021-09-10
OptiMOS™ 5 Power-Transistor, 150 V Cin ineon IPTO44N15N5
Revision History
Revision: 2021-09-10, Rev. 2.0 Previous Revision Revision [Date __| Subjects (major changes since last revision) 2.0 2021-09-10 | Release of final version Trademarks All referenced product or service names and trademarks are the property of their respective owners We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG
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© 2020 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support, automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Final Data Sheet 11 Rev. 2.0, 2021-09-10