IPP50R350CP_12 INFINEON | Alldatasheet

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Technical content

Features

  • Lowest figure-of-merit RON x Qg
  • Ultra low gate charge
  • Extreme dv/dt rated
  • High peak current capability
  • Pb-free lead plating; RoHS compliant; Halogen free for mold compound
  • Qualified for industrial grade applications according to JEDEC1) CoolMOS CP is designed for:
  • Hard- & soft switching SMPS topologies
  • CCM PFC for Lamp Ballast, LCD & PDP TV
  • PWM for Lamp Ballast, LCD & PDP TV VDS @Tjmax 550 V RDS(on),max 0.350 W Qg,typ 19 nC Product Summary Type Package Marking IPP50R350CP PG-TO220 5R350P PG-TO220 Rev. 2.1 page 1 2012-05-08 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Unit Continuous drain current I D T C=25 °C A T C=100 °C Pulsed drain current2) I D,pulse T C=25 °C Avalanche energy, single pulse E AS I D=3.7 A, V DD=50 V 246 mJ Avalanche energy, repetitive t AR 2),3) E AR I D=3.7 A, V DD=50 V Avalanche current, repetitive t AR 2),3) I AR A MOSFET dv /dt ruggedness d v /dt V DS=0...400 V V/ns Gate source voltage V GS static V AC (f>1 Hz) Power dissipation P tot T C=25 °C W Operating and storage temperature T j, T stg °C Mounting torque M3 and M3.5 screws 60 Ncm -55 ... 150 0.37 3.7 ±20 Value ±30 Type Package Marking IPP50R350CP PG-TO220 5R350P Rev. 2.1 page 1 2012-05-08

Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Unit Continuous diode forward current I S A Diode pulse current2) I S,pulse 22 Reverse diode dv /dt 4) dv /dt 15 V/ns Parameter Symbol Conditions Unit min. typ. max. Thermal characteristics Thermal resistance, junction - case R thJC - - 1.4 K/W R thJA leaded - - 62 Soldering temperature, wavesoldering only allowed at leads T sold 1.6 mm (0.063 in.) from case for 10 s - - 260 °C Electrical characteristics, at T j=25 °C, unless otherwise specified Value T C=25 °C 5.6 Values Thermal resistance, junction - ambient Rev. 2.1 page 2 2012-05-08 Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=250 µA 500 - - V Gate threshold voltage V GS(th) V DS=V GS, I D=0.37 mA 2.5 3 3.5 Zero gate voltage drain current I DSS V DS=500 V, V GS=0 V, T j=25 °C - - 1 µA V DS=500 V, V GS=0 V, T j=150 °C - 10 - Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=5.6 A, T j=25 °C - 0.32 0.35 W V GS=10 V, I D=5.6 A, Gate resistance R G f =1 MHz, open drain - 2.2 - W Rev. 2.1 page 2 2012-05-08

Parameter Symbol Conditions Unit min. typ. max. Dynamic characteristics Input capacitance C iss - 1020 - pF Output capacitance C oss - 46 - Effective output capacitance, energy related5) C o(er) - 43 - Effective output capacitance, time related6) C o(tr) - 92 - Turn-on delay time t d(on) - 35 - ns Rise time t r - 14 - Turn-off delay time t d(off) - 80 - Fall time t f - 12 - Gate Charge Characteristics Gate to source charge Q gs - 4 - nC Values V GS=0 V, V DS=100 V, f =1 MHz V DD=400 V, V GS=10 V, I D=5.6 A, R G=30.9 W V GS=0 V, V DS=0 V to 400 V Rev. 2.1 page 3 2012-05-08 Gate to drain charge Q gd - 6 - Gate charge total Q g - 19 25 Gate plateau voltage V plateau - 5.2 - V Reverse Diode Diode forward voltage V SD V GS=0 V, I F=5.6 A, T j=25 °C - 0.9 1.2 V Reverse recovery time t rr - 250 - ns Reverse recovery charge Q rr - 2.3 - µC Peak reverse recovery current I rrm - 19 - A 1) J-STD20 and JESD22 2) Pulse width t p limited by T j,max 3) Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. 6) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. 4) I SD≤I D, di /dt ≤400A/µs, V DClink=400V, V peak<V (BR)DSS, T j<T jmax, identical low and high side switch V R=400 V, I F=I S, di F/dt =100 A/µs V DD=400 V, I D=5.6 A, V GS=0 to 10 V Rev. 2.1 page 3 2012-05-08

1 Power dissipation 2 Safe operating area

P tot=f(T C) I D=f(V DS); T C=25 °C; D =0 parameter: t p 100 0 25 50 75 100 125 150 175 Ptot [W] TC [°C] 1 µs 10 µs 100 µs 1 ms 10 ms DC 100 101 102 103 10-1 100 101 102 ID [A] VDS [V] limited by on-state resistance Rev. 2.1 page 4 2012-05-08 3 Max. transient thermal impedance 4 Typ. output characteristics Z(thJC)=f(tp); I D=f(V DS); T j=25 °C parameter: D=t p/T parameter: V GS 100 0 25 50 75 100 125 150 175 Ptot [W] TC [°C] 1 µs 10 µs 100 µs 1 ms 10 ms DC 100 101 102 103 10-1 100 101 102 ID [A] VDS [V] single pulse 0.01 0.02 0.05 0.1 0.2 0.5 10-5 10-4 10-3 10-2 10-1 100 10-2 10-1 100 101 ZthJC [K/W] tp [s] 4.5 V 5 V 5.5 V 6 V 7 V 8 V 10 V 20 V 0 5 10 15 20 ID [A] VDS [V] limited by on-state resistance Rev. 2.1 page 4 2012-05-08

5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D=f(V DS); T j=150 °C R DS(on)=f(I D); T j=150 °C parameter: V GS parameter: V GS 4.5 V 5 V 5.5 V 6 V 7 V 8 V 10 V 20 V 0 5 10 15 20 ID [A] VDS [V] 5.5 V 6 V

6.5 V 7 V

0.6 0.8 1.2 1.4 1.6 0 5 10 15 20 RDS(on) [W] ID [A] Rev. 2.1 page 5 2012-05-08 7 Drain-source on-state resistance 8 Typ. transfer characteristics R DS(on)=f(T j); I D=5.6 A; V GS=10 V I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j typ 98 % 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -60 -20 20 60 100 140 180 RDS(on) [W] Tj [°C] 25 °C 150 °C 0 2 4 6 8 10 ID [A] VGS [V] 4.5 V 5 V 5.5 V 6 V 7 V 8 V 10 V 20 V 0 5 10 15 20 ID [A] VDS [V] 5.5 V 6 V 0.6 0.8 1.2 1.4 1.6 0 5 10 15 20 RDS(on) [W] ID [A] Rev. 2.1 page 5 2012-05-08

9 Typ. gate charge 10 Forward characteristics of reverse diode V GS=f(Q gate); I D=5.6 A pulsed I F=f(V SD) parameter: V DD parameter: T j 25 °C 150 °C 25 °C, 98% 150 °C, 98% 10-1 100 101 102 0 0.5 1 1.5 2 IF [A] VSD [V] 100 V 400 V 0 5 10 15 20 VGS [V] Qgate [nC] Rev. 2.1 page 6 2012-05-08

11 Avalanche energy 12 Drain-source breakdown voltage

E AS=f(T j); I D=3.7 A; V DD=50 V V BR(DSS)=f(T j); I D=0.25 mA 25 °C 150 °C 25 °C, 98% 150 °C, 98% 10-1 100 101 102 0 0.5 1 1.5 2 IF [A] VSD [V] 100 V 400 V 0 5 10 15 20 VGS [V] Qgate [nC] 440 460 480 500 520 540 560 580 -60 -20 20 60 100 140 180 VBR(DSS) [V] Tj [°C] 100 150 200 250 25 75 125 175 EAS [mJ] Tj [°C] Rev. 2.1 page 6 2012-05-08

13 Typ. capacitances 14 Typ. Coss stored energy C =f(V DS); V GS=0 V; f =1 MHz E oss= f(V DS) 0 100 200 300 400 500 Eoss [µJ] VDS [V] Ciss Coss Crss 100 101 102 103 104 0 100 200 300 400 500 C [pF] VDS [V] Rev. 2.1 page 7 2012-05-08 0 100 200 300 400 500 Eoss [µJ] VDS [V] Ciss Coss Crss 100 101 102 103 104 0 100 200 300 400 500 C [pF] VDS [V] Rev. 2.1 page 7 2012-05-08

Definition of diode switching characteristics Rev. 2.1 page 8 2012-05-08Rev. 2.1 page 8 2012-05-08

PG-TO220-3-1/PG-TO220-3-21: Outline Rev. 2.1 page 9 2012-05-08 Rev. 2.1 page 9 2012-05-08

81726 München, Germany

© 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this data sheet shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non- infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact the nearest Infineon Technologies Office (www.infineon.com ). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies. If a failure of such components can reasonably be expected to cause the failure of that life-support, automotive, aviation and aerospace device or system, or to affect the safety Rev. 2.1 page 10 2012-05-08 failure of that life-support, automotive, aviation and aerospace device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.1 page 10 2012-05-08