IPP030N10N5_16 INFINEON | Alldatasheet

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Technical content

Features

  • Idealforhighfrequencyswitchingandsync.rec.
  • ExcellentgatechargexRDS(on)product(FOM)
  • Verylowon-resistanceRDS(on)
  • N-channel,normallevel
  • 100%avalanchetested
  • Pb-freeplating;RoHScompliant
  • QualifiedaccordingtoJEDEC1)fortargetapplications
  • Halogen-freeaccordingtoIEC61249-2-21 Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 3.0 mΩ ID 120 A Qoss 142 nC QG(0V..10V) 112 nC Type/OrderingCode Package Marking RelatedLinks IPP030N10N5 PG-TO220-3 030N10N5 - 1) J-STD20 and JESD22

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet TableofContents

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Continuous drain current ID 120

120 A TC=25°C

TC=100°C Pulsed drain current1) ID,pulse - - 480 A TC=25°C Avalanche energy, single pulse2) EAS - - 461 mJ ID=100A,RGS=25Ω Gate source voltage VGS -20 - 20 V - Power dissipation Ptot - - 250 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 2Thermalcharacteristics Table3Thermalcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Thermal resistance, junction - case RthJC - 0.4 0.6 K/W - Thermal resistance, junction - ambient, minimal footprint RthJA - - 62 K/W - Thermal resistance, junction - ambient, 6 cm2 cooling area3) RthJA - - 40 K/W - Soldering temperature, wave and reflow soldering are allowed Tsold - - 260 °C reflow MSL1 1) See Diagram 3 for more detailed information 2) See Diagram 13 for more detailed information 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air.

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet 3Electricalcharacteristics Table4Staticcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Drain-source breakdown voltage V(BR)DSS 100 - - V VGS=0V,ID=1mA Gate threshold voltage VGS(th) 2.2 3.0 3.8 V VDS=VGS,ID=184µA Zero gate voltage drain current IDSS 0.1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) 2.7 3.1 3.0 3.8 mΩ VGS=10V,ID=100A VGS=6V,ID=50A Gate resistance1) RG - 1.2 1.8 Ω - Transconductance gfs 102 203 - S |VDS|>2|ID|RDS(on)max,ID=100A Table5Dynamiccharacteristics1) Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Input capacitance Ciss - 7920 10300 pF VGS=0V,VDS=50V,f=1MHz Output capacitance Coss - 1210 1570 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 53 93 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 25 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Rise time tr - 15 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Turn-off delay time td(off) - 52 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Fall time tf - 17 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Table6Gatechargecharacteristics2) Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Gate to source charge Qgs - 37 - nC VDD=50V,ID=100A,VGS=0to10V Gate to drain charge1) Qgd - 23 34 nC VDD=50V,ID=100A,VGS=0to10V Switching charge Qsw - 37 - nC VDD=50V,ID=100A,VGS=0to10V Gate charge total1) Qg - 112 139 nC VDD=50V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.6 - V VDD=50V,ID=100A,VGS=0to10V Output charge1) Qoss - 142 189 nC VDD=50V,VGS=0V 1) Defined by design. Not subject to production test. 2) See ″Gate charge waveforms″ for parameter definition

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet Table7Reversediode Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Diode continous forward current IS - - 120 A TC=25°C Diode pulse current IS,pulse - - 480 A TC=25°C Diode forward voltage VSD - 0.9 1.2 V VGS=0V,IF=100A,Tj=25°C Reverse recovery time1) trr - 74 148 ns VR=50V,IF=IS,diF/dt=100A/µs Reverse recovery charge1) Qrr - 166 332 nC VR=50V,IF=IS,diF/dt=100A/µs 1) Defined by design. Not subject to production test.

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation TC[°C] Ptot[W] 100 150 200 100 150 200 250 300 Ptot=f(TC) Diagram2:Draincurrent TC[°C] ID[A] 100 150 200 100 120 140 ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea VDS[V] ID[A] 10-1 100 101 102 103 10-1 100 101 102 103 1 µs 10 µs 100 µs 1 ms 10 ms DC ID=f(VDS);TC=25°C;D=0;parameter:tp Diagram4:Max.transientthermalimpedance tp[s] ZthJC[K/W] 10-5 10-4 10-3 10-2 10-1 100 10-2 10-1 100 0.5 0.2 0.1 0.05 0.02 0.01 single pulse ZthJC=f(tp);parameter:D=tp/T

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet Diagram5:Typ.outputcharacteristics VDS[V] ID[A] 120 160 200 240 280 320 360 400 440 480 7 V 10 V 6 V 5.5 V 5 V ID=f(VDS);Tj=25°C;parameter:VGS Diagram6:Typ.drain-sourceonresistance ID[A] RDS(on)[mΩ ] 100 200 300 400 500 5 V 5.5 V 6 V 7 V 10 V RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics VGS[V] ID[A] 100 150 200 250 300 350 400 175 °C 25 °C ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Diagram8:Typ.forwardtransconductance ID[A] gfs[S] 120 160 100 150 200 250 gfs=f(ID);Tj=25°C

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet Diagram9:Drain-sourceon-stateresistance Tj[°C] RDS(on)[mΩ ] -60 -20 100 140 180 max typ RDS(on)=f(Tj);ID=100A;VGS=10V Diagram10:Typ.gatethresholdvoltage Tj[°C] VGS(th)[V] -60 -20 100 140 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1840 µA 184 µA VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances VDS[V] C[pF] 101 102 103 104 Ciss Coss Crss C=f(VDS);VGS=0V;f=1MHz Diagram12:Forwardcharacteristicsofreversediode VSD[V] IF[A] 0.0 0.5 1.0 1.5 2.0 2.5 100 101 102 103 25 °C 175 °C 25 °C, max 175 °C, max IF=f(VSD);parameter:Tj

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet Diagram13:Avalanchecharacteristics tAV[µs] IAV[A] 100 101 102 103 100 101 102 103 25 °C 100 °C 150 °C IAS=f(tAV);RGS=25Ω ;parameter:Tj(start) Diagram14:Typ.gatecharge Qgate[nC] VGS[V] 120 20 V 50 V 80 V VGS=f(Qgate);ID=100Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Tj[°C] VBR(DSS)[V] -60 -20 100 140 180 100 105 110 VBR(DSS)=f(Tj);ID=1mA Gate charge waveforms

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet 5PackageOutlines Figure1OutlinePG-TO220-3,dimensionsinmm/inches

OptiMOSª5Power-Transistor,100V IPP030N10N5 Rev.2.2,2016-07-22Final Data Sheet RevisionHistory IPP030N10N5 Revision:2016-07-22,Rev.2.2 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-12-17 Release of final version 2.1 2015-01-30 Reduction of active area by 0.7% 2.2 2016-07-22 Update SOA Diagram TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.