IPP011N03LF2S INFINEON | Alldatasheet
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Technical content
Features
Qualified according to JEDEC Standard Table 1 Key Performance Parameters Parameter Value Unit V 30 V R 1.05 mΩ I 210 A Q 176 nC Q (0V..4.5V) 108 nC PG‑TO220‑3 Type/Ordering Code Package Marking Related Links IPP011N03LF2S PG‑TO220‑3 011N03F2 ‑ Optimized for a wide range of applications• N‑channel, logic level• 100% avalanche tested• 175°C rated• Pb‑free lead plating; RoHS compliant• Halogen‑free according to IEC61249‑2‑21• DS DS(on),max D oss g Public IPP011N03LF2S Final datasheet tab Drain Pin 2, Tab Gate Pin 1 Source Pin 3
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 2 Revision 2.0 https://www.infineon.com 2024‑05‑22 Table of Contents
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 3 Revision 2.0 https://www.infineon.com 2024‑05‑22
1 Maximum ratings
unless otherwise specified Table 2 Maximum ratings Parameter Symbol Values Unit Note/ Test Condition Min. Typ. Max. Continuous drain current 1) I ‑ ‑ 210 163 A V =10 V, =25 °C T =10 V, =100 °C V T Pulsed drain current 3) I ‑ ‑ 840 A T =25 °C Avalanche energy, single pulse 4) E ‑ ‑ 2514 5028 mJ I =100 A, =25 Ω R =50 A, =25 ΩI R Gate source voltage V ‑20 ‑ 20 V ‑ Power dissipation P ‑ ‑ 375 3.8 W T =25 °C Operating and storage temperature T, T ‑55 ‑ 175 °C ‑ Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as 1) specified. For other case temperatures please refer to Diagram 2. De‑rating will be required based on the actual environmental conditions. Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 μm thick) copper area for drain connection. PCB 2) 2 is vertical in still air. See Diagram 3 for more detailed information3) See Diagram 13 for more detailed information4) D GS C GS C GS A THJA D,pulse C AS D GS D GS GS tot C A THJA j stg
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 4 Revision 2.0 https://www.infineon.com 2024‑05‑22
2 Thermal characteristics
Table 3 Thermal characteristics Parameter Symbol Values Unit Note/ Test Condition Min. Typ. Max. Thermal resistance, junction ‑ case R ‑ ‑ 0.4 °C/W ‑ Thermal resistance, junction ‑ ambient, cm² cooling area 5) R ‑ ‑ 40 °C/W ‑ Thermal resistance, junction ‑ ambient, minimal footprint R ‑ ‑ 62 °C/W ‑ Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 μm thick) copper area for drain connection. PCB 5) 2 is vertical in still air. thJC thJA thJA
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 5 Revision 2.0 https://www.infineon.com 2024‑05‑22
3 Electrical characteristics
unless otherwise specified Table 4 Static characteristics Parameter Symbol Values Unit Note/ Test Condition Min. Typ. Max. Drain‑source breakdown voltage V 30 ‑ ‑ V V =0 V, =10 mAI Gate threshold voltage V 1.35 1.85 2.35 V V = , =250 μAV I Zero gate voltage drain current I ‑ 0.1 100 μA V =30 V, =0 V, =25 °C V T =30 V, =0 V, =125 °CV V T Gate‑source leakage current I ‑ 10 100 nA V =20 V, =0 VV Drain‑source on‑state resistance 6) R ‑ 0.91 1.0 1.05 1.5 mΩ V =10 V, =100 A I =4.5 V, =50 AV I Gate resistance R ‑ 1.8 ‑ Ω ‑ Transconductance 7) g 200 ‑ ‑ S | |≥2| | , =100 AV I R I R is specified at a distance of 1.8 mm distance to the package body; mounting at a larger distance increases the overall 6) package resistance of approximately 0.04 mOhm/mm per leg. Defined by design. Not subject to production test.7) Table 5 Dynamic characteristics Parameter Symbol Values Unit Note/ Test Condition Min. Typ. Max. Input capacitance C ‑ 15100 ‑ pF V =0 V, =15 V, =1 MHzV f Output capacitance C ‑ 2910 ‑ pF V =0 V, =15 V, =1 MHzV f Reverse transfer capacitance C ‑ 720 ‑ pF V =0 V, =15 V, =1 MHzV f Turn‑on delay time t ‑ 46 ‑ ns V =15 V, =4.5 V, =100 A, V I =1.6 ΩR Rise time t ‑ 105 ‑ ns V =15 V, =4.5 V, =100 A, V I =1.6 ΩR Turn‑off delay time t ‑ 60 ‑ ns V =15 V, =4.5 V, =100 A, V I =1.6 ΩR Fall time t ‑ 33 ‑ ns V =15 V, =4.5 V, =100 A, V I =1.6 ΩR Table 6 Gate charge characteristics 8) Parameter Symbol Values Unit Note/ Test Condition Min. Typ. Max. Gate to source charge Q ‑ 47 ‑ nC V =15 V, =100 A, =0 to 4.5 VI V Gate charge at threshold Q ‑ 28 ‑ nC V =15 V, =100 A, =0 to 4.5 VI V Gate to drain charge Q ‑ 31 ‑ nC V =15 V, =100 A, =0 to 4.5 VI V (BR)DSS GS D GS(th) DS GS D DSS DS GS j DS GS j GSS GS DS DS(on) GS D GS D G fs DS D DS(on)max D DS(on) iss GS DS oss GS DS rss GS DS d(on) DD GS D G,ext r DD GS D G,ext d(off) DD GS D G,ext f DD GS D G,ext gs DD D GS g(th) DD D GS gd DD D GS
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 6 Revision 2.0 https://www.infineon.com 2024‑05‑22 Table 6 Gate charge characteristics 8) Parameter Symbol Values Unit Note/ Test Condition Min. Typ. Max. Switching charge Q ‑ 49 ‑ nC V =15 V, =100 A, =0 to 4.5 VI V Gate charge total 9) Q ‑ 108 162 nC V =15 V, =100 A, =0 to 4.5 VI V Gate plateau voltage V ‑ 3.1 ‑ V V =15 V, =100 A, =0 to 4.5 VI V Gate charge total 9) Q ‑ 224 336 nC V =15 V, =100 A, =0 to 10 VI V Gate charge total, sync. FET 9) Q ‑ 95 ‑ nC V =0.1 V, =0 to 4.5 VV Output charge 9) Q ‑ 176 ‑ nC V =15 V, =0 VV See "Gate charge waveforms" for parameter definition8) Defined by design. Not subject to production test.9) Table 7 Reverse diode Parameter Symbol Values Unit Note/ Test Condition Min. Typ. Max. Diode continuous forward current I ‑ ‑ 173 A T =25 °C Diode pulse current I ‑ ‑ 840 A T =25 °C Diode forward voltage V ‑ 0.82 1.0 V V =0 V, =100 A, =25 °CI T Reverse recovery time t ‑ 36 ‑ ns V =15 V, =100 A, d /d =500 A/μsI i t Reverse recovery charge Q ‑ 160 ‑ nC V =15 V, =100 A, d /d =500 A/μsI i t sw DD D GS g DD D GS plateau DD D GS g DD D GS g(sync) DS GS oss DS GS S C S,pulse C SD GS F j rr R F F rr R F F
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 7 Revision 2.0 https://www.infineon.com 2024‑05‑22
4 Electrical characteristics diagrams
Diagram 1: Power dissipation Diagram 2: Drain current P =f( )T I =f( ); ≥10 VT V Diagram 3: Safe operating area Diagram 4: Max. transient thermal impedance I =f( ); =25 °C; =0; parameter: V T D t Z =f( ); parameter: = /t D t T tot C D C GS D DS C p thJC p p 0 25 50 75 100 125 150 175 200 TC [°C] 100 150 200 250 300 350 400Ptot [W] 0 25 50 75 100 125 150 175 200 TC [°C] 100 150 200 250ID [A] 10 1 100 101 102 VDS [V] 10 1 100 101 102 103 ID [A] 1 µs 10 µs 100 µs 1 ms 10 ms DC 10 6 10 5 10 4 10 3 10 2 10 1 100 tp [s] 10 3 10 2 10 1 100 101 ZthJC [K/W] single pulse 0.01 0.02 0.05 0.1 0.2 0.5
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 8 Revision 2.0 https://www.infineon.com 2024‑05‑22 Diagram 5: Typ. output characteristics Diagram 6: Typ. drain‑source on resistance I =f( ), =25 °C; parameter: V T V R =f( ), =25 °C; parameter: I T V Diagram 7: Typ. transfer characteristics Diagram 8: Typ. drain‑source on resistance I =f( ), | |>2| | ; parameter: V V I R T R =f( ), =100 A; parameter: V I T D DS j GS DS(on) D j GS D GS DS D DS(on)max j DS(on) GS D j VDS [V] 100 200 300 400 500 600 700 800ID [A] 3.5 V 4 V 4.5 V
5 V6 V
0 50 100 150 200 250 300 350 400 ID [A] 0.8 1.0 1.2 1.4 1.6 RDS(on) [m ] 3.5 V 4 V
4.5 V 5 V
VGS [V] 100 200 300 400 500 600 700 800ID [A] 25 °C175 °C 0 2 4 6 8 10 12 14 16 VGS [V] 0.8 1.0 1.2 1.4 1.6 1.8 2.0 RDS(on) [m ] 25 °C 175 °C
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 9 Revision 2.0 https://www.infineon.com 2024‑05‑22 Diagram 9: Normalized drain‑source on resistance Diagram 10: Typ. gate threshold voltage R =f( ), =100 A, =10 VT I V V =f( ), = ; parameter: T V V I Diagram 11: Typ. capacitances Diagram 12: Typ. forward characteristics of reverse diode C=f( ); =0 V; =1 MHzV V f =f( )I V DS(on) j D GS GS(th j GS DS D DS GS F SD -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj [°C] 0.4 0.8 1.2 1.6 2.0 RDS(on) (normalized to 25 °C) -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj [°C] 0.0 0.4 0.8 1.2 1.6 2.0 2.4 VGS(th) [V] 250 µA 2.5 mA 0 5 10 15 20 25 30 VDS [V] 102 103 104 105 C [pF] Ciss Coss Crss VSD [V] 100 101 102 103 IF [A] 25 °C 175 °C
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 10 Revision 2.0 https://www.infineon.com 2024‑05‑22 Diagram 13: Avalanche characteristics Diagram 14: Typ. gate charge I =f( ); =25 Ω; parameter: t R T V =f( ), =100 A pulsed, =25 °C; parameter: Q I T V Diagram 15: Drain‑source breakdown voltage Gate charge waveforms V =f( ); =10 mAT I ‑ AS AV GS j,start GS gate D j DD BR(DSS) j D 101 102 103 104 tAV [µs] 100 101 102 103 IAV [A] 25 °C 100 °C 150 °C 0 40 80 120 160 200 240 Qgate [nC] 10VGS [V] 6 V 15 V 24 V -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj [°C] VBR(DSS) [V] G a t e c h a r g e w a v e f o r m s
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 11 Revision 2.0 https://www.infineon.com 2024‑05‑22
5 Package Outlines
Figure 1 Outline PG‑TO220‑3, dimensions in mm DIMENSIONSMIN.MAX.MILLIMETERSPG-TO220-3-U05PACKAGE - GROUPNUMBER: A2bDcEeLQøPL1 AA1 2.922.47 2.54 14.320.360.71 9.90 3.562.543.5413.00 8.390.970.6115.80 2.943.904.0614.40 10.679.20
StrongIRFET™2 Power‑Transistor , 30 V IPP011N03LF2S Public Datasheet 12 Revision 2.0 https://www.infineon.com 2024‑05‑22 IPP011N03LF2S Revision 2024‑05‑23, Rev. 2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2024‑05‑23 Release of final Trademarks All referenced product or service names and trademarks are the property of their respective owners. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG
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