IPD127N06LG_08 INFINEON | Alldatasheet
Document overview
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Technical content
Features
- For fast switching converters and sync. rectification
- N-channel enhancement - logic level
- 175 °C operating temperature
- Avalanche rated
- Pb-free lead plating, RoHS compliant Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Unit Continuous drain current I D T C=25 °C1) 50 A T C=100 °C 48 Pulsed drain current I D,pulse T C=25 °C2) 200 Avalanche energy, single pulse E AS I D=50 A, R GS=25 Ω 240 mJ Reverse diode dv /dt dv /dt I D=50 A, V DS=48 V, di /dt =200 A/µs, T j,max=175 °C 6 kV/µs Gate source voltage V GS ±20 V Power dissipation P tot T C=25 °C 136 W Operating and storage temperature T j, T stg -55 ... 175 °C IEC climatic category; DIN IEC 68-1 55/175/56 Value 2) See figure 3 1) Current is limited by bondwire; with an R thJC=1.1 K/W the chip is able to carry 64 A. V DS 60 V R DS(on),max 12.7 mΩ I D 50 A Product Summary PG-TO252-3 Type IPD127N06L G Marking 127N06L Rev. 1.2 page 1 2008-07-22
Parameter Symbol Conditions Unit min. typ. max. Thermal characteristics Thermal resistance, junction - case R thJC - - 1.1 K/W SMD version, device on PCB R thJA minimal footprint - - 75 6 cm2 cooling area3) -- 5 0 Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 60 - - V Gate threshold voltage V GS(th) V DS=V GS, I D=80 µA 1.2 1.6 2 Zero gate voltage drain current I DSS V DS=60 V, V GS=0 V, T j=25 °C - 0.01 1 µA V DS=60 V, V GS=0 V, T j=125 °C - 1 100 Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=33 A - 12.5 16.7 mΩ V GS=10 V, I D=50 A - 10.0 12.7 Gate resistance R G - 1.5 - Ω Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=50 A 35 69 - S 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Values Rev. 1.2 page 2 200 8-07-22
Parameter Symbol Conditions Unit min. typ. max. Dynamic characteristics Input capacitance C iss - 1700 2300 pF Output capacitance C oss - 410 550 Reverse transfer capacitance C rss - 110 165 Turn-on delay time t d(on) - 9 13 ns Rise time t r -1 4 2 1 Turn-off delay time t d(off) -3 9 5 8 Fall time t f -1 3 2 1 Gate Charge Characteristics4) Gate to source charge Q gs -69 n C Gate charge at threshold Q g(th) -34 Gate to drain charge Q gd -1 7 2 6 Switching charge Q sw -2 1 3 1 Gate charge total Q g -5 2 6 9 Gate plateau voltage V plateau - 3.7 - V Output charge Q oss V DD=30 V, V GS=0 V -1 6 2 1 Reverse Diode Diode continous forward current I S - - 50 A Diode pulse current I S,pulse - - 200 Diode forward voltage V SD V GS=0 V, I F=50 A, T j=25 °C - 0.93 1.3 V Reverse recovery time t rr -5 2 6 5 n s Reverse recovery charge Q rr - 99 125 nC 4) See figure 16 for gate charge parameter definition V R=30 V, I F=I S, di F/dt =100 A/µs T C=25 °C Values V GS=0 V, V DS=30 V, f =1 MHz V DD=30 V, V GS=10 V, I D=50 A, R G=3.6 Ω V DD=30 V, I D=50 A, V GS=0 to 10 V Rev. 1.2 page 3 2008-07-22
1 Power dissipation 2 Drain current
P tot=f(T C); V GS≥6 V I D=f(T C); V GS≥10 V 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 1 µs 10 µs 100 µs 1 ms 10 ms DC 10210110010-1 103 102 101 100 10-1 V DS [V] I D [A] limited by on-state resistance single pulse0.01 0.02 0.05 0.1 0.2 0.5 10010-110-210-310-410-5 101 100 10-1 10-2 t p [s] Z thJC [K/W] 100 120 140 160 0 50 100 150 200 T C [°C] P tot [W] 0 50 100 150 200 T C [°C] I D [A] Rev. 1.2 page 4 2008-07 -22
5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 3 V 3.5 V 4 V 4.5 V 5 V 5.5 V 10 V 0 2 04 06 08 0 1 0 0 I D [A] R DS(on) [mΩ ] 25 °C 175 °C 01234 V GS [V] I D [A] 100 0 2 04 06 0 I D [A] g fs [S] 3 V 3.5 V 4 V 4.5 V 5 V 5.5 V 10 V 100 120 140 160 180 200 0123 V DS [V] I D [A] Rev. 1.2 page 5 2008 -07-22
9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=50 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j typ 98% -60 -20 20 60 100 140 180 T j [°C] R DS(on) [mΩ ] 81 µA 810 µA -60 -20 20 60 100 140 180 T j [°C] V GS(th) [V] Ciss Coss Crss 100 1000 10000 0 1 02 03 04 05 0 V DS [V] C [pF] 25 °C175 °C 50 A 103 102 101 100 10-1 0 0.5 1 1.5 2 V SD [V] I F [A] Rev. 1.2 page 6 2008-07 -22
13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=50 A pulsed parameter: T j(start) parameter: V DD
15 Drain-source breakdown voltage 16 Gate charge waveforms
V BR(DSS)=f(T j); I D=1 mA
12 V 30 V
Q gate [nC] V GS [V] -60 -20 20 60 100 140 180 T j [°C] V BR(DSS) [V] V GS Q gate V gs(th) Q g(th) Q gs Q gd Q sw Q g 25 °C 100 °C 150 °C 100 1 10 100 1000 t AV [µs] I AV [A] Rev. 1.2 page 7 2008-07 -22
PG-TO252-3: Outline packaging: Rev. 1.2 page 8 2008-07-22
Rev. 1.2 page 9 2008-07 -22 IPD127N06L G