IP4787CZ32 NEXPERIA | Alldatasheet
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Technical content
Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. use http://www.nexperia.com salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e -mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia
- Product profile
1.1 General description
The IP4787CZ32 is designed to protect High-Definition Multimedia Interface (HDMI) receiver interfaces. It includes HDMI 5 V power management, Display Data Channel (DDC) buffering and decoupling, hot plug drive, backdrive protection, Consumer Electronic Control (CEC) buffering and decoupling, and 12 kV contact ElectroStatic Discharge (ESD) protection for all external I/Os, exceeding the IEC 61000-4-2, level 4 standard. The IP4787CZ32 incorporates Transmission Line Clamping (TLC) technology on the high-speed Transition-Minimized Differential Signaling (TMDS) lines to simplify routing and help reduce impedance discontinuities. All TMDS lines are protected by an impedance-matched diode configuration that minimizes impedance discontinuities caused by typical shunt diodes. The 5 V power management enables host access to the [Extended Display Identification Data (EDID)] memory even if no HDMI plug is connected. The overall load to the 5 V line is according to the HDMI requirements. The DDC lines use a buffering concept which decouples the internal capacitive load from the external capacitive load for use with standard Complementary Metal Oxide Semiconductor (CMOS) or Low Voltage Transistor-Transistor Logic (LVTTL) I/O cells down to 1.2 V. This buffering also redrives the DDC and CEC signals, allowing the use of longer or cheaper HDMI cables with a higher capacitance. The internal hot plug drive module simplifies the application of the HDMI receiver to control the hot plug signal. All lines provide appropriate integrated pull-ups and pull-downs for HDMI compliance and backdrive protection to guarantee that HDMI interface signals are not pulled down if the system is powered down or enters Standby mode. Only a single external capacitor is required for operation.
1.2 Features and benefits
HDMI 2.0 and all backward compatible standards are supported 6.0 Gbps TMDS bit rate (600 Mcsc TMDS character rate) compatible Supports UHD 4k (2160p) 60 Hz display modes Impedance matched 100 differential transmission line ESD protection for TMDS lines (10 ). No Printed-Circuit Board (PCB) pre-compensation required Simplified flow-through routing utilizing less overall PCB space DDC capacitive decoupling between system side and HDMI connector side and buffering to drive cable with high capacitive load (> 700 pF/25 m) IP4787CZ32 DVI and HDMI interface ESD protection, DDC/CEC buffering, hot plug handling and backdrive protection Rev. 3 — 19 December 2014 Product data sheet HVQFN32
IP4787CZ32 Rev. 3 — 19 December 2014 2 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection All external I/O lines with ESD protection of at least 12 kV, exceeding the IEC 61000-4-2, level 4 standard Hot plug drive module Utility biasing module (HEAC compliant) CEC buffering and isolation, with integrated backdrive-protected 26 k pull-up Robust ESD protection without degradation after repeated ESD strikes Highest integration in a small footprint, PCB level, optimized RF routing, 32-pin HVQFN leadless package
1.3 Applications
The IP4787CZ32 can be used for a wide range of HDMI sink devices, consumer and computing electronics: Digital High-Definition (HD) TV Set-top box PC monitor Projector Multimedia audio amplifier HDMI picture performance quality enhancer module Digital Visual Interface (DVI)
2.1 Pinning
2.2 Pin description
Table 1. Pin description
1 TMDS_D2+_SYS TMDS to ASIC inside system
3 TMDS_D1+_SYS TMDS to ASIC inside system
5 TMDS_D0+_SYS TMDS to ASIC inside system
7 TMDS_CK+_SYS TMDS to ASIC inside system
9 DDC_CLK_SYS DDC clock system side
10 DDC_DAT_SYS DDC data system side
12 HOTPLUG_CON hot plug output to connector
13 HDMI_5V0_CON 5 V input from connector
14 DDC_DAT_CON DDC data connector side
15 DDC_CLK_CON DDC clock connector side
16 UTILITY_CON utility line ESD protection
17 TMDS_CK_CON TMDS ESD protection to connector
18 TMDS_CK+_CON TMDS ESD protection to connector
19 TMDS_D0_CON TMDS ESD protection to connector
20 TMDS_D0+_CON TMDS ESD protection to connector
21 TMDS_D1_CON TMDS ESD protection to connector
22 TMDS_D1+_CON TMDS ESD protection to connector
23 TMDS_D2_CON TMDS ESD protection to connector
24 TMDS_D2+_CON TMDS ESD protection to connector
25 CEC_CON CEC signal connector side
26 ESD_BYPASS ESD bias voltage
27 VCC(SYS) supply voltage for level shifting
28 ACTIVE CEC Standby mode control (LOW for lowest
29 CEC_SYS CEC I/O signal system side
30 ENABLE_LDO 5 V LDO enable
32 HOTPLUG_CTRL hot plug control input from system side
Table 2. Ordering information
IP4787CZ32 Rev. 3 — 19 December 2014 5 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection 4. Functional diagram Fig 2. Functional diagram n m aaa-004322 CEC driver ESDESD CEC_CONCEC_SYS 26 kΩ10 kΩ
3.3 V VOLTAGE
ESDHDMI_5V0_CON HDMI_5V0_CON ESD DDC_CLK_CONDDC_CLK_SYS 47 kΩ3.65 kΩ DDC driver ESDESD DDC_DAT_CONDDC_DAT_SYS 47 kΩ3.65 kΩ ESDESD HOTPLUG_CONHOTPLUG_CTRL 680 kΩ 100 kΩ Hot plug driver / bias Utility bias enable enCEC enLim enRef ESD ESD HDMI_5V0_CON POWER MANAGEMENT UNIT ESD ESD ACTIVE TMDS_CK+_SYS TMDS_CK+_CON TMDS_D0+_SYS TMDS_D0+_CON TMDS_D1+_SYS TMDS_D1+_CON TMDS_D2+_SYS TMDS_D2+_CON ibias 1..n vref 1..m INT_VCC(SYS) CURRENT-/VOLTAGE- REFERENCES ESD UTILITY_CON ESD ESD_BYPASS INT_5V0 INT_VCC(SYS) INT_VCC(SYS) INT_VCC(SYS) 680 kΩ INT_VCC(SYS) VCC(5V0) INT_5V0 VCC(SYS) VCC(SYS) INT_5V0VCC(SYS) 5V Control INT_5V0 ESD ENABLE_LDO
[1] Connector-side pins (typically d enoted with ‘_CON’ suffix) to ground. [2] System-side pins: CEC_SYS, DDC_DAT_SYS, DDC_CLK_SYS, HOTPLUG_CTRL, ACTIVE, V CC(SYS) and VCC(5V0). Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
[1] HDMI_5V0_CON is used as supply in case ENABLE_LDO is inactive and VCC(5V0) is unavailable or lower than HDMI_5V0_CON. [1] This parameter is guaranteed by design. [2] Capacitive dip at HDMI Time Domain Reflectometer (TDR) measurement conditions. [3] ANSI-ESD SP5.5.1-2004, ESD sensitivity testing Transmission Line Pulse (TLP) component level method 50 TDR. backdrive current leakage through the device to/from ASIC I/O pins connected to TMDS_x_SYS pins. Table 4. Supplies Tamb = 25 C to +85 C unless otherwise specified. Table 5. TMDS protection circuit amb = 25 C to +85 C unless otherwise specified.
[1] ANSI-ESD SP5.5.1-2004, ESD sensitivity testing TLP component level method 50 TDR. [2] I bck defines the current that flows from the VCC(5V0) pin into the system supply. This parameter is guaranteed by design. Table 6. HDMI_5V0_CON Tamb = 25 C to +85 C unless otherwise specified. Table 7. Static characteristics amb = 25 C to +85 C unless otherwise specified.
Table 7. Static characteristics …continued Tamb = 25 C to +85 C unless otherwise specified.
[1] The device is active if the input volt age at pin ACTIVE is above the HIGH level. [2] This parameter is guaranteed by design. [3] Capacitive load measured at power-on. [4] No external pull-up resistor attached. for details on the hot plug functionality. [1] The ACTIVE pin should be connected permanently to V CC(5V0) or VCC(SYS) if no enable control is needed. [2] DDC buffers, Hot Plug Detect (HPD) driver, utili ty bias and HDMI_5V0_CON out enabled; CEC buffer enabled. [3] DDC buffers, HPD driver, utility bias and HDMI_5V0_CON out disabled; CEC buffer enabled. [4] This parameter is guaranteed by design. Tamb = 25 C to +85 C unless otherwise specified. Table 8. Power management
times on connector side are determined by external 1.5 k and internal pull-up resistors. Table 9. Dynamic characteristics VCC(5V0) =5 . 0V ; VCC(SYS) = 1.8 V; GND = 0 V; Tamb = 25 C to +85 C unless otherwise specified.
IP4787CZ32 Rev. 3 — 19 December 2014 12 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection (1) Sdd21 (2) Scc21 Normalized to 100 ; differential pairs at signal pins. Fig 4. Mixed-mode differential and commo n-mode insertion loss; typical values (1) Sdd21; Near End Crosstalk (NEXT) (2) Sdd21; Far End Crosstalk (FEXT) normalized to 100 ; differential pairs CH1/CH2 versus CH3/CH4 Fig 5. Mixed-mode differential and common-mode NEXT / FEXT; typical values 018aaa086 f (Hz) 106 1010109107 108 Sdd21; Scc21 (dB) –15 (1) (2) 018aaa087 f (Hz) 106 1010109107 108 Sdd21 (dB) –15 (1) (2)
IP4787CZ32 Rev. 3 — 19 December 2014 13 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection
227 MHz pixel clock
Horizontal scale: 200 mV/div Vertical scale: 90 ps/div Offset: 42.6 mV Fig 6. Eye diagram using IP4787CZ32 (1080p, 12 bit)
297 MHz pixel clock
Horizontal scale: 200 mV/div Vertical scale: 67.5 ps/div Offset: 42.6 mV Fig 7. Eye diagram using IP4787CZ32 (1080p, 16 bit) DDD DDD
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148.5 MHz test frequency
Horizontal scale: 53.8 ps/div Vertical scale: 200 mV/div Measured at TP2 with worst cable emulator, reference cable equalizer and worst case negative skew Fig 8. Eye diagram using IP4787CZ32 (2160p, 60 Hz) Deviation from typical capacitance normalized at Vbias =2 . 5V Fig 9. Eye diagram using IP4787CZ32 (2160p, 60 Hz) aaa-013775 Vbias (V) 018aaa090 0.0 –0.2 0.2 0.4 Cline (pF) –0.4
IP4787CZ32 Rev. 3 — 19 December 2014 15 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection IEC 61000-4-5; tp =8 / 2 0s; positive pulse IEC 61000-4-5; t p =8 / 2 0s; negative pulse Fig 10. Dynamic resistance with positive clamping Fig 11. Dynamic resistance with negative clamping tp = 100 ns; TLP; signal pins; typical values tp = 100 ns; TLP; signal pins; typical values Fig 12. Dynamic resistance with positive clampi ng Fig 13. Dynamic resistance with negative clamping I (A) 018aaa091 3.50 3.25 3.75 4.00 VCL (V) 3.00 I (A) 018aaa092 1.5 2.0 2.5 V CL (V) 1.0 VCL (V) 62 2 1810 14 018aaa093 I (A) VCL (V) –12 0 –4–8 018aaa0940 I (A) –14 –12 –10
IP4787CZ32 Rev. 3 — 19 December 2014 16 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection (1) 5.3 V; maximum values; HDMI CTS TID 7-11 (2) 4.8 V; minimum values; HDMI CTS TID 7-11 (3) I = 0 mA (4) I = 55 mA (5) V CC(5V0) supply input; 4.925 V to 6.5 V Fig 14. Overvoltage limiter function (HDMI_5V0_CON) Fig 15. Overcurrent limiter function (HDMI_5V0_CON) 018aaa095 VCC(5V0) (V) 5.0 6.5 6.05.5 5.5 5.0 6.0 6.5 VI (V) 4.5 (1) (5) (4) (3) (2) IO (A) 018aaa096 2.0 4.0 6.0 V O (V) 0.0 (1) (4) (3) (2)
IP4787CZ32 Rev. 3 — 19 December 2014 17 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection 8. AC waveforms
8.1 DDC propagation delay
Fig 16. Propagation delay DDC, DDC sys tem side to DDC connector side Fig 17. Propagation delay DDC, DDC co nnector side to DDC system side DDD ''&V\\VWHPVLGH ''&FRQQHFWRUVLGH 9&& 6<6 ,17B9 9,/ 6<6 92/ 6<6 92/ &21 ,17B9 W3+/ W3/+ 9&& 6<6 ,17B9 DDD ''&V\\VWHPVLGH ''&FRQQHFWRUVLGH 9&& 6<6 ,17B9 9,/ &21 92/ 6<6 ,17B9 W3+/ W3/+ 9&& 6<6 9&& 6<6 ,17B9
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8.2 DDC transition time
Fig 18. Transition time DDC connector side Fig 19. Transition time DDC system side DDD ''&V\\VWHPVLGH ''&FRQQHFWRUVLGH 9,/ 6<6 ,17B9 ,17B9 ,17B9 9&& 6<6 92/ &21 W3+/ W3/+ DDD ''&V\\VWHPVLGH ''&FRQQHFWRUVLGH 9&& 6<6 9&& 6<6 9&& 6<6 9,/ &21 92/ 6<6 W3+/ W3/+ ,17B9
IP4787CZ32 Rev. 3 — 19 December 2014 19 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection 9. Application information
9.1 HDMI connector side ESD protection
All pins directly interfacing with the HDMI connector provide up to 12 kV contact ESD protection according to IEC 61000-4-2, exceeding level 4. In order to utilize the full scope of this protection it is recommended to connect all connector side pins to the HDMI connector.
9.2 TMDS ESD protection concept
To protect the TMDS lines and also to comply with the impedance requirements of the HDMI specification, the IP4787CZ32 provides ESD protection with matched TLC ESD structures. Typical Dual Rail Clamp (DRC) or rail-to-rail shunt structures are common for low-capacitance ESD protection (Figure 20; left side) where the dominant factor for the TMDS line impedance dip is determined by the capacitive load to ground. Parasitic lead inductances of the packaging in this case work against the ESD clamping performance by including the I/t reactance of the inductance into the path of the ESD shunt. The IP4787CZ32 utilizes these inherent inductances in series with the transmission line in order to present an effective capacitive load of roughly only 0.7 pF. This TLC structure minimizes the capacitive dip, for ideal signal integrity (Figure 20; right side) without complicated PCB pre-compensation. As a beneficial side effect, this enhances the ESD performance of the device as well, since the reactance of the series inductance attenuates the fast initial peak of the ESD pulse for a lower residual pulse delivered to the Application Specific Integrated Circuit (ASIC). a. Classic parallel ESD shunt protection b. Improved series shunt TLC clamping Fig 20. TLC ESD protection of TMDS lines 018aaa101 018aaa102
9.3 Operating and standby modes
device into full operating mode. operation as soon as the supplies are aviailable. the ASIC power supply rail is on. Table 10. IP4787CZ32 operating modes
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9.4 DDC circuit
The DDC bus circuit integrates all required pull-ups, and provides full capacitive decoupling between the HDMI connector and the DDC bus lines on the PCB. The capacitive decoupling ensures that the maximum capacitive load is well within the 50 pF maximum of the HDMI specification. No external pull-ups or pull-downs are required. The bidirectional buffers support high-capacitive load on the HDMI cable-side. Various non-compliant but prevalent low-cost cables have been observed with a capacitive load of up to 6 nF on the DDC lines, far exceeding the 700 pF HDMI limit. The IP4787CZ32 can easily decouple this from the weaker ASIC I/O buffers, and drive the rogue cable successfully. a. DDC clock b. DDC data Fig 21. DDC circuit Nȍ Nȍ (6'B%<3$66 ,17B9 ,17B9&& 6<6 DDD Nȍ Nȍ (6'B%<3$66 ,17B9 ,17B9&& 6<6 DDD (1) Valid I 2C signaling example on the cable (connector side) from 5 V (HIGH) to approximately 1 V (LOW). (2) Valid logic-level signaling example to the ASIC (system side) from 1.8 V (HIGH) to approximately 0.5 V (LOW). Fig 22. DDC level shifting waveform example time V (1) (2) 018aaa105
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9.5 CEC circuit
The logical multidrop topology of the CEC bus can include complex physical stubs, loading cables, and interconnects that may deteriorate signal quality. The IP4787CZ32 includes a full bidirectional buffer to drive the CEC bus and isolate the CEC microcontroller or ASIC General-Purpose Input/Output (GPIO). The CEC buffer derives power from an on-board 3.3 V regulator from the 5 V power domain (see Figure 23). This allows extensive system power management configurations and guarantees an HDMI-compliant V(CEC_CON) on the connector, as well as a backdrive-protected 125 A nominal CEC pull-up which does not degrade the bus when powered down. By placing the CEC microcontroller and either VCC(5V0) or HDMI_5V_CON input on a 5 V rail as shown in Figure 28, the CEC microcontroller can communicate over CEC for power commands, and then enable the HDMI port via the ACTIVE pin, as well as the rest of the system as needed. Fig 23. CEC module ,17B9 Nȍ Nȍ (6'B%<3$66 ,17B9&& 6<6 DDD
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9.6 Logic low I 2C voltage shifter
The DDC buffers provide an additional feature commonly required for high-integration HDMI ASICs which are limited to CMOS or LVTTL LOW-level input voltage (VIL) on their available I/O buffer cells. These I/Os are not strictly compliant with the 0.3 VDD threshold voltage levels of I2C and may miss intended logic LOW levels on the cable between 0.8 V and 1.5 V (typical values). This feature is also included in the CEC buffer thus allowing standard I/O buffer cells to be used in ASICs and microcontrollers connected to CEC_SYS. (1) V OL_CEC(max) maximum output voltage driven to system (ASIC) side when CEC is logic LOW (2) V OL_DDC(max) maximum output voltage driven to system (ASIC) side when DDC is logic LOW (3) V IL(max) maximum input voltage on system (ASIC) side to drive DDC or CEC logic LOW (4) V IH(min) minimum input voltage on system (ASIC) side to drive DDC or CEC logic HIGH Fig 24. Logic voltage thresholds as a function of supply voltage; on connector (HDMI) side DDD 9&& 6<6
IP4787CZ32 Rev. 3 — 19 December 2014 24 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection
9.7 Hot plug circuit
The IP4787CZ32 includes a hot plug drive circuit that simplifies the hot plug application. It drives an HDMI-compliant hot plug signal to the HDMI sink. By design, the hot plug drive circuit avoids glitches or short pulses on the hot plug line and is protected against shortage to the 5 V input. In order to signal a HIGH level on the HOTPLUG_CON output pin, the HOTPLUG_CTRL input pin needs to be driven HIGH and a 5 V supply needs to be available on HDMI_5V0_CON. Driving HOTPLUG_CTRL LOW generates a LOW-level output on the HOTPLUG_CON pin. An integrated 100 k resistor on the HOTPLUG_CTRL pin prevents from undefined (floating) state on HOTPLUG_CON. In full accordance with the HDMI specification, the LOW and HIGH output levels generated on the HOTPLUG_CON output always show a proper impedance of 1 k.
9.8 HEAC support and utility pin
In addition to the ESD protection implemented at UTILITY_CON, IP4787CZ32 also includes a biasing output for HEAC functionality. This output buffer is closely tied to the output on the HOTPLUG_CON pin. A LOW-level output signal on HOTPLUG_CON also causes a low output on UTILITY_CON and a HIGH level on HOTPLUG_CON results in an identical high output on UTILITY_CON. As for HOTPLUG_CON, the LOW and HIGH output levels generated on the UTILITY_CON output always show an impedance of 1 k. Fig 25. Hot plug circuit Nȍ Nȍ (6'B%<3$66 +'0,B9B&21 DDD &21752/ %/2&. Fig 26. Utility circuit Nȍ (6'B%<3$66 87,/,7<B&21 +'0,B9B&21 Nȍ +273/8*B&75/ DDD &21752/ %/2&.
IP4787CZ32 Rev. 3 — 19 December 2014 25 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection
9.9 EDID programming using ENABLE_LDO
IP4787CZ32 has a special mode providing an internal 5 V supply to the connector side power supply. This special mode allows programming of an Extended Display Identification Data Programmable Read-Only Memory (EDID PROM) placed on DDC bus between the device and the HDMI connector. The EDID programming mode can be utilized by driving an active HIGH signal to the ENABLE_LDO input pin. This enables an internal 5 V Low DropOut (LDO) to provide the supply on VCC(5V0) to HDMI_5V0_CON pin in case no higher supply is available at this pin. An active LOW input to ENABLE_LDO disables the EDID programming mode.
9.10 Backdrive protection
The HDMI connector contains various signals which can partly supply current into an HDMI device that is powered down. Typically, the DDC lines and the CEC signals can force significant current back into the powered-down rails as shown in Figure 27, causing power-on reset problems with the system, and possible damage. The IP4787CZ32 prevents this backdrive condition whenever the I/O voltage is greater than the local supply. Fig 27. Generalized backdrive protection 018aaa109 HDMI ASIC HDMI source supply off 5 V backdrive current I2C-bus ASIC HDMI sink
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9.11 Schematic view of application
Only a single external component (CO =1 F) is required to protect and interface the ASIC to a complete and compliant HDMI port. The 100 nF ESD bypass capacitor is optional. Fig 28. Schematic view of IP4787CZ32 application &(& +'0, &211(&725 +'0, $6,& ,3&= 3$' 87,/,7<B&21 70'6B'B&21 70'6B'B&21 70'6B'B&21 70'6B'B&21 70'6B'B&21 70'6B'B&21 70'6B&.B&21 70'6B&.B&21 &(&B&21 ''&B&/.B&21 ''&B'$7B&21 +273/8*B&21 +'0,B9B&21 ''&B&/.B6<6 ''&B'$7B6<6 +273/8*B&75/ 70'6B'B6<6 70'6B'B6<6 70'6B'B6<6 70'6B'B6<6 70'6B'B6<6 70'6B'B6<6 70'6B&.B6<6 70'6B&.B6<6 9'' 9WR9 6833/< 9WR96833/< &2 ) (6' E\\SDVV RSWLRQDO (1$%/(B/'2 DDD
IP4787CZ32 Rev. 3 — 19 December 2014 27 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection
9.12 Typical application
The IP4787CZ32 is designed to simplify routing to the HDMI connector, and ease the incorporation of high-level ESD protection into delicately balanced high-speed TMDS lines. These lines rely on tightly controlled microstrip or stripline transmission lines with minimal impedance discontinuities, which can deteriorate return loss, increase deterministic jitter and generally erode overall link signal integrity. Normally, when designing a PCB with standard shunt ESD clamps, careful consideration must be given to manual pre-compensation of the additional load of the added ESD component. With the IP4787CZ32 TLCs, the ESD suppressor is designed to maintain the characteristic impedance of the PCB microstrip or stripline. Therefore the designer has to be concerned only with the standard-controlled impedance of the unloaded PCB lines. This simplifies the task of the PCB designer, and minimizes the tuning cycles, which are sometimes required when pre-compensation misses the mark. A basic application diagram for the ESD protection of an HDMI interface is shown in Figure 29 for a type-A HDMI connector. The optimized HVQFN32 pinning simplifies the PCB design to keep the ESD protection close to the connector where it can minimize the coupling of the ESD pulse onto other lines in the system during a strike. Due to the integrated pull-up and pull-down resistors, only two external capacitors are required to implement a fully compliant HDMI port. Fig 29. Application of the IP4787CZ32 showing optimized HDMI type-A connector routing DDD PP
IP4787CZ32 Rev. 3 — 19 December 2014 28 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection 10. Package outline Fig 30. Package outline SOT617-3 (HVQFN32) ReferencesOutline version European projection Issue date IEC JEDEC JEITA SOT617-3 MO-220 sot617-3_po 11-06-14 11-06-21 Unit(1) mm max nom min 0.85 0.05 0.00 0.2 5.1 4.9 3.75 3.45 5.1 4.9 3.75 3.45 0.5 3.5 A Dimensions Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. HVQFN32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm SOT617-3 bc 0.30 0.18 D(1)A(1) Dh E(1) Eh ee 1 e2 L 3.5 vw 0.1 0.1 y 0.05 0.5 0.3 y 0.05 0 2.5 5 mm scale 1/2 e A CBv Cw terminal 1 index area A detail X yy1 Ce L Eh Dh e b 91 6 32 25 178 X D E C B A terminal 1 index area 1/2 e
IP4787CZ32 Rev. 3 — 19 December 2014 29 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection 11. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”.
11.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization.
11.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following:
- Through-hole components
- Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are:
- Board specifications, including the board finish, solder masks and vias
- Package footprints, including solder thieves and orientation
- The moisture sensitivity level of the packages
- Package placement
- Inspection and repair
- Lead-free soldering versus SnPb soldering
11.3 Wave soldering
Key characteristics in wave soldering are:
- Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave
- Solder bath specifications, including temperature and impurities
11.4 Reflow soldering
- Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 31) than a SnPb process, thus reducing the process window
- Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board
- Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 11 and 12 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 31.
Table 11. SnPb eutectic process (from J-STD-020D) Table 12. Lead-free process (from J-STD-020D)
IP4787CZ32 Rev. 3 — 19 December 2014 31 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 12. Glossary HDMI sink — Device which receives HDMI signals for example, a TV set. HDMI source — Device which transmits HDMI signal for example, DVD player. MSL: Moisture Sensitivity Level Fig 31. Temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = MSL limit, damage level peak temperature
Table 13. Revision history
Product data sheet Rev. 3 — 19 December 2014 33 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection 14. Legal information
14.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
14.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
14.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
Product data sheet Rev. 3 — 19 December 2014 34 of 35 NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors IP4787CZ32 DVI and HDMI interface ESD and overcurrent protection © NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 December 2014 Document identifier: IP4787CZ32 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 16. Contents