IP1844 SEME-LAB | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 6

Technical content

FEATURES

  • Guaranteed ±1% reference voltage tolerance
  • Guaranteed ±10% frequency tolerance
  • Low start–up current (<500 m A)
  • Under voltage lockout with hysteresis
  • Output state completely defined for all supply and input conditions
  • Interchangeable with UC1844 and UC1845 series for improved operation
  • 500kHz Oscillator operation 250kHz Output operation +30V Self limiting ±1A 5µJ –0.3V to +VCC 10mA 10mW/°C 725mW 7.25mW/°C 16mW/°C –65 to 150°C +300°C ABSOLUTE MAXIMUM RATINGS (Tcase = 25°C unless otherwise stated) TOP VIEW J Package – 8 Pin Ceramic DIP N Package – 8 Pin Plastic DIP COMP VREF GROUND OUTPUT R T /CT VCC ISENSE V FB TOP VIEW COMP VREF GROUND OUTPUT POWER GROUND N/C R T /CT ISENSE N/C N/C N/C VCCV FB VC VCC Supply Voltage (low impedance source) (ICC < 30mA) IO Output Current Output Energy (capacitive load) Analog Inputs (pins 2 and 3) Error Amp Output Sink Current P D Power Dissipation T amb = 25°C J, N Packages Derate @ Tamb > 50°C PD Power Dissipation T case = 25°C D Package Derate @ Tamb > 50°C PD Power Dissipation T case = 25°C J, N Packages Derate @ Tcase > 25°C TSTG Storage Temperature Range TL Lead Temperature (soldering, 10 seconds) Part J–Pack N–Pack D–8 D–14 Temp. Number 8 Pin 8 Pin 8 Pin 14 Pin Range IP1844 ✔ -55 to +125°C IP1845 ✔ -55 to +125°C Order Information Note: To order, add the package identifier to the part number. eg. IP1844D–14 IP3845J

DESCRIPTION

The IP1844 and IP1845 series of switching regulator control circuits contain all the functions necessary to implement off-line, current mode switching regulators, using a minimum number of external parts. Functions included are voltage reference, error amplifier, current sense comparator, oscillator, totem-pole output driver and under-voltage lockout circuitry. In addition there is a toggle flip-flop which blanks the output on every second clock pulse, thereby ensuring that the duty cycle never exceeds 50%. Although pin compatible with the UC1844 and UC1845 series, SEMELAB has incorporated several improvements in the IP1844 and IP1845 series allowing tighter and more complete specification of electrical performance . BLOCK DIAGRAM Values in brackets are for IP1845 series. 3.6V ERROR AMP OSCILLATOR R 1V R S PWM LATCH CURRENT SENSE COMPARATOR 16V (8.4V) (0.5V) 2.5V UNDER–VOLTAGE LOCKOUT ENABLE REFERENCE REGULATOR INTERNAL BIAS 34V REG R S V STATUS LATCH REF T Q TOGGLE FLIP FLOP PIN NUMBERS 1st Number 2nd Number – N, J and 8 Pin D Packages – 14 Pin D Package. C OMP G ND VCC ISENSE V FB /CR TT OUTPUT POWER GROUND VREF VC 4/7 6/10 VCC Supply Voltage IO Output Current Analog Inputs (pins 2 and 3) Error Amp Output Sink Current IP1844 , IP1845 Operating Ambient Temperature Range IP2844 , IP2845 IP3844 , IP3845 ≤ 30V 0 to ±200mA –0.3V to 3V 0 to 2mA –55 to 125°C –25 to 85°C 0 to 70°C RECOMMENDED OPERATING CONDITIONS

4.90 5.00 5.10 62 0 62 5 0.2 0.4 4.82 5.18 52 5 30 80 160 47 52 57 0.2 1 1.7 8.3 2.42 2.50 2.58 –0.3 –2 65 90 0.7 1 60 70 –0.5 –0.8 5.0 6.0 0.7 1.1 4.95 5.00 5.05 62 0 62 5 0.2 0.4 4.90 5.10 52 5 30 80 160 47 52 57 0.2 1 1.7 8.3 2.45 2.50 2.55 –0.3 –1 65 90 0.7 1 60 70 –0.5 –0.8 5.0 6.0 0.7 1.1 IP1844/IP1845 IP3844 IP2844/IP2845 IP3845 Output Voltage Input Regulation Output Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit Current Frequency Voltage stability Temperature Stability Amplitude Discharge Current Input Voltage Input Bias Current Open Loop Voltage Gain Unity Gain Bandwidth Supply Voltage Rejection Output Sink Current Output Source Current V OUT High VOUT Low IO = 1mA T J = 25°C VCC = 12V to 25V IO = 1mA to 20mA Line, Load, Temp f = 10Hz to 10kHz TJ = 25°C TJ = 125°C @ 1000Hrs VREF = 0 TJ = 25°C VCC = 12V to 25V ΔTA = Min to Max VPIN4 Peak to Peak TJ = 25°C ΔTA = Min to Max VPIN1 = 2.5V VO = 2V to 4V VCC = 12V to 25V VPIN2 = 2.7V V PIN1 = 1.1V VPIN2 = 2.3V V PIN1 = 5.0V VPIN2 = 2.3V R L = 15kΩ VPIN2 = 2.7V R L = 15kΩ V mV mV V µV mV mA kHz V mA V µA dB MHz dB mA V ELECTRICAL CHARACTERISTICS (Over Full Operating Temperature Range unless otherwise stated) REFERENCE SECTION OSCILLATOR SECTION ERROR AMP SECTION NOTES 1. Test Conditions unless otherwise stated: VCC = 15V* , RT = 10kΩ , CT = 3.3nF , f = 52kHz. *Adjust VCC above start threshold before setting at required level. All specifications apply over the full operating temperature range unless otherwise stated. (See Ordering Information for further details).

2.85 3 3.15 0.9 1 1.1 60 70 –2 –10 150 300 0.1 0.4 1.5 2.2 13 13.5 12 13.5 50 150 50 150 0.7 1.1 14.5 16 17.5 7.8 8.4 9 8.5 10 11.5 7 7.6 8.2 0.3 0.5 11 15 14 17 30 34 40 46 48 50 2.85 3 3.15 0.9 1 1.1 60 70 –2 –10 150 300 0.1 0.4 1.5 2.2 13 13.5 12 13.5 50 150 50 150 0.7 1.1 15 16 17 7.8 8.4 9 91 0 1 1 7 7.6 8.2 0.3 0.5 11 15 14 17 30 34 40 47 48 50 Gain Maximum Input Signal Supply Voltage Rejection Input Bias Current Delay to Output Output Low Level Output High Level Rise Time Fall Time UVLO Saturation Upper Threshold CC ) Lower Threshold CC ) Start–up Current Operating Supply Current V CC Zener Voltage Maximum Duty Cycle Minimum Duty Cycle See Notes 2,3 VPIN1 = 5.0V (Note 2) VC = 12V to 25V ISINK = 20mA ISINK = 200mA ISOURCE = 20mA ISOURCE = 200mA C L = 1nF C L = 1nF VCC = 6V I L = 1mA

1844 Series

1845 Series

V PIN2 = 0V 1844 Series VPIN3 = 0V 1845 Series ICC = 25mA V/V V dB µA ns V V ns V V V mA mA V LAB SEME IP1844 SERIES IP1845 SERIES ELECTRICAL CHARACTERISTICS (Over Full Operating Temperature Range unless otherwise stated) CURRENT SENSE SECTION OUTPUT SECTION UNDER–VOLTAGE LOCKOUT SECTION PWM SECTION NOTES 1. Test Conditions unless otherwise stated: VCC = 15V* , RT = 10kΩ , CT = 3.3nF , f = 52kHz. *Adjust VCC above start threshold before setting at required level. All specifications apply over the full operating temperature range unless otherwise stated. (See Ordering Information for further details). 2. Parameter measured at trip point of latch with VPIN2 = 0V 3. Gain defined as: ΔVPIN1A = ΔVPIN3 0 ≤ VPIN3 ≤ 0.8 TOTAL STANDBY CURRENT

(Pin 7 for 14 Pin D Package) 5GND REFV RCTT C T R T Internal Clock Internal Clock Output – Max. Duty Cycle V - Pin 6 (Pin 10 for 14 Pin D Package) Output – Max. Duty Cycle V - Pin 6 (Pin 10 for 14 Pin D Package) V - Pin 4 (Pin 7 for 14 Pin D Package) LARGE SMALL R T C T LARGE SMALL R T C T Oscillator Waveforms and Maximum Duty Cycle Oscillator timing capacitor CT is charged by VREF through RT and discharged by an internal current source. During the discharge time, the internal clock signal blanks the output to the low state. Selection of R T and CT therefore determines both oscillator frequency and maximum duty cycle. Charge and discharge times are determined by the formulae: tc ≈ 0.55 RTC T td ≈ R TC T Rn 1Resultant frequency f =(tc + td) For RT > 5kΩ , 1.8Resultant frequency f ≈ (RTC T) .0063 RT – 2.3 .0063 – 4( )

Open–Loop Laboratory Test Fixture 100 10 1k 100 10k 10M 100k 1M.05 .5.03 .3 OUTPUT CURRENT, SOURCE / SINK (A) FREQUENCY (Hz) SATURATION VOLTAGE (V) VOLTAGE GAIN (dB) OUTPUT SATURATION CHARACTERISTICS ERROR AMPLIFIER OPEN-LOOP FREQUENCY RESPONSE V = 15VCC T = 25˚CA A V /G66 SOURCE SAT V - )CC VOH SINK SAT (V )OL AT = –55˚C –45 –90 –135 –180 PHASE (˚) TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION High peak current associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5K potentiometer are used to sample the oscillator wave form and apply an adjustable ramp to pin 3. 0.1 µF 1kΩ 1kW 1kΩ ERROR AMP ADJUST 4.7kΩ 5kΩ ADJUST 4.7kΩ 100kΩ 2N2222 ISENSE R T C T 0.1 µF VREF VCC OUTPUT GROUND

36 ISENSE

0.5 1051 5 2 0 0 0.5 52.5 7.5 10 UNDER VOLTAGE LOCKOUT V (V)CC I (mA)CC V (V)CC I (m A)CC