IP1524 SEME-LAB | Alldatasheet
Document overview
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Technical content
FEATURES
- Guaranteed ±2% reference voltage tolerance
- Guaranteed ±6% oscillator tolerance
- Fully specified temperature performance
- Guaranteed 10mV/1000 hours long term stability
- Interchangeable with SG1524 series +V IN Input Voltage Collector Voltage Output Current (each transistor) Reference Load Current Oscillator Charging Current Shut Down Pin Voltage Current Limit Sense Common Mode Range P D Power Dissipation T A = 25°C Derate @ TA > 50°C PD Power Dissipation T C = 25°C Derate @ TC > 25°C TJ Operating Junction Temperature TSTG Storage Temperature Range TL Lead Temperature (soldering, 10 seconds) +40V +40V 100mA Internally Limited 5mA +5.5V –1.0 to +1.0V 10mW/°C 16mW/°C See Ordering Information –65 to +150°C +300°C ABSOLUTE MAXIMUM RATINGS (Tcase = 25°C unless otherwise stated) TOP VIEW J Package – 16 Pin Ceramic DIP N Package – 16 Pin Plastic DIP D Package – 16 Pin Plastic (150) SOIC INV. INPUT N. I. INPUT OSC. OUTPUT +C.L. SENSE –C.L. SENSE R T C T GROUND VREF VIN EB CB CA EA SHUTDOWN COMPENSATION Part J–Pack N–Pack D–16 Temp. Number 16 Pin 16 Pin 16 Pin Range IP1524 ✔ -55 to +125°C IP3524 ✔✔✔ 0 to +70°C Order Information Note: To order, add the package identifier to the part number. eg. IP1524J IP3524D–16
V R C +5V TO ALL INTERNAL CIRCUITRY INV. INPUT ERROR AMP REFERENCE REGULATOR OSCILLATOR OSCILLATOR OUTPUT FLIP FLOP COMPARATOR +5V NOR NOR SHUTDOWN C E C E +5V C.L. N.I. INPUT GND (SUBSTRATE) COMPENSATION +SENSE –SENSE+5V IN T T A A B B 1kΩ 10kΩ +8 to +40V 0 to +40V +1.8 to +3.4V 0 to 100mA 0 to 20mA 30µA to 2mA 50Hz to 500kHz 1.8kΩ to 100kΩ 1nF to 0.1µF –55 to +125°C -25 to +85°C 0 to +70°C RECOMMENDED OPERATING CONDITIONS
DESCRIPTION
The IP1524 series of PWM switching regulator control circuits contains all the functions required to implement single- ended or push-pull switching regulators. Included are voltage reference, error amplifer, oscillator, PWM comparator, output drivers, current limiting and shutdown circuitry. Although functionally indentical to the SG1524 series, SEMELAB has incorporated several improvements to the IP1524 allowing tighter and more complete specification of electrical performance. BLOCK DIAGRAM VIN Input Voltage Collector Voltage Error Amp Common Mode Range Output Current (each transistor) Reference Load Current Oscillator Charging Current Oscillator Frequency Range R T Oscillator Timing Resistor C T Oscillator Timing Capacitor TAMB Operating Ambient Temperature Range IP1524 IP2524 IP3524
- Test Conditions unless otherwise stated: VIN = 20V , IREF = 0. 2. VCM = +1.8 to +3.4V 3. VCM = -1 to +1V LAB SEME IP1524 SERIES 4.60 5.00 5.40 10 30 20 50 100 0.3 1 0.5 1 120 300 3.6 3.5 0.5 21 0 11 0 60 80 0.5 3.8 4.90 5.00 5.10 11 0 52 0 25 50 120 0.3 1 11 0 0.1 1 120 240 200 300 3.6 0.6 1 3.0 4.0 0.3 0.5 1.0 0.1 5 0.5 72 80 0.5 3.8 70 90 70 100 IP1524 IP2524 IP3524 Output Voltage Line Regulation Load Regulation Ripple Rejection Short Circuit Current Temperature Stability Long Term Stability Initial Accuracy Voltage Stability Temperature Stability Minimum Frequency Maximum Frequency Sawtooth Peak Voltage Sawtooth Valley Voltage Clock Amplitude Clock Pulse Width Input Offset Voltage Input Bias Current Input Offset Current DC Open Loop Gain Output Low Level Output High Level Common Mode Rejection Supply Voltage Rejection Gain Bandwidth Product T J = Over Temp. Range +VIN = 8 to 40V TJ = Over Temp. Range IL = 0 to 20mA T J = Over Temp. Range f = 120Hz V REF = 0 T J = Over Temp. Range TJ = Over Temp. Range TJ = 125°C R T = 2.7kΩ C T = 0.01µF +V IN = 8 to 40V TJ = Over Temp. Range R T = 100kΩ C T = 0.1µF TJ = Over Temp. Range R T = 2kΩ C T = 0.001µF TJ = Over Temp. Range C T = 0.01µF C T = 0.01µF Output, Pin 3 C T = 0.01µF TJ = Over Temp. Range Output, Pin 3 C T = 0.01µF TJ = Over Temp. Range TJ = Over Temp. Range TJ = Over Temp. Range TJ = Over Temp. Range VPIN1 – VPIN2 ≥ 150mV VPIN2 – VPIN2 ≥ 150mV +VIN = 8 to 40V V mV dB mA mV khr Hz kHz V V µs mV µA dB V dB MHz ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise stated) ERROR AMP SECTION 2 REFERENCE SECTION OSCILLATOR SECTION
- Test Conditions unless otherwise stated: VIN = 20V , IREF = 0. 2. VCM = +1.8 to +3.4V 3. VCM = -1 to +1V IP1524 IP2524 IP3524 45 49 180 200 220 200 1.2 0.3 0.1 50 17 18 0.2 0.1 51 0 45 49 190 200 210 170 200 230 1.2 0.3 0.1 50 17 18 0.2 0.4 0.1 0.2 51 0 Minimum Duty Cycle Maximum Duty Cycle Sense Voltage High Input Voltage High Input Current Low Input Voltage Collector – Emitter Voltage Collector Leakage Current Collector Saturation Voltage Emitter Output Voltage Emitter Voltage Rise Time Collector Voltage Fall Time Standby Current V PIN1 – VPIN2 ≥ 150mV TJ = Over Temp. Range VPIN2 – VPIN1 ≥ 150mV TJ = Over Temp. Range VCM = 0 VCM = 0 T J = Over Temp. Range VPIN9 ≤ 0.6V T J = Over Temp. Range VSHUTDOWN = +5V TJ = Over Temp. Range VPIN9 ≥ 3.5V T J = Over Temp. Range IC = 50µAT J = Over Temp. Range VCE = 40V T J = Over Temp. Range IC = 50mA T J = Over Temp. Range VIN = 20V T J = Over Temp. Range R E = 2kΩ R C = 2kΩ VIN = 40V T J = Over Temp. Range mV V mA V V µA V V µs mA LAB SEME IP1524 SERIES ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise stated) PWM COMPARATOR POWER CONSUMPTION CURRENT LIMIT AMPLIFIER 3 SHUTDOWN INPUT OUTPUT SECTION (each transistor)
The IP1524 is a fixed-frequency pulse-width modulation voltage regulator control circuit. The regulator operates at a frequency that is programmed by one timing resistor (R T) and one timing capacitor (CT). RT establishes a constant charging current for CT, which is fed to the comparator providing linear control of the output pulse width by the error amplifier. The IP1524 contains an on-board 5V regulator that serves as a reference as well as powering the IP1524’s internal control circuitry and is also useful in supplying external support functions. This reference voltage is lowered externally by a resistor divider to provide a reference within the common-mode range of the error amplifier or an external reference may be used. The power supply output is sensed by a second resistor divider network to generate a feedback signal to the error amplifier. The amplifier output voltage is then compared to the linear voltage ramp at C T. The resulting modulated pulse out of the high-gain comparator is then steered to the appropriate output pass transistor (Q 1 or Q2) by the pulse-steering flip-flop, which is synchronously toggled by the oscillator output. The oscillator output pulse also serves as a blanking pulse to assure both outputs are never on simultaneously during the transition times. The width of the blanking pulse is controlled by the value of C The outputs may be applied in a push-pull configuration in which their frequency is half that of the base oscillator, or paralleled for single-ended applications in which the frequency is equal to that of the oscillator. The output of the error amplifier shares a common input to the comparator with the current limiting and shutdown circuitry and can be overridden by signals from either of these inputs. This common point is also available externally and may be employed to control the gain of, or to compensate, the error amplifier, or to provide additional control to the regulator. REFV R T C T INV. N.I. OSC. SH.DOWN COMP. C A E A E B C B C +L C -L INV GND +28V RETURN GND +5V 0.1µF 0.02µF 0.1Ω 500 µF 1N3880 Ω5k Ω5k Ω5k Ω5k Ω3k 0.001 µF Ω68 Ω150 Ω2k Ω50k 0.9mH REFV R T C T INV. N.I. OSC. SH.DOWN COMP. C A E A E B C B C +L C -L INV GND +28V RETURN 0.1µF 0.01µF Ω5k Ω5k Ω5k Ω5k 0.001µF 1mH Ω2k Ω20k Ω1k Ω1k Ω1k Ω1k T T 100 µF0.1Ω T T 100 µF In this conventional single-ended regulator circuit, the two outputs of the IP1524 are connected in parallel for effective 0-90% duty cycle modulation. The use of an output inductor requires an R-C phase compensation network for loop stability. Push-pull outputs are used in this transformer-coupled DC-DC regulating converter. Note that the oscillator must be set at twice the desired output frequency as the IP1524’s internal flip-flop divides the frequency by 2 as it switches the PWM signal from one output to the other. Current limiting is done in the primary so that the pulse width will be reduced should transformer saturation occur.
OPEN LOOP VOLTAGE AMPLIFICATION (dB) -10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) R = 300kΩL R = 100kΩL INV = 20V JT = 25˚C Note: Value of R below 30kΩ will begin to limit the maximum duty cycle. L R = ∞L R = 1MΩL R = 30kΩL 1 2 5 10 20 50 100 100 10k 100k OSCILLATOR FREQUENCY (Hz) R TIMING RESISTOR (kΩ ) INV = 20V JT = 25˚C T C = 0.1µF C = 0.03µF C = 0.01µF C = 0.003µF C = 0.001µF T T T T T TYPICAL PERFORMANCE CHARACTERISTICS Open-Loop Voltage Amplification of Error Amplifier vs. Frequency Oscillator Frequency vs. Timing Components OUTPUT DEAD TIME ( µs) 0.001 0.01 0.1 0.1 C TIMING CAPACITOR ( µF)T INV = 20V JT = 25˚C Note: Dead Time = Oscillator output pulse width plus output delay. J COLLECTOR – EMITTER VOLTAGE (V) 0 2 04 06 08 0 1 0 0 LOAD CURRENT (mA) INV = 20V T = 125˚C T = 25˚C J T = -55˚C J Output Dead Time vs. Timing Capacitance Value Output Saturation Voltage vs. Load Current