IMP708RCSA

IMP706P A1PROS | Alldatasheet

Document overview

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Technical content

© 1999 IMP , Inc. 408-432-9100/www.impweb.com 1 Key Features

Applications

u Computers and controllers u CTI applications u Embedded controllers u Battery operated systems u Intelligent instruments u Wireless communication systems u PDAs and handheld equipment u Lower power, pin compatible replacements for Maxim MAX706P/R/S/T, MAX708R/S/T – 30% lower supply current:140µA vs. 200µA u Precision power supply monitor – 2.63V threshold (IMP706P/R, IMP708R) – 2.93V threshold (IMP706S, IMP708S) – 3.08V threshold (IMP706T, IMP708T) – New 4.00V threshold (IMP706J, IMP708J) u Debounced manual reset input u Auxiliary voltage monitor comparator – 1.25V threshold – Battery monitor/auxiliary supply monitor u Watchdog timer (IMP706P/R/S/T/J) – Watchdog can be disabled by floating WDI u 200ms reset time delay u Three reset signal options – Active HIGH: IMP706P – Active LOW: IMP706R/S/T/J – Active HIGH & LOW outputs: IMP708R/S/T/J u DIP, SO and MicroSO packages u Guaranteed RESET assertion to V CC = 1.1V Block Diagrams IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J POWER MANAGEMENT 3/3.3/4.0V 3/3.3/4.0V µµP SuperP Supervisor Cirvisor Circuitscuits – Lo– Lo w supplw suppl y cury cur rrentent – W– W atcatc hdog timerhdog timer – Br– Br oownout detwnout det ectionection The IMP706P/R/S/T/J and IMP708R/S/T/J CMOS supervisor circuits monitor power-supply and battery voltage level, and mP/mC operation. A reset is generated when the supply drops below 2.63V (IMP706P/R, IMP708R), 2.93V (IMP706S, IMP708S), 3.08V (IMP706T, IMP708T) or 4.00 (IMP706J, IMP708J). The family offers several functional options. Each device generates a reset signal during power-up, power-down and during brownout conditions. In addition, the IMP706P/R/S/T/J feature a 1.6 second watchdog timer. The watchdog timer output will trigger a reset if connected to MR. Unlike competitive devices, floating the WDI input pin disables the watchdog timer. The IMP708R/S/T/J have both active-HIGH and active-LOW reset out- puts but no watchdog function. The IMP706P has the same pin-out and functions as the IMP706R but has an active-HIGH reset output. A versatile power-fail circuit, useful in checking battery levels and non-5V supplies, has a 1.25V threshold. All devices have a manual reset input. All devices are available in 8-pin DIP , SO and the compact MicroSO packages. The MicroSO package requires 50% less PC board area than the conventional SO package. RESET RESET VCC RESET Generator 2.63V (IMP708R) 2.93V (IMP708S) 3.08V (IMP708T) 4.00V (IMP708J) VCC + – MR IMP708R/S/T/J PFO GND 1.25V – +PFI 706P_02.eps 20kΩ 1.25V – MR WDI IMP706P/R/S/T/J WDO RESET (RESET) IMP706P PFO GND VCC 20kΩ RESET Generator 2.63V (IMP706P/R) 2.93V (IMP706S) 3.08V (IMP706T) 4.00V (IMP706J) VCC + – PFI Timebase Watchdog Timer Transition Detector 706P_01.eps

2 408-432-9100/www.impweb.com © 1999 IMP, Inc.

Ordering Information

IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J IMP708R/S/T/J MR VCC GND PFI RESET RESET NC PFO IMP706P MR VCC GND PFI WDO RESET WDI PFO IMP706R/S/T/J MR VCC GND PFI WDO RESET WDI PFO IMP706P IMP706R/S/T/J (RESET) RESET (IMP706P) WDO MR VCC WDI PFO PFI GND IMP708R/S/T/J RESET RESET MR VCC NC PFO PFI GND 706P_03.eps DIP/SO MicroSO Operating Part Number Package Temperature Range Reset Threshold Reset Polarity Watchdog Timer IMP706PCP A 8-Plastic DIP 0°C to +70°C 2.63 HIGH YES IMP706PCSA 8-SO 0°C to +70°C 2.63 HIGH YES IMP706PCUA 8-MicroSO 0°C to +70°C 2.63 HIGH YES IMP706PEP A 8-Plastic DIP –40°C to +85°C 2.63 HIGH YES IMP706PESA 8-SO –40°C to +85°C 2.63 HIGH YES IMP706RCP A 8-Plastic DIP 0°C to +70°C 2.63 LOW YES IMP706RCSA 8-SO 0°C to +70°C 2.63 LOW YES IMP706RCUA 8-MicroSO 0°C to +70°C 2.63 LOW YES IMP706REP A 8-Plastic DIP –40°C to +85°C 2.63 LOW YES IMP706RESA 8-SO –40°C to +85°C 2.63 LOW YES IMP706SCP A 8-Plastic DIP 0°C to +70°C 2.93 LOW YES IMP706SCSA 8-SO 0°C to +70°C 2.93 LOW YES IMP706SCUA 8-MicroSO 0°C to +70°C 2.93 LOW YES IMP706SEP A 8-Plastic DIP –40°C to +85°C 2.93 LOW YES IMP706SESA 8-SO –40°C to +85°C 2.93 LOW YES IMP706TCP A 8-Plastic DIP 0°C to +70°C 3.08 LOW YES IMP706TCSA 8-SO 0°C to +70°C 3.08 LOW YES IMP706TCUA 8-MicroSO 0°C to +70°C 3.08 LOW YES IMP706TEP A 8-Plastic DIP –40°C to +85°C 3.08 LOW YES IMP706TESA 8-SO –40°C to +85°C 3.08 LOW YES IMP706JCP A 8-Plastic DIP 0°C to +70°C 4.00 LOW YES IMP706JCSA 8-SO 0°C to +70°C 4.00 LOW YES IMP706JCUA 8-MicroSO 0°C to +70°C 4.00 LOW YES IMP706JEP A 8-Plastic DIP –40°C to +85°C 4.00 LOW YES IMP706JESA 8-SO –40°C to +85°C 4.00 LOW YES IMP708RCP A 8-Plastic DIP 0°C to +70°C 2.63 Dual: HIGH & LOW NO IMP708RCSA 8-SO 0°C to +70°C 2.63 Dual: HIGH & LOW NO IMP708RCUA 8-MicroSO 0°C to +70°C 2.63 Dual: HIGH & LOW NO IMP708REP A 8-Plastic DIP –40°C to +85°C 2.63 Dual: HIGH & LOW NO IMP708RESA 8-SO –40°C to +85°C 2.63 Dual: HIGH & LOW NO IMP708SCP A 8-Plastic DIP 0°C to +70°C 2.93 Dual: HIGH & LOW NO IMP708SCSA 8-SO 0°C to +70°C 2.93 Dual: HIGH & LOW NO IMP708SCUA 8-MicroSO 0°C to +70°C 2.93 Dual: HIGH & LOW NO IMP708SEP A 8-Plastic DIP –40°C to +85°C 2.93 Dual: HIGH & LOW NO IMP708SESA 8-SO –40°C to +85°C 2.93 Dual: HIGH & LOW NO IMP708TCP A 8-Plastic DIP 0°C to +70°C 3.08 Dual: HIGH & LOW NO IMP708TCSA 8-SO 0°C to +70°C 3.08 Dual: HIGH & LOW NO IMP708TCUA 8-MicroSO 0°C to +70°C 3.08 Dual: HIGH & LOW NO IMP708TEP A 8-Plastic DIP –40°C to +85°C 3.08 Dual: HIGH & LOW NO IMP708TESA 8-SO –40°C to +85°C 3.08 Dual: HIGH & LOW NO IMP708JCP A 8-Plastic DIP 0°C to +70°C 4.00 Dual: HIGH & LOW NO IMP708JCSA 8-SO 0°C to +70°C 4.00 Dual: HIGH & LOW NO IMP708JCUA 8-MicroSO 0°C to +70°C 4.00 Dual: HIGH & LOW NO IMP708JEP A 8-Plastic DIP –40°C to +85°C 4.00 Dual: HIGH & LOW NO IMP708JESA 8-SO –40°C to +85°C 4.00 Dual: HIGH & LOW NO

© 1999 IMP , Inc. 408-432-9100/www.impweb.com 3 IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J Absolute Maximum Ratings

Electrical Characteristics

Pin Terminal Voltage with Respect to Ground Rate of Rise at V (Derate 9mW/°C above 70°C) (Derate 5.9mW/°C above 70°C) (Derate 4.1mW/°C above 70°C) Operating Temperature Range These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. Unless otherwise noted, specifications are over the operating temperature range and V CC supply voltages are 2.7V to 5.5V (IMP706P , retemaraPl obmySs noitidnoCn iMp yTx aMs tinU egatloVgnitarepO egnaR V CC Cx807PMI,Cx607PMI Ex807PMI,Ex607PMI 1.1 2.1 5.5 5.5 V tnerruCylppuS V CC V6.3< I CC V=RM,Ex607PMI,Cx607PMI CC gnitaolFIDW,5 70 41 µA V=RM,Ex807PMI,Cx807PMI CC gnitaolFIDW,0 50 41 tnerruCylppuS V CC V5.5< I CC V=RM,Ex607PMI,Cx607PMI CC gnitaolFIDW,5 70 41 µA V=RM,Ex807PMI,Cx807PMI CC gnitaolFIDW,0 50 41 dlohserhTTESERV TR secivedRdnaP secivedS secivedT secivedJ 55.2 58.2 00.3 98.3 36.2 39.2 80.3 00.4 07.2 00.3 51.3 01.4 V dlohserhTTESER siseretsyH 04V m htdiWesluPTESERt SR V CC ,)secivedR/P,8/607PMI(V3= V CC )secivedT/S,8/607PMI(V3.3= V CC )secivedJ,8/607PMI(V4.4= 0410 020 82s m V CC V5=0 02 htdiWesluPRMt RM V<V5.4 CC V5.5<0 51s n V<V6.3 CC )secivedJ8/607PMI(V5.4< V )XAM(TSR V< CC )secivedT/S/R/P8/607PMI(V6.3< 005 yaleDtuOTESERotRMt DM V<V6.3 CC )secivedJ8/607PMI(V5.4< V )XAM(TSR V< CC )secivedT/S/R/P8/607PMI(V6.3< 057s n V<V5.4 CC V5.5<0 52 dlohserhTtupnIRMV HI V )XAM(TSR V< CC V5.4<V 7.0 CC V V LI V )XAM(TSR V< CC V5.4<6 .0 V HI V<V5.4 CC V5.5<0 .2 V LI V<V5.4 CC V5.5<8 .0 rotsiseRpu-lluPRMR P 010 20 4k Ω egatloVtuptuOTESER )secivedJ/T/S/RllA( V HO I ECRUOS 008= µ V<V5.4,A CC V5.5<V CC V5.1–V V LO I KNIS V<V5.4,Am2.3= CC V5.5<4 .0 V HO I ECRUOS 005= µ V,A )XAM(TSR V< CC V5.4<V 8.0 CC V LO I KNIS V,Am2.1= )XAM(TSR V< CC V5.4<3 .0 V LO I KNIS 05= µ V,A CC )secivedCx807PMI,Cx607PMI(V1.1=3 .0 I KNIS 001= µ V,A CC )secivedEx807PMI,Ex607PMI(V2.1=3 .0

IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J 4 408-432-9100/www.impweb.com © 1999 IMP, Inc. Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (IMP706P, Electrical Characteristics (cont.) retemaraP lobmyS snoitidnoC niM pyT xaM stinU egatloVtuptuOTESER P607PMI V HO I ECRUOS 008= µ V<V5.4,A CC V5.5< V CC V5.1– V V LO I KNIS V<V5.4,Am2.3= CC V5.5< 4.0 V HO I ECRUOS 005= µ V,A )XAM(TSR V< CC V6.3< V8.0 CC V LO I KNIS V,Am2.1= )XAM(TSR V< CC V6.3< 3.0 ,egatloVtuptuOTESER J/T/S/R807PMI V HO I ECRUOS 008= µ V<V5.4,A CC V5.5< V CC V5.1– V V LO I KNIS V<V5.4,Am2.3= CC V5.5< 4.0 V HO I ECRUOS 005= µ V,A )XAM(TSR V< CC V5.4< V8.0 CC V LO I KNIS V,Am2.1= )XAM(TSR V< CC V5.4< 3.0 doirePtuoemiTgodhctaW t DW V CC )secivedR/P,607PMI(V3= V CC )secivedT/S,607PMI(V3.3= V CC )secivedJ,607PMI(V4.4= 0.1 6.1 52.2 s htdiWesluPIDW t PW V LI V,V4.0= HI V8.0= CC V, )XAM(TSR V< CC V5.4< 001 sn htdiWesluPIDW t PW V LI V,V4.0= HI V8.0= CC V<V5.4, CC V5.5< 05 sn dlohserhTtupnIIDW V HI V CC V5= 5.3 V V LI 8.0 V HI V )XAM(TSR V< CC V5.4< V7.0 CC V LI 6.0 tnerruCtupnIIDW V=IDW CC ylnO607PMI, 05 051 µA tnerruCtupnIIDW ylnO607PMI,V0=IDW 051– 05– µA egatloVtuptuOODW V HO I ECRUOS 008= µ V<V5.4,A CC V5.5< V CC V5.1– V V LO I KNIS V<V5.4,Am2.1= CC V5.5< 4.0 V HO I ECRUOS 005= µ V,A )XAM(TSR V< CC V5.4< V8.0 CC V LO I KNIS 005= µ V,A )XAM(TSR V< CC V5.4< 3.0 dlohserhTtupnIIFP VsecivedR/ProF.gnillafIFP CC T/SroF.V3= Vsecived CC VsecivedJroF.V3.3= CC .V4.4= 2.1 52.1 3.1 V tnerruCtupnIIFP 52– 10.0 52 An egatloVtuptuOOFP V HO I ECRUOS 008= µ V<V5.4,A CC V5.5< V CC V5.1– V V LO I KNIS V<V5.4,Am2.3= CC V5.5< 4.0 V HO I ECRUOS 005= µ V,A )XAM(SR V< CC V5.4< V8.0 CC V LO I KNIS V,Am2.1= )XAM(SR V< CC V5.4< 3.0

IMP706P IMP706R/S/T/J IMP708R/S/T/J DIP/SO MicroSO DIP/SO MicroSO DIP/SO MicroSO Name Function Manual reset input. The active LOW input triggers a reset pulse. It is pulled HIGH by a 20kW pull-up 1 3 1 3 1 3 MR resistor. It is compatible with TTL/CMOS signals when VCC = 5V. It can be shorted to ground through a mechanical switch. Leave floating or connect to VCC if the function is not used. 2 4 2 4 2 4 VCC Monitored power supply input. 3 5 3 5 3 5 GND Ground Power-fail input voltage monitor. With PFI less than 4 6 4 6 4 6 PFI 1.25V, PFO goes LOW. Connect PFI to ground when not used. Power-fail output. The output is active LOW and 5 7 5 7 5 7 PFO sinks current when PFI is less than 1.25V. If not used, leave the pin unconnected. W atchdog input. WDI controls the internal watchdog timer. A HIGH or LOW signal for 1.6 sec at WDI allows the internal timer to run-out, setting WDO low. 6 8 6 8 — — WDI A rising or falling edge must occur at WDI within 1.6 seconds or WDO goes LOW. The watchdog function is disabled by floating WDI. The internal watchdog timer clears when: RESETis asserted; WDI is three-stated; or WDI sees a rising or falling edge. — — — — 6 8 NC Not connected. Active-LOW reset output. Pulses LOW for 200ms when triggered, and stays LOW whenever VCC is — — 7 1 7 1 RESET below the reset threshold. RESETremains LOW for 200ms after VCC rises above the RESETthreshold or MR goes from HIGH to LOW. A watchdog timeout will not trigger RESETunless WDO is connected to MR. W atchdog output. WDO goes LOW when the 1.6 second internal watchdog timer times-out and does not go HIGH until a transition occurs at WDI. In 8 2 8 2 — — WDO addition, when V CC falls below the reset threshold, WDO goes LOW . Unlike RESET, WDO does not have a minimum pulse width and as soon as VCC exceeds the reset threshold, WDO becomes HIGH with no delay. 7 1 — — 8 2 RESET Active-HIGH reset output. RESETis the inverse of RESET . IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J Pin Descriptions Feature Summary © 1999 IMP, Inc. 408-432-9100/www.impweb.com 5 IMP706P IMP706R IMP706S IMP706T IMP706J IMP708R IMP708S IMP708T IMP708J Power-fail detector n n n n n n n n n Brownout detection n n n n n n n n n Debounced manual RESET input n n n n n n n n n Power-up/down RESET n n n n n n n n n W atchdog timer n n n n n Active-HIGH RESET n Active-LOW RESET n n n n Active-LOW and HIGHRESET s n n n n

The RESET/RESET signals ar e designed to start or r eturn a mP/mC to a known state. With V CC above 1.2V, RESET and RESET ar e guaranteed to be asserted. During a power -up sequence, the r eset outputs r emain asserted until the supply rises above the thr eshold level. The resets ar e deasserted appr oximately 200ms after cr ossing the threshold. In a brownout situation where VCC falls below the threshold level, the r eset outputs ar e asserted. If a br ownout occurs during an already initiated r eset period, the r eset period will extend for an additional reset period of 200ms. The IMP708 devices have dual reset outputs, one active LOW and one active HIGH. The IMP706Phas a single active HIGH reset and the IMP706/R/S/T/J devices have an active LOW r eset output. IMP Part RESET Polarity Threshold Watchdog Timer IMP706P HIGH 2.63V Yes IMP706R LOW 2.63V Yes IMP706S LOW 2.93V Yes IMP706T LOW 3.08V Yes IMP706J LOW 4.00V Yes IMP708R Both: HIGH & LOW 2.63V No IMP708S Both: HIGH & LOW 2.93V No IMP708T Both: HIGH & LOW 3.08V No IMP708J Both: HIGH & LOW 4.00V No Manual Reset (MR) The active-LOW manual reset input is pulled high by an internal 20kW pull-up resistor and can be driven low by CMOS/TTL logic or a mechanical switch to ground. An external debounce circuit is unnecessary since the 140ms minimum r eset time will debounce mechanical pushbutton switches. The minimum MR input pulse IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J 6 408-432-9100/www.impweb.com © 1999 IMP, Inc. VCC vR T WDO RESET MR tMD tRStRS tMR MR externally set low 706P_05.eps Watchdog Timing WDI Three-state operation tWD tWP tWD tWD 0V RESET triggered by MR WDI WDO RESET 706P_04.eps width is 0.5 ms with a 3V V CC input and 0.15 ms with a 5V V CC input. If not used, tie MR to V CC or leave floating. By connecting the watchdog output (WDO) and MR, a watchdog timeout forces a RESET to be generated. Watchdog Timer A watchdog timer available on the IMP706P/R/S/T/J monitors mP/mC activity. If activity is not detected within 1.6 seconds on the Watchdog Input (WDI), the internal timer puts the W atchdog Output (WDO) into a LOW state. WDO will r emain LOW until activity is detected at WDI. The watchdog function is disabled, meaning it is clear ed and not counting, if WDI is floated or connected to a thr ee-stated circuit. The watchdog timer is also disabled if RESET is asserted. When RESET becomes inactive and the WDI input sees a high or low transition as short as 100ns (V CC = 2.7V)/50ns (V CC = 4.5V), the watchdog timer will begin a 1.6 second countdown. Additional transitions at WDI will r eset the watchdog timer and initiate a new countdown sequence. WDO will also become LOW and remain so, whenever the supply voltage, VCC, falls below the device threshold level. WDO goes HIGH as soon as VCC transitions above the threshold. There is no minimum pulse width for WDO as there is for the RESET outputs. If WDI is float- ed, WDO essentially acts as a low supply voltage output indicator. Power-failure detection with auxiliary comparator All devices have an auxiliary comparator with 1.25V trip point. The output, PFO, is active LOW and the noninverting input is PFI. This comparator can be used as a supply voltage monitor with an external resistor voltage divider . As the monitor ed voltage level falls, PFI is r educed causing the PFO output to go LOW . Normally PFO interrupts the processor so the system can be shut down in a controlled manner. Detail Descriptions

Ensuring That RESET is Valid Down to VCC = 0V When V CC falls below 1.2V , the IMP706R/S/T/J and IMP708R/S/T/J RESET r eset outputs no longer pull down; it becomes indeterminate.To avoid the possibility that stray charges could build up and for ce RESET to the wr ong state, a pull-down resistor should be connected to the RESET pin, thus draining such charges to ground. The resistor value is not critical. A 100kW resis- tor will pull RESET to ground without loading it. Monitoring Voltages Other Than VCC The IMP706/708 can monitor voltages other than V CC using the Power Fail cir cuitry. If a r esistive divider is connected fr om the voltage to be monitored to the PFI input, the PFO (output) will go LOW if the divider voltage goes below its 1.25V reference. Should hysteresis be desir ed, connect a r esistor (equal to appr oximately 10 times the sum of the two r esistors in the divider) between the PFI and PFO pins. A capacitor between PFI and GND will reduce circuit sensitivity to input high fr equency noise. If it is desir ed to assert a reset in addition to the PFO flag, this may be achieved by connecting the PFO output to MR. IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J © 1999 IMP, Inc. 408-432-9100/www.impweb.com 7 Bi-directional Reset Pin Interfacing The IMP706/8 can interface with mP/mC bi-directional reset pins by connecting a 4.7k W resistor in series with the RESET output and the mP/mC bi-directional reset pin. Supply Voltage IMP70x VCC GND GND RESET 4.7kΩ 706P_06.eps Bi-directional I/O Pin (Example: 68HC11) BUF Buffered RESET µC or µP RESET Input

Application Information

E D eA eB C 0°–15° A e b2 b L A1 Plastic DIP (8-Pin)a.eps Plastic DIP (8-Pin) L 0°– 8° C HE e D B A1 A SO (8-Pin).eps SO (8-Pin) e b D E1 E a L C D 0.10mm 0.004in A MicroSO (8-Pin).eps MicroSO (8-Pin) IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J 8 408-432-9100/www.impweb.com © 1999 IMP, Inc. sehcnI sretemilliM niM xaM niM xaM *)niP-8(OSorciM 1A 0200.0 9500.0 050.0 51.0 2A 5920.0 4730.0 57.0 59.0 b 8900.0 7510.0 52.0 04.0 C 1500.0 1900.0 31.0 32.0 D 2411.0 0221.0 09.2 01.3 e CSB6520.0 CSB56.0 E CSB391.0 CSB09.4 1E 2411.0 0221.0 09.2 01.3 L 7510.0 6720.0 04.0 07.0 a °0 °6 °0 °6 )niP-8(OS A 350.0 960.0 53.1 57.1 1A 400.0 010.0 01.0 52.0 B 310.0 020.0 33.0 15.0 C 700.0 010.0 91.0 52.0 e 050.0 72.1 E 051.0 751.0 08.3 00.4 H 822.0 442.0 08.5 02.6 L 610.0 050.0 04.0 72.1 D 981.0 791.0 08.4 00.2 *)niP-8(PIDcitsalP 2A 511.0 591.0 29.2 59.4 b 410.0 220.0 63.0 65.0 2b 540.0 070.0 41.1 87.1 3b 030.0 540.0 08.0 41.1 D 553.0 004.0 20.9 61.01 E 003.0 523.0 26.7 62.8 1E 042.0 082.0 01.6 11.7 L 511.0 051.0 29.2 18.3 3ta.20t_P607 * JEDEC Drawing MO-187AA JEDEC Drawing MS-112AA * JEDEC Drawing MS-001BA Package Dimensions

IMP706P/R/S/T/J, IMP708R/S/T/JIMP706P/R/S/T/J, IMP708R/S/T/J IMP , Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Tel: 800-438-3722 Fax: 408-434-0335 Fax-on-Demand: 1-800-249-1614 (USA) Fax-on-Demand: 1-303-575-6156 (International) e-mail: info@impinc.com http://www.impweb.com The IMP logo is a registered trademark of IMP , Inc. All other company and product names are trademarks of their respective owners. © 1999 IMP, Inc. Printed in USA Part No.: IMP706P Document Number: IMP706P-5-03/99