IMP5226 A1PROS | Alldatasheet
Document overview
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Technical content
N Ultra-Fast response for Fast-20 SCSI N 35MHz channel bandwidth N Sleep-mode current less than 150µA — Disconnects terminator from lows N NO external compensation capacitors N Compatible with active negation drivers N Compatible with passive and active terminations N Approved for use with SCSI 1, 2, 3 and Ultra SCSI N Hot-swap compatible N Pin-for-pin compatible with LX5226, LX5207 and UCC5610 Block Diagrams Current Biasing Circuit Thermal Limiting Circuit 24mA Current Limiting Circuit Term Power DATA OUTPUT PIN DB (0) 1 of 18 Channels DISCONNECT V TERM 1.4V 2.85V 5226_01.eps 118-Line Plug and Pla8-Line Plug and Playy SCSI TSCSI Tererminatminatoror The 18-channel IMP5226 SCSI terminator is part of IMP's family of high- performance SCSI terminators that deliver true UltraSCSI performance. The BiCMOS design offers superior performance over first generation linear regulator/resistor based terminators. IMP's new architecture employs high-speed adaptive elements for each channel, thereby providing the fastest response possible - typically 35MHz, which is 100 times faster than the older linear regulator termi- nator approach. The bandwidth of terminators based on the older regulator/resistor terminator architecture is limited to 500kHz since a large output stabilization capacitor is required. The IMP architecture eliminates the external output compensation capacitor and the need for transient output capacitors while maintaining pin compatibility with first generation designs. Reduced component count is inherent with the IMP5226. The IMP5226 architecture tolerates marginal system designs. A key improvement offered by the IMP5226 lies in its ability to insure reliable, error-free communications even in systems which do not adhere to rec- ommended SCSI hardware design guidelines, such as improper cable lengths and impedance. Frequently, this situation is not controlled by the peripheral or host designer. The IMP5226 can be placed in a sleep mode with a high logic signal. In the sleep mode the outputs are in a high impedance state. Quiescent cur- rent is less than 150µA when disabled. The IMP5226 is a superior pin-for-pin replacement for the LX5226, LX5207, UC5601/5602 and the UCC5610. t r aPs l e n n a hCe p y T 1 1 1 5 P MI9 E S 2 1 1 5 P MI9 E S 5 1 1 5 P MI9 E S 1 2 1 5 P MI7 2E S 8 1 2 5 P MI9 E S 9 1 2 5 P MI9 E S 5 2 2 5 P MI8 1E S 6 2 2 5 P MI8 1E S 1 4 2 5 P MI8 D V L / E S 2 4 2 5 P MI8 D V L / E S s p e . 6 0 t _ 6 2 2 5 IMP SCSI Terminators 1IMP5226IMP5226 DATA COMMUNICATIONS
2 408-432-9100/www.impweb.com © 2000 IMP , Inc. Pin Configuration
Ordering Information
9 HEAT SINK / GND
8 GND
7 HEAT SINK / GND
1 DISCONNECT
19 T13
20 HEAT SINK / GND
21 HEAT SINK / GND
22 HEAT SINK / GND
23 T14
24 T15
25 T16
26 T17
27 T18
28 GND
16 T10
17 T11
18 T12
5226_02a.eps IMP5226 SOWB-28 10 T6 5226_02b.eps IMP5226 SSOP-28 r e b m u N t r aPe g n a R e r u t a r e p m eTe g a k c a P P W D C 6 2 2 5 P MI0 ° 0 7 o t C°CB W O S c i t s a l P n i p - 8 2 T P W D C 6 2 2 5 P MI0 ° 0 7 o t C°CB W O S c i t s a l P n i p - 8 2 , l e e R d n a e p a T B D C 6 2 2 5 P MI0 ° 0 7 o t C°CP O S S c i t s a l P n i p - 8 2 T B D C 6 2 2 5 P MI0 ° 0 7 o t C°CP O S S c i t s a l P n i p - 8 2 , l e e R d n a e p a T 3 t a . 1 0 t _ 6 2 2 5 Thermal Data Note: 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Thermal Resistance Junction-to-Leads, θ Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the ambient airflow is assumed. 1IMP5226IMP5226
© 2000 IMP , Inc. Data Communications 3 Recommended Operating Conditions r e t e m a r aPl o b m ySn iMp yTx aMs t i n U e g a t l o V r w p m r eTV M R E T 0 .45 .5V e g a t l o V e n i L l a n g i S 00 .5V e g a t l o V t u p n I t c e n n o c s i D 0V M R E T V C 6 2 2 5 P M I–e g n a R e r u t a r e p m e T n o i t c n u J g n i t a r e p O05 21C ° . l a n o i t c n u f s i e c i v e d e h t h c i h w r e v o e g n a r e h t e t a c i d n i s n o i t i d n o c g n i t a r e p o d e d n e m m o c e R . 2 : e t o N s p e . 2 0 t _ 6 2 2 5
Electrical Characteristics
Unless otherwise specified, these specifications apply at an ambient operating temperature of T A = 25°C. TermPwr = 4.75V . Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature. r e t e m a r aPl o b m ySs n o i t i d n oCn iMp yTx aMs t i n U e g a t l o V h g i H t u p t uOV T U O 5 6 .25 8 .2V t n e r r u C y l p p u S r w P m r eTI C C n e p O = s e n i l a t a d l lA0 15 1A m V 2 . 0 = s e n i l a t a d l lA4 240 5 4 V 0 . 2 > s n i P T C E N N O C S ID0 50 51A µ t n e r r u C t u p t uOI T U O V T U O V 5 . 0=0 2– 2 2– 4 2– A m t n e r r u C t u p n I t c e n n o c s iDI N I V 0 = s n i P T C E N N O C S ID0 1– A µ t n e r r u C e g a k a e L t u p t uOI L O V , V 0 . 2 > s n i P T C E N N O C S I DO V 2 . 0=1 A µ h t d i w d n a B l e n n a hCW B5 3z H M l e n n a h C r e p , t n e r r u C k n i S n o i t a n i m r eTI K N I SV T U O V 4=7 A m s p e . 3 0 t _ 6 2 2 5 1IMP5226IMP5226
Application Information
Figure 3. 5226_03.eps DISCONNECT
1 Meter, AWG 28
Figure 1. Receiving Waveform – 20MHz Figure 2. Driving Waveform – 20MHz
© 2000 IMP , Inc. Data Communications 5 Cable transmission theory suggests to optimize signal speed and quality, the termination should act both as an ideal voltage refer- ence when the line is released (deasserted) and as an ideal current source when the line is active (asserted). Common active terminators which consist of linear regulators in series with resis- tors (typically 110 Ω ) are a compromise. With coventional linear terminators as the line voltage increases the amount of current decreases linearly by the equation; The IMP5226, with its unique new architecture, applies the max- imum amount of current regardless of line voltage until the termination high threshold (2.85V) is reached. Acting as a near ideal line terminator, the IMP5226 closely repro- duces the optimum case when the device is enabled. To enable the device the disconnect pin is pulled LOW. During this mode of operation, quiescent current is 10mA, and the device will respond to line demands by delivering 24mA on assertion and by imposing 2.85V on deassertion. In order to disable the device, the disconnect pin must be driven HIGH In the disable mode, the device is in a sleep state with quiescent current less than 150 µA. When disabled, all outputs are in a high impedance state. Sleep mode can be used for power conservation or to remove the terminator from the SCSI chain. An additional feature of the IMP5226 is its compatibility with active negation drivers. VV R IREF LINE−() = . Table 1. Power Up/ Power Down Function Table T C E N N O C S IDs t u p t u O t n e c s e i u Q m u m i x a M t n e r r u C Ld e l b a nEA m 5 1 HZ IHA µ 0 5 1 n e pOZ IHA µ 0 5 1 s p e . 4 0 t _ 6 2 2 5 1IMP5226IMP5226
© 2000 IMP, Inc. Printed in USA Publication #: 7009 Revision: D Issue Date: 08/19/02 Type: Preliminary s e h c nIs r e t e m i l l i M n iMx aMn iMx a M * ) n i P - 8 2 ( B W O S A8 9 6 .03 1 7 .00 7 . 710 1 . 8 1 B1 9 2 .09 9 2 .00 4 .70 6 . 7 C3 9 0 .04 0 1 .05 3 .25 6 . 2 D3 1 0 .08 1 0 .03 3 .01 5 . 0 F6 1 0 .00 5 0 .00 4 .07 2 . 1 GC S B 0 5 0 .0C S B 7 2 . 1 J9 0 0 .03 1 0 .03 2 .02 3 . 0 K4 0 0 .02 1 0 .00 1 .00 3 . 0 M °0 °8 °0 °8 P4 9 3 .09 1 4 .00 0 . 015 6 . 0 1 ) n i P - 8 2 ( P O S S A8 6 0 .08 7 0 .03 7 .19 9 . 1 B9 0 0 .05 1 0 .05 2 .08 3 . 0 C5 0 0 .08 0 0 .03 1 .02 2 . 0 D6 9 3 .07 0 4 .07 0 . 013 3 . 0 1 F5 0 2 .02 1 2 .00 2 .58 3 . 5 GC S B 5 2 .0C S B 5 6 . 0 J2 0 0 .08 0 0 .05 0 .01 2 . 0 K4 6 0 .02 7 0 .03 6 .13 8 . 1 L5 2 0 .07 3 0 .05 6 .05 9 . 0 M °0 °8 °0 °8 P1 0 3 .01 1 3 .05 6 .70 9 . 7 E A 3 1 0 - O M g n i w a r D C E D E J * 3 t a . 5 0 t _ 6 2 2 5 A B P DGF 28 15 141 C K J L M SEATING PLANE 28-Pin (SOWB)DWP .eps Package Dimensions SOWB (28-Pin) 321 E P SEATING PLANE B G A H E L C M D F 28-Pin (SSOP)DB.eps SSOP (28-Pin) 1IMP5226IMP5226 IMP , Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Fax: 408-432-1085 e-mail: info@impinc.com http://www.impweb.com The IMP logo is a registered trademark of IMP , Inc. All other company and product names are trademarks of their respective owners.