IM06B30AC1 INFINEON | Alldatasheet

Document overview

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Technical content

Features

  • Fully isolated dual in-line molded module
  • Lead-free terminal plating; RoHS compliant Inverter
  • 650 V TRENCHSTOP™ IGBT7 T7
  • 600 V rugged SOI gate driver technology with stability against transient and negative voltage
  • Allowable negative VS potential up to -11 V for signal transmission at VBS = 15 V
  • Integrated bootstrap functionality
  • Overcurrent shutdown
  • Built-in NTC thermistor for temperature monitor
  • Undervoltage lockout at all channels
  • Low-side emitter pins accessible for phase current monitoring (open emitter)
  • Cross-conduction prevention
  • All of 6 switches turn off during protection Potential applications
  • Air-conditioners, home appliances, motor drives

Datasheet 2 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Product validation Product validation Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Table 1 Product Information Base Part Number Package Type Standard Pack Remarks Form MOQ IM06B30AC1 DIP 36x21 14 pcs / Tube 280 pcs

Datasheet 3 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Table of contents Table of contents

Datasheet 4 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Internal electrical schematic

1 Internal electrical schematic

NW (17) NV (18) W (20) V (21) U (22) P (23) (2) VB(U) (15) ITRIP (14) VFO (10) LIN(U) (11) LIN(V) (12) LIN(W) (16) VSS (13) VDD (4) VB(V) (6) VB(W) (7) HIN(U) (8) HIN(V) (9) HIN(W) (1) VS(U) (3) VS(V) (5) VS(W) NU (19) NC (24) Thermistor RBS1 RBS2 RBS3 Figure 1 Internal electrical schematic

Datasheet 5 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Pin description

2 Pin description

2.1 Pin assignment

(1) VS(U) (2) VB(U) (3) VS(V) (4) VB(V) (5) VS(W) (6) VB(W) (7) HIN(U) (8) HIN(V) (9) HIN(W) (10) LIN(U) (11) LIN(V) (12) LIN(W) (13) VDD (14) VFO (15) ITRIP (16) VSS (23) P (22) U (21) V (20) W (19) NU (18) NV (17) NW (24) NC Figure 2 Internal electrical schematic Table 2 Pin assignment Pin number Pin name Pin description

1 VS(U) U-phase high-side floating IC supply offset voltage

2 VB(U) U-phase high-side floating IC supply voltage

3 VS(V) V-phase high-side floating IC supply offset voltage

4 VB(V) V-phase high-side floating IC supply voltage

5 VS(W) W-phase high-side floating IC supply offset voltage

6 VB(W) W-phase high-side floating IC supply voltage

7 HIN(U) U-phase high-side gate driver input

8 HIN(V) V-phase high-side gate driver input

9 HIN(W) W-phase high-side gate driver input

10 LIN(U) U-phase low-side gate driver input

11 LIN(V) V-phase low-side gate driver input

12 LIN(W) W-phase low-side gate driver input

13 VDD Low-side control supply

14 VFO Fault output / temperature monitor

15 ITRIP Overcurrent shutdown input

16 VSS Low-side control negative supply

17 NW W-phase low-side emitter

18 NV V-phase low-side emitter

Datasheet 6 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Pin description

2.2 Pin description

HIN (U, V, W) and L IN (U, V, W) (Low-side and high- side control pins, Pin 7 - 12) These pins are positive logic , and they are responsible for the control of the integrated IGBT s. The Schmitt -trigger input threshold s of them are such to guarantee LSTTL and CMOS compatibility down to 3.3 V controller outputs. A p ull-down resistor of about 5 k is internally provided to pre - bias input s during supply start -up, and a zener clamp is provided to protect the pins. Negative pulses down to an absolute minimum of -5.5 V are allowed that offers an outstanding robustness. Input Schmitt-trigger and noise filter provide noise rejection to short input pulses. The noise filter suppresses control pulses shorter than the filter time tFIL ,IN. The Figure 4 describes how the filter works . An input pulse -width short er than 1 µs is not recommended. INPUT NOISE FILTER  k5 Schmitt-Trigger SWITCH LEVEL VIH; VILVSS HINx LINx VDD CIPOSTM Figure 3 Input pin structure HIN LIN HO LOlow high tFIL,IN tFIL,INa) b) HIN LIN HO LO Figure 4 Input filter timing diagram The integrated gate drive r additionally provides a shoot-through prevention capability that avoids the simultaneous on -states of the same leg. When both inputs of the same leg are activated, only formerly activated one remained activated so that the leg is kept steadily in a safe state. A minimum deadtime insertion of typically 360 ns is also provided by driver, to reduce cross-conduction of the IGBTs. VFO (Fault-output and NTC, Pin 14) The V FO pin indicates a module failure in case of undervoltage at pin V DD or in case of triggered overcurrent detection at I TRIP. A n external pull-up resistor is required. VFO VSS VDD RON, FLT From ITRIP - Latch From UV detection CIPOSTM Thermistor Figure 5 Internal circuit at pin VFO The sleep function is activated after each trigger of ITRIP or undervoltage lockout. A new edge input signal is mandatory to activate gate drives after falut-clear time. ITRIP (Overcurrent detection function, Pin 15) This product family provides an overcurrent detection function by connecting the ITRIP input with the IGBT current feedback. The I TRIP comparator threshold (typ. 0.525 V) is referenced to V SS. A n input noise filter (tITRIP = typ. 530 ns) prevents the driver to detect false overcurrent events. Overcurrent detection generates a shutdown of outputs of the gate driver. Fast track shutdown function allows low -side outputs to be turned off faster than high side outputs about 200 ns. The fault-clear time is set to minimum 100 µs. Pin number Pin name Pin description

19 NU U-phase low-side emitter

20 W Motor W-phase output

21 V Motor V-phase output

22 U Motor U-phase output

23 P Positive bus input voltage

24 NC No connection

Datasheet 7 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Pin description VDD, V SS (Low-side c ontrol supply and reference, Pin 13, 16) VDD is the control supply, and it provides power both to input logic and to output stage. Input logic is referenced to VSS ground. The undervoltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.4 V is present. The gate driver shuts down all the outputs, when the VDD supply voltage is below VDDUV- = 11.5 V. This prevents the IGBTs from critically low gate voltage levels during on-state and therefore from excessive power dissipation. VB (U, V, W) and V S (U, V, W) (High -side supplies, Pin 1 - 6) VB to V S is the high -side supply voltage. The high - side circuit can float with respect to V SS following the high-side IGBT emitter voltage. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. The undervoltage detection operates with a rising supply threshold of typical V BSUV+ = 1 1.5 V and a falling threshold of VBSUV- = 10.7 V. VS (U, V, W) provide a high robustness against negative voltage in respect of VSS of -50 V transiently. This ensures very stable designs even under harsh conditions. NW, NV, NU (Low-side emitter, Pin 17 - 19) The low -side emitter s are available for current measurement of each phase leg. It is recommended to keep the connection to pin V SS as short a s possible to avoid unnecessary inductive voltage drops. W, V, U (High-side emitter and low-side collector, Pin 20 - 22) These pins are connected to motor U, V, W input pins. P (Positive bus input voltage, Pin 23) The high -side IGBT s are connected to the bus voltage. It is noted that the bus voltage does not exceed 450 V.

Datasheet 8 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Absolute maximum ratings

3 Absolute maximum ratings

(VDD = 15 V and TJ = 25° C, if not stated otherwise)

3.1 Module section

Description Symbol Condition Value Unit Storage temperature range TSTG -40 ~ 125 °C Operating case temperature TC Refer to Figure 7 -40 ~ 125 °C Operating junction temperature TJ -40 ~ 150 °C Maximum junction temperature1 TJ, switch, max 175 °C Isolation test voltage VISO 1 min, RMS, f = 60 Hz 2000 V

3.2 Inverter section

Description Symbol Condition Value Unit Max. blocking voltage VCES 650 V DC link supply voltage of P-N VPN Applied between P-N 450 V DC link supply voltage (surge) of P-N VPN (surge) Applied between P-N 500 V Output current2 IO TC = 25° C, TJ < 150° C ±30 A TC = 80° C, TJ < 150° C ±20 Maximum peak output current IO (peak) TC = 25° C, TJ < 150° C less than 1 ms ±60 A Power dissipation per IGBT Ptot 33.8 W Short circuit withstand time tSC VDC ≤ 360V, TJ = 150° C 3 µs

3.3 Control section

Description Symbol Condition Value Unit High side offset voltage VS 600 V Repetitive peak reverse voltage of bootstrap diode VRRM 600 V Module supply voltage VDD -1 ~ 20 V High-side floating supply voltage (VB reference to VS) VBS -1 ~ 20 V Input voltage (LIN, HIN, ITRIP) VIN -1 ~ VDD+0.3 V 1The maximum junction temperature rating of built in power chips is 175℃ under condition: max. 10 sec, every 10 min, max. 1 hrs cumulative over lifetime. 2 Pulse width and period are limited by junction temperature.

Datasheet 9 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Thermal characteristics

4 Thermal characteristics

Description Symbol Condition Value Unit Min. Typ. Max. Single IGBT thermal resistance, junction to case RthJC See Figure 7 for TC measurement point - - 3.7 K/W Single diode thermal resistance, junction-case RthJC, D - - 4.6 K/W

Datasheet 10 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Recommended operation conditions

5 Recommended operation conditions

All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. Description Symbol Value Unit Min. Typ. Max. DC link supply voltage of P-N VPN 0 300 400 V Low-side supply voltage VDD 13 15 18.5 V High-side floating supply voltage (VB vs. VS) VBS 13 - 18.5 V Logic input voltages LIN, HIN, ITRIP VIN VITRIP 0 - 5 V Inverter PWM carrier frequency fPWM - - 20 kHz External deadtime between HIN and LIN DT 2.0 - - µs Voltage between VSS – N (including surge) VCOMP -5 - 5 V Minimum input pulse width PWIN(ON) PWIN(OFF) 1 - - µs Control supply variation ΔVBS, ΔVDD

1 V/µs

Datasheet 11 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Static parameters

6 Static parameters

(VDD = VBS = 15 V and TJ = 25° C, if not stated otherwise)

6.1 Inverter section

Description Symbol Condition Value Unit Min. Typ. Max. Collector-emitter voltage VCE(Sat) IC = 30 A, TJ = 25° C IC = 30 A, TJ = 150° C 1.35 1.50 1.70 - V Collector-emitter leakage current ICES VCE = 600 V - - 1 mA Diode forward voltage VF IF = 30 A, TJ = 25° C IF = 30 A, TJ = 150° C 1.75 1.75 2.20 - V

6.2 Control section

Description Symbol Condition Value Unit Min. Typ. Max. Logic "1" input voltage (LIN, HIN) VIH 1.7 2.0 2.3 V Logic "0" input voltage (LIN, HIN) VIL 0.7 0.9 1.1 V ITRIP positive going threshold VIT, TH+ 475 525 570 mV ITRIP input hysteresis VIT, HYS 45 70 - mV VDD and VBS supply undervoltage positive going threshold VDD and VBS supply undervoltage negative going threshold VDD and VBS supply undervoltage lockout hysteresis VDDUVH VBSUVH 0.5 0.9 - V Quiescent VBx supply current (VBx only) IQBS HIN = 0 V - - 300 µA Quiescent VDD supply current (VDD only) IQDD LIN = 0 V, HINX = 5 V - - 1.1 mA Input bias current for LIN, HIN IIN+ VIN = 5 V - 1.1 1.7 mA Input bias current for ITRIP IITRIP+ VITRIP = 5 V - 68 185 µA Input bias current for VFO IFO VFO = 5 V, VITRIP = 0 V - 60 - µA VFO output voltage VFO IFO = 10 mA, VITRIP = 1 V - 0.35 - V Bootstrap diode forward voltage VF_BSD IF = 0.3 mA - 1.0 - V Bootstrap diode resistance RBSD Between VF1 = 4 V and VF2 = 5 V - 37 - 

Datasheet 12 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Dynamic parameters

7 Dynamic parameters

(VDD = 15 V and TJ = 25° C, if not stated otherwise)

7.1 Inverter section

Description Symbol Condition Value Unit Min. Typ. Max. Turn-on propagation delay time ton VLIN, HIN = 5 V, IC = 30 A, VDC = 300 V - 820 - ns Turn-on rise time tr - 50 - ns Turn-on switching time tc(on) - 195 - ns Reverse recovery time trr - 115 - ns Turn-off propagation delay time toff VLIN, HIN = 0 V, IC = 30 A, VDC = 300 V - 1165 - ns Turn-off fall time tf - 25 - ns Turn-off switching time tc(off) - 100 - ns Short circuit propagation delay time tSCP From VIT, TH+ to 10% ISC - 1430 - ns IGBT turn-on energy (includes reverse recovery of diode) Eon VDC = 300 V, IC = 30 A TJ = 25° C TJ = 150° C 990 1610 µJ IGBT turn-off energy Eoff VDC = 300 V, IC = 30 A TJ = 25° C TJ = 150° C 555 870 µJ Diode recovery energy Erec VDC = 300 V, IC = 30 A TJ = 25° C TJ = 150° C 220 µJ

7.2 Control section

Description Symbol Condition Value Unit Min. Typ. Max. Input filter time ITRIP tITRIP VITRIP = 1 V - 530 - ns Input filter time at LIN, HIN for turn on and off tFIL, IN VLIN, HIN = 0 V or 5 V - 290 - ns Fault clear time after ITRIP-fault tFLTCLR 100 280 - µs ITRIP to fault propagation delay tFLT VLIN, HIN = 0 or VLIN, HIN = 5 V, VITRIP = 1 V - 680 1000 ns Internal deadtime DTIC - 360 - ns Matching propagation delay time (on and off) all channels MT External dead time > 500 ns - 20 - ns

Datasheet 13 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Thermistor

8 Thermistor

Description Symbol Condition Value Unit Min. Typ. Max. Resistance RNTC TNTC = 25° C - 85 - k B-constant of NTC (negative temperature coefficient) thermistor B (25/100) - 4092 - K Figure 6 Thermistor resistance – temperature curve and table (For more information, please refer to the application note)

Datasheet 14 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Mechanical characteristics and ratings

9 Mechanical characteristics and ratings

Description Condition Value Unit Min. Typ. Max. Mounting torque M3 screw and washer 0.59 0.69 0.78 Nm Terminal strength pull Controal terminal: Load 5 N Power terminal: Load 10 N JEITA-ED-4701 10 - - S Terminal strength bendong Controal terminal: Load 2.5 N Power terminal: Load 5 N JEITA-ED-4701 2 - - times Backside curvature Refer to Figure 8 -50 - 100 µm Weight - 5.92 - g

Datasheet 15 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Qualification information

10 Qualification information

UL certification File number: E314539 Moisture sensitivity level (SOP23 only) - RoHS compliant Yes (Lead-free terminal plating) ESD HBM (human body model) 2 CDM (charged device model) C2a

Datasheet 16 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Diagrams and tables

11 Diagrams and tables

11.1 TC measurement point

Figure 7 TC measurement point1

11.2 Backside curvature measurment point

Figure 8 Backside curvature measurement position 1Any measurement except for the specified point in Figure 7 is not relevant for the temperature verification and brings wrong or different information.

Datasheet 17 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Diagrams and tables

11.3 Switching test circuit

0.1uF 220uF 0.1uF 22uF 1.8kΩ VDD VDC U, V, W ITRIP Rshunt HS switching input signal LS switching input signal 0.1uF A IC P NU, NV, NW Inductor A: LS switching B: HS switching VBS Figure 9 Switching test circuit

11.4 Switching time definition

0.9 V 2.1 V 90% IDx 10% ICx10% VDSx 10% IDx 90% IDx toff tf ton tr tc(off) tc(on ) 10% VDSx trr 10% Irrx LINx Irr Turn-off Turn-on Figure 10 Switching time definition

Datasheet 18 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Application guide

12.1 Typical application schematic

5 or 3.3V line U-phase current sensing NW (17) NV (18) W (20) V (21) U (22) P (23) (2) VB(U) (15) ITRIP (14) VFO (10) LIN(U) (11) LIN(V) (12) LIN(W) (16) VSS (13) VDD (4) VB(V) (6) VB(W) (7) HIN(U) (8) HIN(V) (9) HIN(W) (1) VS(U) (3) VS(V) (5) VS(W) NU (19) NC (24) Thermistor VSS VDD LIN3 LIN2 LIN1 VFO ITRIP LO3 LO2 LO1 HO1 HO2 HO3 VB1 VS1 VB2 VS2 VB3 VS3 HIN3 HIN2 HIN1 RBS1 RBS2 RBS3 <Signal for protection> Temperature monitor Micro Controller #6 #7 3-ph AC Motor V-phase current sensing W-phase current sensing <Signal for protection> Power GND line Control GND line Figure 11 Typical application circuit

  • #1 Input circuit − RC filter circuit can be used to reduce input signal noise (e.g. 100 , 1 nF). − The filter capacitors should be placed close to the IPM (to VSS pin especially).
  • #2 ITRIP circuit − The filter capacitor should be placed close to ITRIP and VSS pins.
  • #3 VFO circuit − VFO pin is an open-drain output. This signal line should be pulled up to the bias voltage of the 5 V/3.3 V with a proper resistor. − It is recommended that RC filter circuit is placed close to the controller.
  • #4 VB-VS circuit − Capacitors for high-side floating supply voltage should be placed close to VB and VS pins.
  • #5 Snubber capacitor − The wiring among the IPM, snubber capacitor and shunt resistors should be short as possible.
  • #6 Shunt resistor − SMD-type resistors are strongly recommended to minimize stray inductance.
  • #7 Ground pattern − Power ground and signal ground should be connected at a single point. It is recommended to connect them at the end of shunt resistor.

Datasheet 19 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Application guide

12.2 Performance chart

0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 FSW=5kHz FSW=15kHz VDC=300V, VDD=VBS=15V, SVPWM Maximum Output Current, IO [Arms] Case Temperature, TC [℃] IM06B30AC1 Figure 12 Maximum operating current SOA1 1This maximum operating current SOA is just one of example based on typical characteristics for this product. It can be changed by each user’s actual operating conditions.

Datasheet 20 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A Package outline Figure 13 IM06B30AC1

Datasheet 21 of 22 V 1.10 2024-12-16 CIPOS™ Mini IPM IM06B30AC1, 600 V 30 A

Revision history

Document version Date of release Description of changes V 1.00 2024-08-16 Initial release V1.10 2024-12-16 Updated Figure 7 and typo

81726 Munich, Germany

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