ILX569K

ILX569K SONY | Alldatasheet

Document overview

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Technical content

– 1 – E01750A27 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. ILX569K 22 pin DIP (Plastic)

Description

The ILX569K is a reduction type CCD linear sensor developed for color image scanner. This sensor reads A4-size documents at a density of 600 DPI and 1200 DPI. Sensor Line Features

• Number of effective pixels: 32040 pixels (5340 pixels × 6)  Pixel size: 4µm × 4µm (4µm pitch)  Distance between main line: 48µm (12 lines)  Distance between main line and sub line: 8µm (2 lines) Common Features  Single-sided readout  Ultra low lag  Single 12V power supply  Maximum data rate: 8MHz/Color  Input clock pulse: CMOS 5V drive  Number of output: 3 (R, G, B)  Package: 22 pin Plastic-DIP (400mil) Absolute Maximum Ratings  Supply voltage V DD 15 V  Operating temperature –10 to +55 °C Pin Configuration (T op View) 5340-pixel ××××× 6 line CCD Linear Sensor (Color) Sensor Configuration 11 12 5340 5340 5340 5340 5340 5340 R (sub) R (main) G (sub) G (main) B (sub) B (main) φL1 VDD VOUT -R VOUT -B NC NC NC NC φROG- G φROG- R φL2 φRS GND VOUT -G NC NC φROG- B NC 1357 1357 1357 246 246 246 Blue Green Green Blue Red Red4µm 4µm 4µm 48µm 48µm 8µm 4µm

– 2 – ILX569K Block Diagram Main Line (Blue) D74 S5340 D75 D106 D31 Sub Line (Blue) D74' S1' S2' S3' S5340' D75' D106' D31' Main Line (Green) D74 S5340 D75 D106 D31 Sub Line (Green) D74' S1' S2' S3' S5340' D75' D106' D31' Main Line (Red) D74 S5340 D75 D106 D31 Sub Line (Red) D74' S1' S2' S3' S5340' D75' D106' D31' Readout Gate Readout Gate Readout Gate Readout Gate Readout Gate Readout Gate CCD Register CCD Register CCD Register CCD Register CCD Register CCD Register Driver Driver Driver 1522 VOUT -B VOUT -G VOUT -R GNDφRS φ3 φ4 φL1 φL2 φ1 φ2VDD φROG -R φROG -G φROG -B 21 1920

– 3 – ILX569K Unit V Max. 12.6 Typ. Min. 11.4 Item VDD Recommended Supply Voltage Unit pF pF pF pF Max. Typ. 1500 Min. Symbol C φ1, Cφ2 C φRS C φROG C φL1, CφL2, Cφ3, Cφ4 Item Input capacity of φ1, φ2 Input capacity of φRS Input capacity of φROG Input capacity of φ3, φ4, φL1, φL2 Clock Characteristics Pin Description Pin No. Symbol Description φL1 VDD VOUT -R VOUT -B NC NC NC NC φROG φROG -R Clock pulse input Clock pulse input 12V power supply Signal output (red) Signal output (blue) NC NC NC NC Clock pulse input Clock pulse input Pin No. Symbol Description NC φROG- B NC NC VOUT -G GND φRS φL2 NC Clock pulse input Clock pulse input Clock pulse input NC NC Signal output (green) GND Clock pulse input Clock pulse input Clock pulse input MHz MHz 0.5 fφ1, fφ2, fφL1, fφL2 fφ3, fφ4, fφRS φ1, φ2, φL1, φL2 φ3, φ4, φRS Clock Frequency Unit V V Max. 5.25 0.1 Ty p. 5.0 Min. 4.75 High level Low level φ1, φ2, φRS, φROG, φL1, φL2, φ3, φ4 pulse voltage Input Clock Pulse Voltage Condition Item UnitMax.Ty p.Min.SymbolItem

– 4 – ILX569K Electrooptical Characteristics (Note 1) (T a = 25°C, VDD = 12V , fφRS = 1MHz, Input clock = 5Vp-p, Light source = 3200K, IR cut filter CM-500S (t = 1.0mm)) Notes: 1. In accordance with the given electrooptical characteristics, the black level of 1200 DPI is defined as the average value of D32, D33 to D73. 2. For the sensitivity test light is applied with a uniform intensity of illumination. 3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2. VOUT = 500mV (typ.) PRNU = × 100 [%] 4. Use below the minimum value of the saturation output voltage. 5. Saturation exposure is defined as follows. SE = Where R indicates RR , RG , RB and SE indicates SER , SEG, SEB. 6. Optical signal accumulated time τint stands at 4ms. 7. VOUT-G = 500mV (typ.) 8. Supply current means the total current of this device. 9. Vos is defined as indicated bellow. V OUT indicates VOUT-R , VOUT-G , and VOUT-B . V/(lx · s) V lx · s mV mV mA Ω V Note 2 Note 3 Note 4 Note 5 Note 6 Note 7 Note 8 Note 9 2.3 2.2 1.6 1.6 3.2 1.8 1.7 1.2 2.0 1.64 0.1 0.5 0.02 360 5.7 1.3 1.2 0.8 1.8 R R R G R B PRNU VSAT SE R SE G SE B VDRK DSNU IL I VDD TTE Z O VOS Red Green Blue Red Green Blue Sensitivity Sensitivity nonuniformity Saturation output voltage Saturation exposure Dark voltage average Dark signal nonuniformity Image lag Supply current T otal transfer efficiency Output impedance Offset level Unit RemarksMax.Ty p.Min.SymbolItem (VMAX – VMIN )/2 VAVE VSAT R VOUT GND VOS

– 5 – ILX569K Clock Timing Chart 1 1200 DPI Note)The transfer pulses (φ1, φ2) must have more than 5446 cycles. The transfer pulses (φ3, φ4) must have more than 10892 cycles. VOUT indicates VOUT-R , VOUT-G , VOUT-B . φROG φ2, φL2 φ1, φL1 φRS VOUT D1' D31 D31' D32 D32' D74 D74' S1' S5339' S5340 S5340' D75 D78' D79 D79' D75' D80 D80' D81 D81' D82 D82' D106' Optical black (42 pixels × 2) Dummy signal (74 pixels × 2) Effective pixels signal (5340 pixels × 2) Dummy signal (32 pixels × 2) 1-line output period (5446 pixels × 2)

– 6 – ILX569K Clock Timing Chart 2 600 DPI Note)The transfer pulses (φ1, φ2) must have more than 5505 cycles. VOUT indicates VOUT-R , VOUT-G , VOUT-B . Optical black (42 pixels) Dummy signal (85 pixels) 1-line output period (5505 pixels) Effective pixels signal (5340 pixels) Dummy signal (more than 80 clocks) φROG φ1, φ3 φ2, φ4, φL2 φRS φL1 VOUT D42 D43 D44 D83 D84 D85 S10679 S10680 D86 D87

– 7 – ILX569K Clock Timing Chart 3 ClockTiming Chart 4 φROG φL1 φL2 φRS VOUT t11 t16 t10 t15 t11t12 Sub Line Main Line t13 t14 t18t17 t10

– 8 – ILX569K Clock Pulse Recommended Timing ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 100 6000 1500 120∗1 250∗1 5000 1200 t10 t11 t12 t13 t14 t15 t16 t17 t18 φROG, φ1 pulse timing φROG pulse high level period φROG pulse high level period φROG pulse rise time φROG pulse fall time φ1 pulse rise time/φ2 pulse fall time φ1 pulse fall time/φ2 pulse rise time φL1 pulse rise time/φL2 pulse fall time φL1 pulse fall time/φL2 pulse rise time φ3 pulse rise time/φ4 pulse fall time φ3 pulse fall time/φ4 pulse rise time φRS pulse rise time φRS pulse fall time φRS pulse high level period φL1, φL2 and φ3 pulse timing φRS, φ3 pulse timing Signal output delay time ∗1 These timing data is the recommended condition under fφRS = 1MHz. UnitMax.Typ.Min.SymbolItem

– 9 – ILX569K Application Circuit∗1 1 2 3 4 5 6 φL2 GND φRS VOUT-G NC φL1 VDD VOUT-R VOUT-B NC 100Ω100Ω φL2 IC2 <IC1> IC2 12V 47µF/ 16V 0.1µF 100Ω φRS VOUT-G Tr1 100Ω3kΩ Tr1 VOUT-B φL1 100Ω 7 8 9 10 11 1222 21 20 19 1318 17 16 15 14 IC2 IC1: 74HC04 × 3pcs IC2: 74HC04 Tr1: 2SA1175 NC φROG -B NC NC NC NC φROG -G φROG -R φROG -G φROG -R 100Ω 100Ω 2Ω 2Ω φ1 φ2 IC1 IC1 100Ω φROG- B 3kΩ 100Ω 3kΩ Tr1 VOUT-R ∗1 Data rate fφRS = 1MHz Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

– 10 – ILX569K Example of Representative Characteristics 400 0.1 0.2 0.3 0.4 0.5 Relative sensitivity 0.6 0.7 0.8 0.9 1.0 R G B 500 600 700 Wavelength [nm] Spectral sensitivity characteristics (Standard characteristics) 800 900 1000

– 11 – ILX569K Notes on Handling 1. Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2. Notes on handling CCD packages The following points should be observed when handling and installing packages. a) Remain within the following limits when applying a static load to the package. (1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) Shearing strength: 29N/surface (3) T ensile strength: 29N/surface (4) T orsional strength: 0.9Nm b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) Be aware that any of the following can cause the packege to crack or dust to be generated. (1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating. (4) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer. (5) Applying the metal a crash or a rub against the plastic portion. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3. Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnance causes damage to the glass and other defects. Use a grounded 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) T o dismount an image device, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero-cross type. Plastic portion Cover glass 39N Ceramic portion Adhesive(1) 29N (3) 0.9Nm (4) 29N (2)

– 12 – ILX569K 4. Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. T o prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5. Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6. CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.

– 13 – ILX569K Package Outline Unit: mm PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER Plastic,Ceramic GOLD PLATING 2.21g

42 ALLOY

M0.3 LS-D18(E) ( 2.9 ) 2.1 0.25 0.51 10.16 2.54 22 12 111 V H 22pin DIP (400mil) 32.0 ± 0.3 6.2 ± 0.3 21.360 (5340Pixels) No.1Pixel (Blue Main) 10.0 ± 0.3 0˚ to 9˚ 2.8 ± 0.5 1. The height from the bottom to the sensor surface is 1.61 ± 0.3mm. 2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5. Sony Corporation