CXA3001N SONY | Alldatasheet

Document overview

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Technical content

Features

  • Wide gain control range
  • Linear gain slope
  • Noise figure Typ. 6dB at Gain = 45dB
  • Output IP3 Typ. +2dBm at Gain = 40dB
  • 2 input ports
  • Power save function included Absolute Maximum Ratings
  • Supply voltage V CC 6V
  • Operating temperature Topr –40 to +85 °C
  • Storage temperature Tstg –65 to +150 °C
  • Allowable power dissipation PD 420 mW
  • Supply voltage range –0.3 to 6 V
  • Logic input voltage –0.3 to V CC +0.3 V
  • Signal input voltage –0.3 to V CC +0.3 V
  • Differential signal input voltage 0 to 2.5 V Operating Conditions Supply voltage 3.1 to 3.8 V

Applications

  • CDMA cellular mobile phone
  • CDMA & AMPS cellular phone Structure Bipolar sillicon monolithic IC – 1 – CXA3001N E95711-PP RX Gain Control Amplifier Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. 24 pin SSOP (Plastic)

– 2 – CXA3001N Block Diagram Bias Driver SWITCH SWITCH BP2 OUTX OUT BP1 CDMAINX CDMAIN FMINX FMIN MODE GCTL VCC 1, 2 GND1, 2 PSV CXA3001N IF Output to External Capacitor IF Input for CDMA IF Input for FM Input Select Gain Control Supply Voltage Ground Power Save

– 3 – CXA3001N Pin Configuration 12 13 241MODE PSV BP1 BP2 VCC 1 GND1 NC CDMAIN NC CDMAINX NC FMIN NC FMINX GCTL NC NC NC OUTX NC OUT NC V CC 2 GND2 CXA3001N

– 4 – CXA3001N Pin Description Pin No. Symbol Pin voltage Typ. (V) Equivalent circuit Description

1 MODE

Input select pin. CDMAIN for High. FMIN for Low. CC 1 3.6 Positive power supply. 3 GND1 0 Ground. N.C. No connection. 5 CDMAIN 1.2 7 CDMAINX 1.2 9 FMIN 1.2 11 FMINX 1.2 Differential input pins for received CDMA IF signal. Differential input pins for received FM IF signal.

12 BP1

13 BP2

2.4 Connected to GND with

capacitor 0.01µF. 14 GND2 0 Ground for output stage. 15 V CC 2 3.6 16 N.C. Positive power supply for output stage. No connection. 17 OUT 1.7 Differential output pins for received IF signal. 19 OUTX 1.7 VCC 1 GND1 30k 5 7 GND1 2k2k GND1 2k2k 9 11 20k VCC 2 GND2 20k 12 13 1719

– 5 – CXA3001N Pin No. Symbol Pin voltage Typ. (V) Equivalent circuit Description N.C. No connection.

23 GCTL Gain control pin with a ripple

filter.

24 PSV

Power save function pin. High: Active Low: Power save VCC 1 GND1 40k VCC 1 GND1

– 6 – CXA3001N

Electrical Characteristics

DC characteristics (VCC = 3.6V, Ta = 25°C) Parameter Symbol Conditions Min. Typ. Max. Unit Current consumption 1 Current consumption 2 Current consumption 3 Current consumption 4 Input current pin 1H Input current pin 1L Input current pin 23H Input current pin 23L Input current pin 24H Input current pin 24L MODE high voltage MODE low voltage PSV high voltage PSV low voltage I CC 1 ICC 2 ICC 3 ICC 4 IMODE H IMODE L IGCTL H IGCTL L IPSV H IPSV L VMH VML VPSH VPSL VGCTL = 1.5V, Pin 2 VGCTL = 1.5V, Pin 15 VPSV = 0.5V, Pin 2 VPSV = 0.5V, Pin 15 VMODE = 3V VMODE = 0.5V VGCTL = 3V VGCTL = 0.5V VPSV = 3V VPSV = 0.5V Pin 1 Pin 1 Pin 24 Pin 24 4.7 –20 –10 –10 6.6 9.0 0.5 0.5 mA µA V AC characteristics (VCC = 3.6V, Ta = 25°C) Parameter Symbol Conditions Min. Typ. Max. Unit Operating frequency range Gain CDMA2.3 Gain CDMA1.5 Gain CDMA0.7 CDMA Gain slope Gain FM2.3 Gain FM1.5 Gain FM0.7 FM Gain slope Input level 3rd order intercept point Noise Figure F R G CDMA2.3 G CDMA1.5 G CDMA0.7 G CLIN G FM2.3 G FM1.5 G FM0.7 G FMLIN IIP3 NF VMODE = "H" f = 85.38MHz VGCTL = 2.3V Level = –50dBm VMODE = "H" VGCTL = 1.5V Level = –30dBm VMODE = "H" VGCTL = 0.7V Level = –10dBm VMODE = "H" V GCTL = 1 to 2V VMODE = "L" f = 85.38MHz VGCTL = 2.3V Level = –50dBm VMODE = "L" VGCTL = 1.5V Level = –30dBm VMODE = "L" VGCTL = 0.7V Level = –10dBm VMODE = "L" V GCTL = 1 to 2V VMODE = "H" G CDMA = 40dB* F1 = 86.38MHz F2 = 87.38MHz Measure of 85.38MHz VMODE = "H" G CDMA = 40dB* Used 1MHz BPF Measure of 85.38MHz –7.5 –55 –7.5 –55 –42 –49 –49 –38 6.5 100 1.5 –44 1.5 –44 9.5 MHz dB dB/V dB dB/V dBm dB * Adjust GCTL voltage, and set the overall gain to 40dB.

– 7 – CXA3001N Measurement Circuit 1000p 1000p 1.2k 10k 10k 680n 1 : 3 CDMA INPUT 0.01µ 1000p 1000p 1.2k 10k 10k 680n 1 : 3 FM INPUT 0.01µ 0.01µ V24 V231k 1000p 1000p 10k 10k 3 : 1 OUTPUT 220 220 0.01µ V15 0.01µ 12 13

241 MODE PSV

V CC 2 GND2 V11 V12 A24 A23 V19 V17 A15 V13

– 8 – CXA3001N Application Circuit 1000p CDMA RX IF INPUT 0.01µ 0.01µ 220 220 CDMA RX BPF 1000p ∗∗FM RX BPF 1000p 1000p 0.01µ 0.01µ 0.1µ 0.01µ RX IF BPF Gain Control Voltage VCC RX IF OUTPUT FM RX IF INPUT Active Sleep CDMA FM CXA3001 12 13 241 Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. * Must be adjusting values to result a best impedance matching between BPF filter and this IC.

– 9 – CXA3001N Design Reference Values Single ended measurement (VCC = 3.6V, Ta = 25°C) Item Symbol Conditions Typ. Unit Input resistance Input capacitance Output resistance R IN C IN R OUT f = 85.38MHz, VGCTL = 1.5V 900 Ω pF Ω Notes on Operation 1) This IC is a wideband amplifier with wide gain control range. Separate Pin 3 (GND1) and Pin 14 (GND2) to prevent interference between input and output. Furthermore, the decoupling capacitors between Pins 2 and 3, Pins 14 and 15 should be as close to the IC as possible. 2) The resistors connected to Pins 17 and 19 should be as close to the IC as possible. 3) This IC assumes the excellent characteristics when the differential input impedance between Pins 5 and 7, Pins 9 and 11 is 500Ω . Refer to the Measurement Circuit for the external element settings, etc. 4) Connect the capacitors, which are connected to Pins 12 and 13, to Pin 14 (GND2). 5) Pay attention to handling this IC because its electrostatic discharge strength is weak.

– 10 – CXA3001N VCC = 3.6VSensitivity Power gain [dB] VGCTL [V] 0.5 0 1 1.5 2 2.5 3 3.5 –20 –40 –60 VCC = 3.6VIIP3 –60 IIP3 [dBm] Power gain [dB] –40–60 0 –20 40 20 –50 –40 –30 –20 –10 T = –40deg T = 25deg T = 85deg Ta = –40deg Ta = 25deg Ta = 85deg

– 11 – CXA3001N VCC = 3.6VNoise Figure Noise figure [dB] Power gain [dB] –40 –20 0 20 40 –60 60 Gain Error from Room Temp. Gain error [dB] Power gain [dB] –60 –40 –20 0 20 40 60 VCC = 3.6V Ta = –40deg Ta = 25deg Ta = 85deg Ta = –40deg Ta = 85deg

– 12 – CXA3001N Package Outline Unit: mm SONY CODE EIAJ CODE JEDEC CODE SSOP-24P-L01 A SIMILAR TO SSOP024-P-0300 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT

42 ALLOY

24PIN SSOP (PLASTIC) 275mil ∗7.8 ± 0.1 24 13 1 12 0.22 – 0.05 + 0.1 + 0.05 7.6 ± 0.2 A 1.25 – 0.1 + 0.2 0.1 ± 0.1 0.5 ± 0.2 0° to 10° 0.10 DETAIL A NOTE : ∗NOT INCLUDE MOLD FINS. 5.6 ± 0.1