ILH100 SIEMENS | Alldatasheet

Document overview

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Technical content

5–1

FEATURES

  • Operating Temperature Range, –55 C to +125 C
  • Current Transfer Ratio Guaranteed from –55 C to +100 C Ambient Temperature Range
  • High Current Transfer Ratio at Low Input Cur- rent
  • Isolation Test Voltage, 3000 VDC
  • Base Lead Available for Transistor Biasing
  • Standard 8 Pin DIP Package

DESCRIPTION

The ILH100 is designed especially for hi-rel applica- tions requiring optical isolation with high current transfer ratio and low saturation VCE. Each opto- coupler consists of a light emitting diode and a NPN silicon phototransistor mounted and coupled in an 8 pin hermetically sealed DIP package. The ILH100's low input current makes it well suited for direct CMOS to LSTTL/TTL interfaces. Maximum Ratings Emitter Peak Forward Current (1) Derate Linearly from 25 C Detector Derate Linearly from 25 C Package Input–Output Isolation Test Voltage (2) C to +150 C C C Soldering Time at 240 Derate Linearly from 25 C Notes: 1. Values applies for P W 1 ms, PRR£300 pps. 2. Measured between pins 1,2,3 and 4 shorted together and pins 5,6,7 and 8 shorted together. T A =25 C and duration=1 second, RH=45%. Dimensions in inches (mm) .390–.005 1 2 3 4 8 7 6 5 Siemens XXX XXXX XXYY .320 (8.13) max. .125 (3.18) min. .018–.002 (.46–.05) .100 –.010 (2.54–.25) .020 (.51) min. .150 (3.81) max. .010–.002 (.25–.05) .300 (7.62) typ. (9.91–.13) Cathode Anode Base Collector Emitter ILH100 HERMETIC PH OTOTRANSISTOR OPTOCOUPLER

5–2 ILH100 Characteristics A =25 C, unless otherwise specified) Typical Switching Speeds A =25 Parameter Symbol Min. Typ. Max. Unit Condition Emitter Forward Voltage V F 1.45 1.7 V I F =60 mA Reverse Breakdown Voltage V BR 6V I R =10 m A Reverse Current I R 0.01 10 m AV R =6 V Capacitance C J 20 pF V F =0 V, f=1 MHz Thermal Resistance R TH 220 C/W Junction to Lead Detector Collector-Emitter Saturation Voltage V CE(sat) 0.25 0.4 V I B =20 m A, I CE =1 mA Base-Emitter Voltage V BE

0.65 V I

B =20 m A Collector-Emitter Leakage Current I CEO 55 0 n A V CE =10 V DC Forward Current Gain HFE 250 400 750 V CE =10 V, I B =20 m A Saturated DC Forward Gain HFE (sat) 125 200 325 V CE =0.4 V, I B =20 m A Capacitance C CE C CB C EB 6.8 8.5 pF pF pF V CE =5 V, f=1 MHz Thermal Resistance R TH 220 C/W Junction to Lead Coupled Characteristics (-55 C to 100 Saturated Current Transfer Ratio CTR (sat) 70 210 250 % I F =10 mA V CE =0.4 V Current Transfer Ratio, Collector-Emitter CTE ce 100 300 450 % I F =10 mA, V CE =10 V Current Transfer Ratio, Collector-Base CTR cb 0.4 0.7 0.9 % I F =10 mA, V CB =9.3 V Isolation and Insulation Common Mode Rejection Output High CM H 1000 2000 V/ m sV CM =500 V p-p , V CC =5 V, R L =1 K W I F =0 mA Common Mode Rejection Output High CM L 1000 2000 V/ m sV CM =500 V p-p , V CC =5 V, R L =1 K W I F =10 mA Package Capacitance C IO 1.5 pF V IO =0 V, 1 MHz Insulation Resistance R IO W V IO =500 VDC Leakage Current, Input-Output I IO m A Relative Humidity 50%, V IO 3000 VDC, 5 sec. Non-Saturated Switching Symbol Typ. Max. Unit Test Condition Delay td 0.8 2 m s Rise tr 2 5 m sV CC =5 V Storage ts 0.4 1.5 m sR L =75 W Fall tf 2 5 m sI F =10 mA Propagation-High to Low tpHL 1 3 m s 50% of V PP Propagation-Low to High tpLH 1.5 4 m sR BE =open Saturated Switching (1) Delay td 0.7 2 m sV CE =0.4 V Rise tr 1 3 m sV CE =0.4 V Storage ts 13.5 30 m sR L =1 K W Fall tf 12 30 m sI F =10 mA Propagation-High to Low tpHL 1.4 5 m sV CC =5 V, V TH =1.5 V Propagation-Low to High tpLH 15 40 m sR BE=open

Figure 27. Propagation delay versus collector load and Figure 28. Propagation delay versus collector load and Figure 29. Propagation delay versus collector load and Figure 30. Propagation delay versus collector load and

82 KW (tpHL)

82 KW (tpLH )

Figure 24. Switching time waveform and test schematic— Figure 25. Propagation delay versus temperature and col- Figure 26. Propagation delay versus temperature and

Figure 34. Propagation delay versus collector load and Figure 35. Common mode transient rejection

1000 Open(tpHL)

Figure 31. Propagation delay versus collector load and Figure 32. Propagation delay versus collector load and Figure 33. Propagation delay versus collector load and