ILA7050N IKSEMICON | Alldatasheet

Document overview

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Technical content

Features

  • Limited to battery supply application only (typ. 3 and 4 V)
  • Operates with supply voltage down to 1,6 V
  • No external components required
  • Very low quiescent current
  • Fixed integrated gain of 26 dB, floating differential input
  • Flexibility in use - mono BTL as well as stereo
  • Small dimension of encapsulation (see package design example) QUICK REFERENCE DATA Supply voltage range Vp 1,6 to 6,0 V Total quiescent current (at Vp = 3 V) ltot typ. 3,2 mA Bridge tied load application (BTL) Output power at R) = 32 Q Vp=3V;dtat=10% PO typ. 140 mW D.C. output offset voltage between the outputs lAVI max. 70 mV Noise output voltage (r.m.s. value) at f = 1 kHz; Rg = 5 kfit Vno(rms) typ. 140 mV Stereo application Output power at R( = 32 Ω dtot = 10%; Vp = 3V PO typ. 35 mW dtot = 10%; Vp= 4,5V PO typ. 75 mW Channel separation at Rs = 0 Ω; f = 1 kHz K typ. 40 dB Noise output voltage (r.m.s. value) at f = 1 kHz; Rs = 5 kΩ Vno(rms) typ. 100 mV PACKAGE OUTLINE 8-lead DIL; plastic (SOT97); SOT97-1; Rev. 00

CHARACTERISTICS Vp = 3 V; f = 1 kHz; RL = 32 0., Tamb = 25 °C; unless otherwise specified PARAMETER SYMBOL MIN. TYP. MAX. UNIT Supply Supply voltage Vp 1,6 - 6,0 V Total quiescent current Itot - 3,2 4 mA Bridge-tied load application (BTL); see Fig.4 Output power; note 1 Vp = 3,0 V; diet = 10% PO - 140 - mW Vp = 4,5 V; diet = 10% (RL = 64 Q) PO - 150 - mW Voltage gain GV - 32 - dB Noise output voltage (r.m.s. value) RS = 5 kQ.-, f = 1 kHz Vno(rms) - 140 - mV RS = 0 Q; f = 500 kHz; B =5 kHz Vno(rms) - tbf - mV D.C. output offset voltage (at Rs = 5 kΩ) l∆VI - - 70 mV Input impedance (at Rs =∞) IZiI 1 - - MΩ Input bias current Ii - 40 - nA Stereo application; Output power; note 1 Vp=3,OV;dtot=10% PO - 35 - mW Vp=4,5V;dtot=10% PO - 75 - mW Voltage gain GV 24.5 26 27.5 dB Noise output voltage (r.m.s. value) RS = 5 kΩ; f = 1 kHz Vno(rms) - 100 - mV RS = 0 Ω; f = 500 kHz; B =5 kHz Vno(rms) - tbf - mV Channel separation RS = 0 Ω; f = 1 kHz K 30 40 - dB Input impedance (at Rs = ∞) IZjl 2 - - MΩ Input bias current Ii - 20 - nA Note 1. Output power is measured directly at the output pi ns of the IC. It is show n as a f unction of the supply voltage in F ig.2 (BTL application) and Fig.3 (stereo application). Аpplication diagram (BTL) Аpplication diagram (stereo) Rev. 00

(MS – 001BA) Symbol MIN MAX A 8.51 10.16 B 6.1 7.11 C 5.33 D 0.36 0.56 F 1.14 1.78 G H J 0° 10° K 2.92 3.81 NOTES: L 7.62 8.26 1. Dimensions “A”, “B” do not include mold flash or protrusions. M 0.2 0.36 Maximum mold flash or protrusions 0.25 mm (0.010) per side. N 0.38 Dimension, mm 2.54 7.62 L H M J A B F G D SEATING PLANE N K 0.25 (0.010) M T -T- C Rev. 00