DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 14

Technical content

Features

A bsolute M axim um Ratings M in M ax U nit N otes Input voltage (+In to –In) O perating 3 8 6 0 V dc N on-operating 75 V dc <100 m S Input voltage slew rate 5 V / μs EN to –IN -0.5 2 0 V dc O utput voltage (+O ut to –O ut) -0.5 13 .8 V dc O utput current 6 4 A P out ≤ 6 50 W Dielectric w ithstand (input to output) 1,500 V dc 1 m in. Tem perature O perating junction -4 0 12 5 °C H ottest Sem iconductor Storage -55 12 5 °C [A] For low er pow er applications see 3 00 W m odel IB 04 8E096 T4 0N 1-00 or 500 W m odel IB 04 8E096 T4 8N 1-00 A pplications

  • Enterprise netw orks
  • O ptical access netw orks
  • Storage netw orks
  • Autom ated test equipm ent Size: 2 .3 0 x 1.4 5 x 0.4 2 in 58,4 x 3 6 ,8 x 10,6 m m

IBC M O D U LE Rev 1.6 vicorpow er.com Page 2 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 A ll specifications valid at 48 V IN, 1 0 0 % rated load and 2 5 °C am bient, unless otherw ise indicated. SPECIFICATIO N S

Electrical Characteristics

[a] Does not exceed IP C-9592 derating guidelines. At 70 °C am bient, full pow er operation m ay exceed IP C-9592 guidelines, but does not exceed com ponent ratings, does not activate O TP and does not com prom ise reliability. A ttribute Sym bol Conditions / N otes M in Typ M ax U nit IN PU T (O perating from DC input source) O perating input voltage 3 8 4 8 55 V dc N on-operating input surge w ithstand <100 m S 75 V dc O perating input dV /dt 0.003 5 V /us Undervoltage protection Turn-on 3 3 3 8 V dc Turn-off 3 1 3 6 V dc Turn-o n/Turn-off hysteresis 2 V dc Tim e constant 7 µs Undervoltage blanking tim e UV blanking tim e is enabled after start up 50 100 2 00 µs O vervoltage protection Turn-off 6 0 6 4 V dc Turn-on 55 6 4 V dc Tim e constant 4 µs Turn O N delay Start up inhibit V IN reaching turn-on voltage 2 0 2 5 3 0 m s to enable function operational, see Figure 6 Turn-on delay Enable to 10% V O UT ; pre-applied V IN , 50 µs see Figure 7, 0 load capacitance O utput voltage rise tim e From 10% to 90% V O UT , 10% load, 50 µs 0 load capacitance Restart turn-on delay See page 10 for restart after EN pin disable 2 50 m s N o Load pow er dissipation Enabled 2 .3 3 .5 W Disabled 0.12 0.15 W Input current Low line, full load 14 .1 A Inrush current overshoot Using test circuit in Figure 2 1, 15% load, high line 15.5 A Input reflected ripple current At m ax pow er; 750 m Arm s Using test circuit in Figure 2 2 ; see Fig 5 P eak short circuit input current 4 0 A Repetitive short circuit peak current 2 5 A Internal input capacitance 17.6 μF Internal input inductance 5 nH Recom m ended external 2 00 nH m axim um source inductance 4 7 4 70 μFinput capacitance O U TPU T DC O utput voltage band N o load, over V in range 7.2 9.6 12 .0 V O utput pow e r[a] 3 8-55 V IN 0 4 80 W 4 8-55 V IN 0 6 00 W 52 -55 V IN 0 6 50 W O utput current P ≤ 6 50 W 6 4 A O utput start up load of Iout m ax, m axim um output capacitance 15 % Effective output resistance 3 .2 m Ω Line regulation (K factor) V O UT = K • V IN @ no load 0.198 0.2 00 0.2 02 0 Current share accuracy Full pow er operation; See P arallel O peration 10 % on page 11; up to 3 units

IBC M O D U LE Rev 1.6 vicorpow er.com Page 3 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 A ttribute Sym bol Conditions / N otes M in Typ M ax U nit O U TPU T (Continued) Efficiency 50% load See Figure 1,2 and 3 97.8 98.1 % Full load See Figure 1,2 and 3 97.0 97.2 % Internal output inductance 1.6 nH Internal output capacitance 92 .4 μF Load capacitance 0 4 500 μF O utput O V P set point M odule w ill shutdow n 12 V dc O utput voltage ripple 2 0 M H z bandw idth, using test circuit in 6 0 150 m V p-p Figure 2 3 O f Iout m ax., w ill not shutdow n w hen started O utput O verload protection threshold into m ax Cout; and 15% load 105 150 % Auto restart w ith duty cycle <10% O ver current protection tim e constant 1.2 m s Short circuit current response tim e 1.5 µs Sw itching frequency 1.0 M H z Transient Response Voltage overshoot 2 5% load step; 1 A/μS; See Figures 13 & 14 100 m V Response tim e See Figures 13 & 14 1 µs V IN step 5 V step in 1 μS w ithin V in operating range 1.2 5 V P re-bias voltage Unit w ill start up 0 12 V dc into pre-bias voltage on output Electrical Characteristics (Continued) SPECIFICATIO N S (CO N T.) A ttribute Sym bol Conditions / N otes M in Typ M ax U nit M TB F Calculated per Telcordia SR-3 3 2 , 4 0 °C 1.0 M hrs Service life Calculated at 3 0 °C 7 Years O ver tem perature shut dow n TJ; Converter w ill reset w hen over 12 5 13 0 13 5 °C tem perature condition is rem oved Dielectric w ithstand Input to output 1,500 V dc Insulation resistance Input to output 3 0 M Ω M echanical W eight 1.3 8 /3 9.1 oz/g Length 2 .3 0/58.4 in/ m m W idth 1.4 5/3 6 .8 in/ m m H eight above custom er board 0.4 2 /10.6 in/ m m Clearance to custom er board From low est com ponent on IB C 0.12 /0.3 0 in/ m m Agency approvals UL/ CSA 6 0950, EN 6 0950 cTUVus (pending for baseplate version) Low voltage directive CE Altitude, operating Derate operating tem p 1 °C -500 10,000 Feet per 1,000 feet above sea level Relative hum idity, O perating N on condensing 10 90 % RoH S com pliance Com patible w ith RoH S directive 2 00 2 / 95 / EC G eneral Characteristics A ll specifications valid at 48 V IN , 1 0 0 % rated load and 2 5 °C am bient, unless otherw ise indicated. Conditions: 25 °C case, 75% rated load and specified input voltage range unless otherw ise specified.

IBC M O D U LE Rev 1.6 vicorpow er.com Page 4 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 Test D escription Test D etail Q uantity Tested Low Tem p 3 H igh Tem p 3 Rapid Therm al Cycling 3 5.2 .3 H ALT (H ighly Accelerated Life testing) 6 DO F Random V ibration Test 3 Input Voltage Test 3 O utput Load Test 3 Com bined Stresses Test 3 5.2 .4 TH B (Tem p. H um idity B ias) (72 hr presoak required) 1000 hrs – Continuous B ias 3 0 P ow er cycle - O n 4 2 m inutes 5.2 .5 H TO B (H igh Tem p. O perating B ias) O ff 1 m inute, O n 1 m inute, O ff 1 m inute, O n 1 m inute, O ff 1 m inute, 3 0 O n 1 m inute, O ff 1 m inute, O n 1 m inute, O ff 10 m inutes. Alternating betw een m axim um and m inim um operating Voltage every hour. 5.2 .6 TC (Tem p. Cycling) 700 cycles , 3 0 m inute dw ell at each extrem e – 2 0C m inim um ram p rate. 3 0 5.2 .7 P ow er Cycling Reference IP C-9592 A 3 Random V ibration – O perating IEC 6 006 8-2 -6 4 (norm al operation vibration) 3 Random V ibration N on-operating (transportation) IEC 6 006 8-2 -6 4 3 5.2 .8 – 5.2 .13 Shock and V ibration Shock O perating - norm al operation shock IEC 6 006 8-2 -2 7 3 Free fall - IEC 6 006 8-2 -3 2 3 Drop Test 1 full shipping container (box) 12 5.2 .14 .1 Corrosion Resistance – N ot required N /A 5.2 .14 O ther Environm ental Tests 5.2 .14 .2 Dust Resistance – Unpotted class II G R-12 74 -CO RE 3 5.2 .14 .3 SM T Attachm ent Reliability IP C-9701 - J-STD-002 3 5.2 .14 .4 Through H ole solderability – J-STD-002 5 ESD Classification Testing Sam ple size assum es CDM testing 12 Total Q uantity 161 Environm ental Q ualification SPECIFICATIO N S (CO N T.) IPC-9592A , Based on Class II Category 2 the follow ing detail is applicable. – Pre-conditioning required A ttribute Sym bol Conditions / N otes M in Typ M ax U nit Enable (negative logic) Referenced to –IN M odule enable threshold 0.8 V dc M odule enable current V EN = 0.8 V 13 0 2 00 µA M odule disable threshold 2 .4 V dc M odule disable current V EN = 2 .4 V 10 µA Disable hysteresis 500 m V Enable pin open circuit voltage 2 .5 3 .0 V dc EN to –IN resistance O pen circuit 3 5 kΩ Enable (positive logic) Referenced to –IN M odule enable threshold 2 .0 2 .5 3 .0 V dc M odule disable threshold 1.4 5 V dc EN source current (operating) V EN = 5 V 2 m A EN voltage (operating) 4 .7 5 5.3 V dc Control & Interface Specifications

IBC M O D U LE Rev 1.6 vicorpow er.com Page 5 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 Efficiency TAMB 25 °C Efficiency (%) Iout (A)

38 V 48 V 55 V V :IN

92% 93% 94% 95% 96% 97% 98% 99% 0 13 26 38 51 64 Efficiency TAMB 55 °C Efficiency (%) Iout (A) 92% 93% 94% 95% 96% 97% 98% 99% 0 13 26 38 51 64 Efficiency TAMB 70 °C Efficiency (%) Iout (A) 92% 93% 94% 95% 96% 97% 98% 99% 0 13 26 38 51 64 Figure 1 — Efficiency vs. output current, 2 5 °C am bient Figure 2 — Efficiency vs. output current, 55 °C am bient Figure 3 — Efficiency vs. output current, 7 0 °C am bient Figure 4 — Inrush current at high line 1 5% load; 5 A /div, M ax load capacitance Figure 5 — Input reflected ripple current at nom inal line, full load. See Fig 2 2 for setup. Figure 6 — Turn on delay tim e; VIN turn on delay at nom inal line, 1 5% load SPECIFICATIO N S (CO N T.) W AVEFO RM S

IBC M O D U LE Rev 1.6 vicorpow er.com Page 8 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 SPECIFICATIO N S (CO N T.) Output Current (A) Output Current Derating Ambient Air Temperature (°C)

200 LFM 400 LFM 600 LFM

Figure 19 — M axim um output pow er derating vs am bient air tem perature Transverse airflow , Board and junction tem peratures <1 2 5 °C. Tested w ith IBC evaluation board IB0 48 Q 0 96 T6 4N 1 -CB Output Current (A) Output Current Derating Ambient Air Temperature (°C) Figure 20 — M axim um output pow er derating vs am bient air tem perature. Longitudinal airflow , Board and junction tem peratures <1 2 5 °C. Tested w ith IBC evaluation board IB0 48 Q 0 96 T6 4N 1 -CB Vsource Current Probe 47 µF IBC +IN EN –IN +OUT –OUT Load *Maximum load capacitance Figure 21 — Test circuit; inrush current overshoot Vsource Current Probe 470 µF IBC +IN EN –IN +OUT –OUT Load 10 µH Figure 22 — Test circuit; input reflected ripple current W AVEFO RM S (CO N T.) +IN –IN +OUT –OUT IBC E – Load Cy = 4700 pF

20 MHz BW

10 µF 0.1 µF Cy b Cy d Cy cCy a a-d Figure 23 — Test circuit; output voltage ripple

IBC M O D U LE Rev 1.6 vicorpow er.com Page 10 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 + In / -In – D C Voltage Input Pins The IB C input voltage range should not be exceeded. An internal undervoltag e/ overvoltage lockout function prevents operation outside of the norm al operating input range. The IB C turns on w ithin an input voltage w indow bounded by the “Input under-voltage turn-on” and “Input over-voltage turn-off” levels, as specified. The IB C m ay be protected against accidental application of a reverse input voltage by the addition of a rectifier in series w ith the positive input, or a reverse rectifier in shunt w ith the positive input located on the load side of the input fuse. The connection of the IB C to its pow er source should be im plem ented w ith m inim al distribution inductance. If the interconnect inductance exceeds 100 nH , the input should be bypassed w ith a RC dam per to retain low source im pedance and stable operation. W ith an interconnect inductance of 2 00 nH , the RC dam per m ay be 4 7 μF in series w ith 0.3 Ω. A single electrolytic or equivalent low -Q capacitor m ay be used in place of the series RC bypass. EN - Enable/D isable N egative Logic O ption If the EN port is left floating, the IB C output is disabled. O nce this port is - pulled low er than 0.8 V dc w ith respect to –In, the output is enabled. The EN port can be driven by a relay, opto-coupler, or open collector transistor. Refer to Figures 6 and 7 for the typical enable / disable characteristics. This port should not be toggled at a rate higher than 1 H z. The EN port should also not be driven by or pulled up to an external voltage source. Positive Logic O ption If the EN port is left floating, the IB C output is enabled. O nce this port is pulled low er than 1.4 V dc w ith respect to –In, the output is disabled. This action can be realized by em ploying a relay, opto-coupler, or open collector transistor. This port should not be toggled at a rate higher than 1 H z. The EN port should also not be driven by or pulled up to an external volt - age source. The EN port can source up to 2 m A at 5 V dc. The EN port should never be used to sink current. If the IB C is disabled using the EN pin, the m odule w ill attem pt to restart approxim ately every 2 50m s. O nce the m odule has been disabled for at least 2 50m s, the turn on delay after the EN pin is enabled w ill be as show n in Figure 7. + O ut / -O ut – D C Voltage O utput Pins Total load capacitance at the output of the IB C should not exceed the specified m axim um . O w ing to the w ide bandw idth and low output im pedance of the IB C, low frequency bypass capacitance and significant energy storage m ay be m ore densely and efficiently provided by adding capacitance at the input of the IB C. PIN / CO N TRO L FU N CTIO N S Top View Pin Function

1 V in+

2 Enable

3 V in-

4 Vout-

5 Vout+

Figure 30 — IBC Pin D esignations

IBC M O D U LE Rev 1.6 vicorpow er.com Page 11 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 Parallel O peration The IB C w ill inherently current share w hen operated in an array. Arrays m ay be used for higher pow er or redundancy in an application. Current sharing accuracy is m axim ized w hen the source and load im pedance presented to each IB C w ithin an array are equal. The recom m ended m ethod to achieve m atched im pedances is to dedicate com m on copper planes w ithin the P CB to deliver and return the current to the array, rather than rely upon traces of varying lengths. In typical applications the current being delivered to the load is larger than that sourced from the input, allow ing narrow er traces to be utilized on the input side if necessary. The use of dedicated pow er planes is, how ever, preferable. O ne or m ore IB Cs in an array m ay be disabled w ithout adversely affecting operation or reliability as long as the load does not exceed the rated pow er of the enabled IB Cs. The IB C pow er train and control architecture allow bi-directional pow er transfer, including reverse pow er processing from the IB C output to its input. The IB C’s ability to process pow er in reverse im proves the IB C tran - sient response to an output load dum p. Therm al Considerations The tem perature distribution of the V I B rick can vary significantly w ith its inpu t/output operating conditions, therm al m anagem ent and environm ental conditions. Although the P CB is UL rated to 13 0 °C, it is recom m ended that P CB tem peratures be m aintained at or below 12 5 °C. For m axim um long term reliability, low er P CB tem peratures are recom m ended for continuous operation, how ever, short periods of operation at 12 5 °C w ill not negatively im pact perform ance or reliability. W ARN IN G : Therm al and voltage hazards. The IB C can operate w ith surface tem peratures and operating voltages that m ay be hazardous to personnel. Ensure that adequate protection is in place to avoid inadvertent contact. Input Im pedance Recom m endations To take full advantage of the IB C capabilities, the im pedance presented to its input term inals m ust be low from DC to approxim ately 5 M H z. The source should exhibit low inductance and should have a critically dam ped response. If the interconnect inductance is excessive, the IB C input pins should be bypassed w ith an RC dam per (e.g., 4 7 μF in series w ith 0.3 Ω) to retain low source im pedance and proper operation. G iven the w ide bandw idth of the IB C, the source response is generally the lim iting factor in the overall system response. Anom alies in the response of the source w ill appear at the output of the IB C m ultiplied by its K factor. The DC resistance of the source should be kept as low as possible to m inim ize voltage deviations. This is especially im portant if the IB C is operated near low or high line as the overvoltag e/ undervoltage detection circuitry could be activated. Input Fuse Recom m endations The IB C is not internally fused in order to provide flexibility in configuring pow er system s. H ow ever, input line fusing of V I B ricks m ust alw ays be incorporated w ithin the pow er system . A fast acting fuse should be placed in series w ith the +In port. See safety agency approvals. A pplication N otes For IB C and V I B rick application notes on soldering, therm al m anagem ent, board layout, and system design visit vicorpow er.com . A PPLICATIO N S N O TE Product Input Package N om inal Tem perature O utput Enable Pin O ptions Fam ily Voltage O utput Voltage G rade Current Logic Length IB 04 8 Q 096 T 6 4 N = N egative 1 = 0.14 5 -00 = O pen fram e P = P ositive 2 = 0.2 10 -B P = B aseplate* 3 = 0.180 PA RT N U M BERIN G *For baseplate option please contact the factory for availability.

IBC M O D U LE Rev 1.6 vicorpow er.com Page 13 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 Top View Figure 33 — IBC PCB recom m ended hole pattern M ECH A N ICA L D RA W IN G S

IBC M O D U LE Rev 1.6 vicorpow er.com Page 14 of 14 11/2 012 80 0 73 5 .620 0 IB0 48Q 0 96T64N 1-0 0 Vicor’s com prehensive line of pow er solutions includes high density A C-D C and D C-D C m odules and ac - cessory com ponents, fully configurable A C-D C and D C-D C pow er supplies, and com plete custom pow er system s. Inform ation furnished by V icor is believed to be accurate and reliable. H ow ever, no responsibility is assum ed by V icor for its use. V icor m akes no representations or w arranties w ith respect to the accuracy or com pleteness of the contents of this publication. V icor reserves the right to m ake changes to any products, specifications, and product descriptions at any tim e w ithout notice. Inform ation published by V icor has been checked and is believed to be accurate at the tim e it w as printed; how ever, V icor assum es no responsibility for inaccuracies. Testing and other quality controls are used to the extent V icor deem s necessary to support V icor’s product w arranty. Except w here m andated by governm ent requirem ents, testing of all param eters of each product is not necessarily perform ed. Specifications are subject to change w ithout notice. Vicor’s Standard Term s and Conditions All sales are subject to V icor’s Standard Term s and Conditions of Sale, w hich are available on V icor’s w ebpage or upon request. Product W arranty In V icor’s standard term s and conditions of sale, V icor w arrants that its products are free from non-conform ity to its Standard Specifications (the “Ex - press Lim ited W arranty”). This w arranty is extended only to the original B uyer for the period expiring tw o (2 ) years after the date of shipm ent and is not transferable. UN LESS O TH ERW ISE EX P RESSLY STATED IN A W RITTEN SALES AG REEM EN T SIG N ED B Y A DULY AUTH O RIZED V ICO R SIG N ATO RY, V ICO R DISCLAIM S ALL REP RESEN TATIO N S, LIAB ILITIES, AN D W ARRAN TIES O F AN Y K IN D (W H ETH ER ARISIN G B Y IM P LICATIO N O R B Y O P ERATIO N O F LAW ) W ITH RE - SP ECT TO TH E P RO DUCTS, IN CLUDIN G , W ITH O UT LIM ITATIO N , AN Y W ARRAN TIES O R REP RESEN TATIO N S AS TO M ERCH AN TAB ILITY, FITN ESS FO R PARTICULAR P URP O SE, IN FRIN G EM EN T O F AN Y PATEN T, CO P YRIG H T, O R O TH ER IN TELLECTUAL P RO P ERTY RIG H T, O R AN Y O TH ER M ATTER. This w arranty does not extend to products subjected to m isuse, accident, or im proper application, m aintenance, or storage. V icor shall not be liable for collateral or consequential dam age. V icor disclaim s any and all liability arising out of the application or use of any product or circuit and assum es no liability for applications assistance or buyer product design. B uyers are responsible for their products and applications using V icor products and com ponents. P rior to using or distributing any products that include V icor com ponents, buyers should provide adequate design, testing and operat - ing safeguards. V icor w ill repair or replace defective products in accordance w ith its ow n best judgm ent. For service under this w arranty, the buyer m ust contact V icor to obtain a Return M aterial Authorization (RM A) num ber and shipping instructions. P roducts returned w ithout prior authorization w ill be re - turned to the buyer. The buyer w ill pay all charges incurred in returning the product to the factory. V icor w ill pay all reshipm ent charges if the prod - uct w as defective w ithin the term s of this w arranty. Life Support Policy V ICO R’S P RO DUCTS ARE N O T AUTH O RIZED FO R USE AS CRITICAL CO M P O N EN TS IN LIFE SUP P O RT DEV ICES O R SYSTEM S W ITH O UT TH E EX P RESS P RIO R W RITTEN AP P RO VAL O F TH E CH IEF EX ECUTIV E O FFICER AN D G EN ERAL CO UN SEL O F V ICO R CO RP O RATIO N . As used herein, life support de - vices or system s are devices w hich (a) are intended for surgical im plant into the body, or (b) support or sustain life and w hose failure to perform w hen properly used in accordance w ith instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical com ponent is any com ponent in a life support device or system w hose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. P er V icor Term s and Conditions of Sale, the user of V icor products and com ponents in life support applications assum es all risks of such use and indem nifies V icor against all liability and dam ages. Intellectual Property N otice V icor and its subsidiaries ow n Intellectual P roperty (including issued U.S. and Foreign P atents and pending patent applications) relating to the prod - ucts described in this data sheet. N o license, w hether express, im plied, or arising by estoppel or otherw ise, to any intellectual property rights is granted by this docum ent. Interested parties should contact V icor's Intellectual P roperty Departm ent. The products described on this data sheet are protected by the follow ing U.S. P atents N um bers: 5,94 5,13 0; 6 ,4 03 ,009; 6 ,710,2 57; 6 ,911,84 8; 6 ,93 0,893 ; 6 ,93 4 ,16 6 ; 6 ,94 0,013 ; 6 ,96 9,909; 7,03 8,917; 7,16 6 ,898; 7,187,2 6 3 ; 7,3 6 1,84 4 ; D4 96 ,906 ; D505,114 ; D506 ,4 3 8; D509,4 72 ; and for use under 6 ,975,098 and 6 ,984 ,96 5. Vicor Corporation 2 5 Frontage Road Andover, M A, USA 01810 Tel: 800-73 5-6 2 00 Fax: 978-4 75-6 715 em ail Custom er Service: custserv@ vicorpow er.com Technical Support: apps@ vicorpow er.com