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3.2 mm x 2.5 mm Ceramic Low Noise SMD VCXO I643 Series LVCMOS/LVPECL/LVDS ILSI America Phone 775-851-8880 ● Fax 775-851-8882 ●email: e-mail@ilsiamerica.com ● www.ilsiamerica.com Specifications subject to change without notice Rev: 03/10/15_A Page 1 of 3 Product Features Applications 3.20±0.10 2.50±0.10 1.00±0.15 2.30 .70 564 21 3 .60 TYP 1.60 1.30 TYP 1.80 .90.90 .80 PIN 1 PIN 3 Voltage Control Ground PIN CONNECTIONS PIN 2 Enable/Disable or N/C OutputPIN 4 PIN 5 Comp. Output or N/C Voltage SupplyPIN 6 Suggested Land Pattern Dimension Units: mm Marking Small Surface Mount Package xDSL Ethernet/LAN/WAN Fast Sample Delivery Broadcast Video Optical modules Fast Sample Delivery Wireless Base Stations Clock and data recovery Pb Free/ RoHS Compliant Sonet /SDH FPGA/ASIC Leadfree Processing WiMAX/WLAN Backplanes Server and Storage GPON Frequency LVCMOS LVPECL LVDS 10.000MHz to 250.000MHz 10.000MHz to 1500.000MHz 10.000MHz to 1500.000MHz Output Level LVCMOS LVPECL LVDS Logic “0” = 10% of Vcc max., Logic “1” = 90% of Vcc min. Logic “0”= Vcc-1.62V max., Logic “1” = 1.02 V min VOD = (Diff. Output) 350mV Typ. Duty Cycle LVCMOS LVPECL LVDS 50% ±5% @ 50% of Vcc 50% ±5% @ 50%* 50% ±5% @ 50%* Rise / Fall Time LVCMOS LVPECL LVDS 2.0 ns max. (10% to 90%)* 0.8 ns max. (20% to 80%)* 0.8 ns max. (20% to 80%)* Output Load LVCMOS LVPECL LVDS 15pF 50 to Vcc - 2.0 VDC RL=100 /CL= 5pF Frequency Stability See Table Below Supply Voltage (Vcc) +3.30 VDC ± 5%, +2.50 VDC ± 5% Aging ±3.0 ppm max per year Current HCMOS = 45 mA max LVPECL = 90 mA max LVDS = 35 mA max Linearity 10% max. Pullability See Table Below Control Voltage 1.65 VDC ± 1.65 VDC @ 3.3V 1.25 VDC ± 1.25 VDC @ 2.5V Input Impedance 50K min. Phase Jitter(RMS) At 12kHz to 20MHz 0.5 ps typical (12kHz to 20MHz) Operating Temp. Range See Table Below Storage Temp. Range -40 C to +85 C Part Number Guide Sample Part Number: I643–31AB9H2–155.520 Package Input Voltage Operating Temperature Stability (in ppm) Pullabilty Output Enable / Disable (Pin 2) Complimentary Ouput (Pin 5) ** Frequency I643 3 = 3.3V 1 = 0 C to +70 C F = 20 B = 50 3 = LVCMOS H = Enable 1 = N.C. -155.520 MHz 6 = 2.5V 2 = -40 C to +85 C A = 25 C = 100 8 = LVDS O = N/C 2 = Output 3 = -20 C to +70 C B = 50 9 = LVPECL NOTE: A 0.01 µF bypass capacitor is recommended between VDD (pin 6) and GND (pin 3) to minimize power supply noise. * Measured as percent of waveform. ** Available on LVDS and LVPECL ouput only.
3.2 mm x 2.5 mm Ceramic Low Noise SMD VCXO I643 Series LVCMOS/LVPECL/LVDS ILSI America Phone 775-851-8880 ● Fax 775-851-8882 ●email: e-mail@ilsiamerica.com ● www.ilsiamerica.com Specifications subject to change without notice Rev: 03/10/15_A Page 2 of 3 SSB Phase Noise (typ.) Offset 77.76 MHz 155.52 MHz 622.08 MHz 10Hz 100Hz 1kHz 10kHz 100kHz -75 dBc/Hz -105 dBc/Hz -117 dBc/Hz -123 dBc/Hz -125 dBc/Hz -62 dBc/Hz -101 dBc/Hz -112 dBc/Hz -115 dBc/Hz -118 dBc/Hz -47 dBc/Hz -79 dBc/Hz -100 dBc/Hz -104 dBc/Hz -106 dBc/Hz Typical Application: 0.01 uF Vcc N/C Vc Enable / N/C Oscillator Output 654 123 Pb Free Solder Reflow Profile: *Units are backward compatible with 240C reflow processes Package Information: MSL = N.A. (package does not contain plastic, storage life is unlimited under normal room conditions). Termination = e4 (Au over Ni over W base metallization).
3.2 mm x 2.5 mm Ceramic Low Noise SMD VCXO I643 Series LVCMOS/LVPECL/LVDS ILSI America Phone 775-851-8880 ● Fax 775-851-8882 ●email: e-mail@ilsiamerica.com ● www.ilsiamerica.com Specifications subject to change without notice Rev: 03/10/15_A Page 3 of 3 Tape and Reel Information: Environmental Specifications Thermal Shock MIL-STD-883, Method 1011, Condition A Moisture Resistance MIL-STD-883, Method 1004 Mechanical Shock MIL-STD-883, Method 2002, Condition B Mechanical Vibration MIL-STD-883, Method 2007, Condition A Resistance to Soldering Heat J-STD-020C, Tabl e 5-2 Pb-free devices (except 2 cycles max) Hazardous Substance Pb-Free / RoHS / Green Compliant Solderability JESD22-B102-D Method 2 (Preconditioning E) Terminal Strength MIL-STD-883, Method 2004, Test Condition D Gross Leak MIL-STD-883, Method 1014, Condition C Fine Leak MIL-STD-883, Method 1014, Condition A2, R1=2x10-8 atm cc/s Solvent Resistance MIL-STD-202, Method 215 Marking Line 1: ILSI and Date Code (YWW) Line 2: Frequency PROPRIETARY AND CONFIDENTIAL THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION, AND SUCH INFORMATION MAY NOT BE DISCLOSED TO OTHERS FOR ANY PURPOSE NOR USED FOR MANUFACTURING PURPOSES WITHOUT WRITTEN PERMISSION FROM ILSI America. Quantity per Reel 1000 A 16 +/-.3 B 8 +/-.2 C 7.5 +/-.2 D 17.5 +/-1 E 50 / 60 / 80 F 180 / 250