I631

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Technical content

5 mm x 7 mm Ceramic Low Noise SMD VCXO, LVCMOS / LVPECL / LVDS I631 - Series ILSI America Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com 10/17/12_B Specifications subject to change without notice Page 1 5.08 4.2 1.9 7.0 0.3 5.0 0.2 Recommended Pad Layout 5.08 1.9 Max. 2.0 Dimension Units: mm Pin Connection

1 Voltage Control

2 Enable/Disable or N/C

3 GND

4 Output

5 Output or N/C

6 VDD

10 MHz to 225 MHz

10 MHz to 1500 MHz

VOH=90% VDD min., VOL=10 % VDD max. VOD=(Diff. Output) 350mV Typ. Duty Cycle LVCMOS LVPECL LVDS 50% ±5% @ 50%VDD 50% ±5% @ 50%* 50% ±5% @ 50%* Rise / Fall Time LVCMOS LVPECL LVDS Output Load LVCMOS LVPECL LVDS 15pF 50  to VDD - 2.0 VDC RL=100 /CL=10pF Frequency Stability See Table Below Supply Voltage 3.3 VDC ± 10%, 2.5 VDC ± 5% Current LVCMOS = 25 mA max., LVPECL = 60 mA max. LVDS = 35 mA max. Linearity 10% max. Pullability See Table Below Control Voltage 1.65 VDC ± 1.65 VDC @ 3.3V 1.25 VDC ± 1.25 VDC @ 2.5V Input Impedance 50K  min. Phase Jitter (RMS) At 12kHz to 20 MHz 0.5 ps typical Operating Temp. Range See Table Below Storage -40 C to +100 C Part Number Guide Sample Part Number: I631–31AB9H2–155.520 Package Input Voltage Operating Temperature Stability (in ppm) Pullabilty Output Enable / Disable (Pin 2) Complimentary Ouput (Pin 5) ** Frequency I631 3 = 3.3V 1 = 0 C to +70 C F = 20 B =  50 3 = LVCMOS H = Enable 1 = N.C. -155.520 MHz 6 = 2.5V 3 = -20 C to +70 C A = 25 C = 100 8 = LVDS O = N/C 2 = Output 2 = -40 C to +85 C B = 50 9 = LVPECL NOTE: A 0.01 µF bypass capacitor is recommended between VDD (pin 6) and GND (pin 3) to minimize power supply noise. * Measured as percent of waveform. ** Available on LVDS and LVPECL ouput only. Product Features

Applications

Small Surface Mount Package xDSL Ethernet/LAN/WAN Low RMS Phase Jitter Broadcast video Optical modules Frequencies to 1500 MHz Wireless Base Stations Clock and data recovery Pb Free/ RoHS Compliant Sonet /SDH FPGA/ASIC Leadfree Processing WiMAX/WLAN Backplanes Server and Storage GPON

5 mm x 7 mm Ceramic Low Noise SMD VCXO, LVCMOS / LVPECL / LVDS I631 - Series ILSI America Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com 10/17/12_B Specifications subject to change without notice Page 2 SSB Phase Noise (typ.) Offset 77.76 MHz 155.52 MHz 622.08 MHz 10Hz 100Hz 1kHz 10kHz 100kHz -75 dBc/Hz -105 dBc/Hz -117 dBc/Hz -123 dBc/Hz -125 dBc/Hz -62 dBc/Hz -101 dBc/Hz -112 dBc/Hz -115 dBc/Hz -118 dBc/Hz -47 dBc/Hz -79 dBc/Hz -100 dBc/Hz -104 dBc/Hz -106 dBc/Hz Typical Application: Pb Free Solder Reflow Profile: *Units are backward compatible with 240C reflow processes Package Information: MSL = N.A. (package does not contain plastic, storage life is unlimited under normal room conditions). Termination = e4 (Au over Ni over W base metalization).

5 mm x 7 mm Ceramic Low Noise SMD VCXO, LVCMOS / LVPECL / LVDS I631 - Series ILSI America Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com 10/17/12_B Specifications subject to change without notice Page 3 Tape and Reel Information: Environmental Specifications Thermal Shock MIL-STD-883, Method 1011, Condition A Moisture Resistance MIL-STD-883, Method 1004 Mechanical Shock MIL-STD-883, Method 2002, Condition B Mechanical Vibration MIL-STD-883, Method 2007, Condition A Resistance to Soldering Heat J-STD-020C, Tabl e 5-2 Pb-free devices (except 2 cycles max) Hazardous Substance Pb-Free / RoHS / Green Compliant Solderability JESD22-B102-D Method 2 (Preconditioning E) Terminal Strength MIL-STD-883, Method 2004, Test Condition D Gross Leak MIL-STD-883, Method 1014, Condition C Fine Leak MIL-STD-883, Method 1014, Condition A2, R1=2x10-8 atm cc/s Solvent Resistance MIL-STD-202, Method 215 Marking Line 1: ILSI and Date Code (YWW) Line 2: Frequency Quantity per Reel 1000 A 16 +/-.3 B 8 +/-.2 C 7.5 +/-.2 D 17.5 +/-1 E 50 / 60 / 80 F 180 / 250