HSDL-3600

HSDL-3600 AVAGO | Alldatasheet

Document overview

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Technical content

Features

• Fully compliant to IrDA 1.1 physical layer specifications 9.6 kb/s to 4 Mb/s operation
• Typical link distance >1.5 m
• Compatible with HP-SIR and TV remote
• IEC825-Class 1 eye safe
• Low power operation: 2.7 V to 3.6 V
• Small module size: 4.0 x 12.2 x 5.1 mm (HxWxD)
• Complete shutdown: TXD, RXD, PIN diode
• Low shutdown current: 10 nA typical
• Adjustable optical power management: Adjustable LED drive-current to maintain link integrity
• Single Rx data output: Speed select by FIR select pin
• Integrated EMI shield: Excellent noise immunity
• Edge detection input: Prevents the LED from long turn- on time
• Interface to various super I/O and controller devices
• Designed to accommodate light loss with cosmetic window
• Only 2 external components are required

Applications

• Digital imaging – Digital still cameras – Photo-imaging printers
• Data communication – Notebook computers – Desktop PCs – Win CE handheld products – Personal Digital Assistants (PDAs) – Printers – Fax machines, photocopiers – Screen projectors – Auto PCs – Dongles – Set-top box
• Telecommunication products – Cellular phones – Pagers
• Small industrial & medical instrumentation – General data collection devices – Patient & pharmaceutical data collection devices
• IR LANs Functional Block Diagram TXD (9) MD0 (4) MD1 (5) RXD (8) FIR_SEL (3) GND (7) AGND (2) VCC (1) VCC SP HSDL-3600 CX1 CX2 LEDA (10)

Description

The HSDL-3600 is a low-profile infrared transceiver module that provides interface between logic and IR signals for through-air, serial, half-duplex IR data link. The module is compliant to IrDA Data Physical Layer Specifications 1.1 and IEC825-Class 1 Eye Safe. The HSDL-3600 contains a high-speed and high- efficiency 870 nm LED, a silicon PIN diode, and an integrated circuit. The IC contains an LED driver and a receiver providing a single output (RXD) for all data rates supported. HSDL-3600 #007/#008/#107 IrDA® Compliant 4 Mb/s 3 V Infrared Transceiver Data Sheet

Package Option Package Part Number Increment Front View HSDL-3600#007 400 Front View HSDL-3600#017 10 Top View HSDL-3600#008 400 Top View HSDL-3600#018 10 Front View (with guide pin) Front View (with guide pin) Application Support Information The Application Engineering group is available to assist you with the technical understanding associated with HSDL-3600 infrared transceiver module. You can contact them through your local sales representatives for additional details. The HSDL-3600 can be completely shut down to achieve very low power consumption. In the shut down mode, the PIN diode will be inactive and thus producing very little photo-current even under very bright ambient light. The HSDL–3600 also incorporated the capability for adjustable optical power. With two programming pins; MODE 0 and MODE 1, the optical power output can be adjusted lower when the nominal desired link distance is one-third or two-third of the full IrDA link. The HSDL-3600 comes in three package options; the front view option (HSDL-3600#007/#017), the front view guide pin option (HSDL-3600#107/#117), and the top view option (HSDL-3600#008/ #018). All options come with integrated shield that helps to ensure low EMI emission and high immunity to EMI field, thus enhancing reliable performance.

Ordering Information

HSDL-3600#107 300 HSDL-3600#117 10

I/O Pins Configuration Table Pin Description Symbol

1 Supply VoltageVcc

2 Analog GroundAGND

3 FIR Select FIR_SEL

4 Mode 0 MD0

5 Mode 1 MD1

6 No Connection NC

7 Ground GND

8 Receiver Data Output RXD

9 Transmitter Data Input TXD

10 LED Anode LEDA

Transceiver Control Truth Table Mode 0 Mode 1 FIR_SEL RX Function TX Function

10 X Shutdown Shutdown

00 0 SIR Full Distance Power 01 0 SIR 2/3 Distance Power 11 0 SIR 1/3 Distance Power 00 1 MIR/FIR Full Distance Power 01 1 MIR/FIR 2/3 Distance Power 11 1 MIR/FIR 1/3 Distance Power X = Don’t Care Transceiver I/O Truth Table Transceiver Inputs Outputs Mode FIR_SEL TXD EI LED RXD Active X 1 X On Not Valid Active 0 0 High [1] Off Low [3] Active 1 0 High [2] Off Low [3] Active X 0 Low Off High Shutdown X X [4] Low Not Valid Not Valid X= Don’t Care EI = In-Band Infrared Intensity at detector Notes: 1. In-Band EI ≤ 115.2 kb/s and FIR_SEL = 0. 2. In-Band EI ≥ 0.576 Mb/s and FIR_SEL = 1. 3. Logic Low is a pulsed response. The condition is maintained for duration dependent on the pattern and strength of the incide nt intensity. 4. To maintain low shutdown current, TXD needs to be driven high or low and not left floating. 87654321910 87654321910 BACK VIEW (HSDL-3600 #007/#017) BOTTOM VIEW (HSDL-3600 #008/#018) Functional Block Diagram TXD (9) MD0 (4) MD1 (5) RXD (8) FIR_SEL (3) GND (7) AGND (2) VCC (1) VCC SP HSDL-3600 CX1 CX2 LEDA (10)

Recommended Application Circuit Components Component Recommended Value R1 2.2 Ω ± 5%, 0.5 Watt, for 2.7 ≤ Vcc ≤ 3.3 V operation 2.7 Ω ± 5%, 0.5 Watt, for 3.0 ≤ Vcc ≤ 3.6 V operation CX1[5] 0.47 µF ± 20%, X7R Ceramic CX2[6] 6.8 µF ± 20%, Tantalum Notes: 5. CX1 must be placed within 0.7 cm of the HSDL-3600 to obtain optimum noise immunity. 6. In environments with noisy power supplies, supply rejection performance can be enhanced by including CX2, as shown in “HSDL-3600 Functional Block Diagram” in page 3. CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. ILED (A) 0.7 LEDA VOLTAGE (V) 0.3 1.7 2.1 0.1 1.3 2.3 0.5 1.5 1.9 0.6 0.4 0.2 LOP (mW/sr) 450 ILED (A) 200 0.3 0.6 00 . 7 350 0.1 0.4 400 300 100 250 150 0.2 0.5 ILED vs. LEDA. Light Output Power (LOP) vs. ILED. Marking Information The HSDL-3600#007/017 is marked “3600YYWW’ on the shield where “YY” indicates the unit’s manufacturing year, and “WW” refers to the work week in which the unit is tested. The HSDL-3600#008/018 is marked a “black” dot on the shield. Ma

Absolute Maximum Ratings [7] Parameter Symbol Minimum Maximum Unit Conditions Storage Temperature T S -40 +100 °C Operating Temperature T A -20 +70 °C DC LED Current I LED(DC) 165 mA Peak LED Current I LED (PK) 650 mA ≤ 90 µs pulse width, ≤ 25% duty cycle 750 mA ≤ 2 µs pulse width, ≤ 10% duty cycle LED Anode Voltage V LEDA -0.5 7 V Supply Voltage Vcc 0 7 V Transmitter Data I TXD(DC) -12 12 mA Input Current Receiver Data V O -0.5 Vcc+0.5 V |I O(RXD)| = 20 µA Output Voltage Note: 7. For implementations where case to ambient thermal resistance ≤ 50°C/W. Recommended Operating Conditions Parameter Symbol Min. Max. Unit Conditions Operating Temperature T A -20 +70 °C Supply Voltage Vcc 2.7 3.6 V Logic High Input Voltage V IH 2 Vcc/3 Vcc V for TXD, MD0, MD1, and FIR_SEL Logic Low Transmitter V IL 0 Vcc/3 V Input Voltage LED (Logic High) Current I LEDA 400 650 mA Pulse Amplitude Receiver Signal Rate 0.0024 4 Mb/s Ambient Light See IrDA Serial Infrared Physical Layer Link Specification, Appendix A for ambient levels

Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25 °C and 3.3 V unless otherwise noted. Parameter Symbol Min. Typ. Max. Unit Conditions Transceiver Supply Shutdown I CC1 10 200 nA V I(TXD) ≤ VIL or Current VI(TXD) ≥ VIH Idle I CC2 2.5 5 mA V I(TXD) ≤ VIL, EI = 0 Digital Input Logic I L/H -1 1 µA0 ≤ VI ≤ VCC Current Low/High Transmitter Transmitter Logic High IE H 100 250 400 mW/sr V IH = 3.0 V Radiant Intensity I LEDA = 400 mA Intensity θ1/2 ≤ 15° Peak λP 875 nm Wavelength Spectral ∆λ 1/2 35 nm Line Half Width Viewing 2 θ1/2 30 60 ° Angle Optical tpw (IE) 1.5 1.6 1.8 µs tpw(TXD) = 1.6 µs at Pulse Width 115.2 kb/s 148 217 260 ns tpw(TXD) = 217 ns at

1.15 Mb/s

115 125 135 ns tpw(TXD) = 125 ns at

4.0 Mb/s

Rise and Fall t r (IE), 40 ns tpw(TXD) = 125 ns at Times t f (IE) 4.0 Mb/s tr/f(TXD) = 10 ns Maximum tpw (max) 20 50 µs TXD pin stuck high Optical Pulse Width LED Anode V ON(LEDA) 2.4 V I LEDA = 400 mA, On State Voltage V I(TXD) ≥ VIH LED Anode I LK(LEDA) 1 100 nA V LEDA = VCC = 3.6 V, Off State Leakage Current V I(TXD) ≤ VIL

Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25 °C and 3.3 V unless otherwise noted. Parameter Symbol Min. Typ. Max. Unit Conditions Receiver Receiver Logic Low [9] VOL 0- 0 . 4 V I OL = 1.0 mA, Data Output EI ≥ 3.6 µW/cm2, Voltage θ1/2 ≤ 15° Logic High V OH Vcc – 0.2 - Vcc V I OH = -20 µA, EI ≤ 0.3 µW/cm2, θ1/2 ≤ 15° Viewing 2 θ1/2 30 ° Angle Logic High Receiver Input EI H 0.0036 500 mW/cm2 For in-band signals ≤ Irradiance 115.2 kb/s[8] 0.0090 500 mW/cm2 0.576 Mb/s ≤ in-band signals ≤ 4 Mb/s[8] Logic Low Receiver Input EI L 0.3 µW/cm2 For in-band signals[8] Irradiance Receiver Peak Sensitivity λP 880 nm Wavelength Receiver SIR Pulse Width tpw (SIR) 1 4.0 µs θ1/2 ≤ 15°[10], CL =10 pF Receiver MIR Pulse Width tpw (MIR) 100 500 ns θ1/2 ≤ 15°[11], CL =10 pF Receiver FIR Pulse Width tpw (FIR) 85 165 ns θ1/2 ≤ 15°[12], CL =10 pF, VCC = 3 - 3.6 V CL =10 pF, VCC = 2.7 V Receiver ASK Pulse Width tpw (ASK) 1 µs 500 kHz/50% duty cycle carrier ASK[13] Receiver Latency Time for FIR t L (FIR) 40 50 µs Receiver Latency Time for SIR t L (SIR) 20 50 µs Receiver Rise/Fall Times t r/f (RXD) 25 ns Receiver Wake Up Time t W 100 µs [14] Notes: 8. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification. 9. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident in tensity. 10. For in-band signals ≤ 115.2 kb/s where 3.6 µW/cm2 ≤ EI ≤ 500 mW/cm2. 11. For in-band signals at 1.15 Mb/s where 9.0 µW/cm2 ≤ EI ≤ 500 mW/cm2. 12. For in-band signals of 125 ns pulse width, 4 Mb/s, 4 PPM at recommended 400 mA drive current. 13. Pulse width specified is the pulse width of the second 500 kHz carrier pulse received in a data bit. The first 500 kHz carri er pulse may exceed 2 µs in width, which will not affect correct demodulation of the data stream. An ASK or DASK system using the HSDL-3600 has been sho wn to correctly receive all data bits for 9 µW/cm2 ≤ EI ≤ 500 mW/cm2 incoming signal strength. ASK or DASK should use the FIR channel enabled. 14. Wake up time is the time between the transition from a shutdown state to an active state and the time when the receiver is a ctive and ready to receive infrared signals. 15. Shields to be grounded.

TXD “Stuck ON” Protection RXD Output Waveform LED Optical Waveform Receiver Wake Up Time Definition (when MD0 π 1 and MD1 π 0) tpw (MAX.) TXD LED tf VOH 90% 50% 10%V OL tpw tr tf LED OFF 90% 50% 10% LED ON tpw tr RX LIGHT tw RXD VALID DATA

HSDL-3600#007 and HSDL3600#017 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3600#007/#017 (Front Option) PIN 1 MOUNTING CENTER 6.10 4.60 4.00 12.20 3.84 R 1.77R 2.00 4.05 4.95

10 CASTELLATION:

PITCH 1.1 ± 0.1 CUMULATIVE 9.90 ± 0.1 0.70 0.82 1.68 PIN 10 0.45 1.20 0.80 2.55 1.90 +0.50 3.24 1.90 5.09 MID OF LAND 1.05 2.40 2.35 2.84 2.08 0.70 0.43 PIN 10PIN 1 MOUNTING CENTER TOP VIEW FRONT VIEW LAND PATTERNBACK VIEW SIDE VIEW ALL DIMENSIONS IN MILLIMETERS (mm). DIMENSION TOLERANCE IS 0.20 mm UNLESS OTHERWISE SPECIFIED. PIN V CC AGND FIR_SEL MD0 MD1 PIN NC GND RXD TXD LEDA FUNCTION FUNCTION 1.15 PIN PIN

HSDL-3600#008 and HSDL3600#018 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3600#008/#018 (Top Option) PIN 1 PITCH 1.1 ± 0.1 CUM. OF 9 PITCH – 9.9 ± 0.1 0.70 PIN 10 0.43 BOTTOM VIEW 9.90 2.25 2.40 SIDE VIEW ALL DIMENSIONS IN MILLIMETERS (mm). DIMENSION TOLERANCE IS 0.20 mm UNLESS OTHERWISE SPECIFIED. 1.50 4.16 12.20 3.83 TRANSMIT RECEIVE 1.46 2.57 2.08 3.24 2.08 TOP VIEW 5.00 5.10 0.30 0.30 0.85 5.00 2.50 OC OCMC SHIELD PAD 1.70 1.95 1.30 10 x 0.60 PAD PIN 1 PIN 10 PITCH 9 x 1.10 0.20 1.60 5.70 2.85 LAND PAD PATTERN 4.40 0.90 4.89 1.35 R 1.78R 2.00 FRONT VIEW PIN V CC AGND FIR_SEL MD0 MD1 PIN NC GND RXD TXD LEDA FUNCTION FUNCTION LEGEND: MC – MOUNTING CENTER OC – OPTICAL CENTER

HSDL-3600#107 and HSDL-3600#117 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3600#107/#117 (Top Option) 4 ± 0.1 1.925 0.3 3.24 12.4 3.83 1.650.74 1.55 0.64 12.2 5.19 R 1.78R 2.0 4.71.2 0.9 0.3 4.950.7 ± 0.1 12345678910 0.425 10-R 0.25 ± 0.1 0.3 0.8 1.1 1.4 1.9 2.4 4.05 1.0 90° ± 0 2-R 0.5 3.0 0.5 2.65

1 VDD

2 AGND

3 FIREN

4 MD0

5 MD1

6 N.C.

7 GND

8 RXD

9 TXD

10 LEDA

TOLERANCE ± 0.2 MIN. UNIT = mm

Tape and Reel Dimensions (HSDL-3600#007, #017) All dimensions in millimeters (mm) Quantity = 400 pieces per reel (HSDL-3600#007) Quantity = 10 pieces per tape (HSDL-3600#017) 25.50 + 0.50 - 1.00 178.00 ± 2.00 60.00 ± 2.00 R 1.00 2.00 ± 0.50 1.60 ± 0.50 LABEL 5.50 ± 0.10 12.40 ± 0.10 8.00 ± 0.10 4.00 ± 0.10 24.00 ± 0.20 1.75 ± 0.10 1.50 + 0.10 0.40 ± 0.05 4.20 ± 0.10 POLARITY A VDD EMPTY PARTS MOUNTED LEADER EMPTY (400 mm MIN.) (40 mm MIN.) DIRECTION OF PULLING TAPE DIMENSIONS (40 mm MIN.) CONFIGURATION OF TAPE 13.00 ± 0.50 SHAPE AND DIMENSIONS OF REELS 2.00 ± 0.10 11.50 ± 0.10 DIRECTION OF PULLING 21.00 ± 0.80

Tape and Reel Dimensions (HSDL-3600#008, #018) All dimensions in millimeters (mm) Quantity = 400 pieces per reel (HSDL-3600#008) Quantity = 10 pieces per tape (HSDL-3600#018) 25.50 + 0.50 - 1.00 178.00 ± 2.00 60.00 ± 2.00 R 1.00 2.00 ± 0.50 1.60 ± 0.50 LABEL 4.80 ± 0.10 12.80 ± 0.10 8.00 ± 0.10 4.00 ± 0.10 24.00 ± 0.20 1.75 ± 0.10 1.50 + 0.10 0.40 ± 0.05 5.10 ± 0.10 POLARITY VDD EMPTY PARTS MOUNTED LEADER EMPTY (400 mm MIN.) (40 mm MIN.) DIRECTION OF PULLING TAPE DIMENSIONS (40 mm MIN.) CONFIGURATION OF TAPE 13.00 ± 0.50 SHAPE AND DIMENSIONS OF REELS 2.00 ± 0.10 11.50 ± 0.10 DIRECTION OF PULLING A 5.30 ± 0.10 21.00 ± 0.80 5.65 ± 0.10

Tape and Reel Dimensions (HSDL-3600#107, #117) All dimensions in millimeters (mm) Quantity = 300 pieces per reel (HSDL-3600#107) Quantity = 10 pieces per tape (HSDL-3600#117) LABEL PASTED HERE SHAPE AND DIMENSIONS OF REEL 1.6 ± 0.5 EMPTY PARTS MOUNTED LEADER EMPTY (400 mm MIN.) (40 mm MIN.)DIRECTION OF PULLING OUT (40 mm MIN.) CONFIGURATION OF TAPE 25.5 + 1.0 – 0.5 2.0 ± 0.5 R 1.0 13.0 ± 0.5 21.0 ± 0.8 0.4 ± 0.05 4.3 ± 0.1 12.7 ± 0.10 4.0 ± 0.1 POLARITY VDD 0.7 ± 0.1 A 24.0 ± 0.2 1.75 ± 0.1 11.5 ± 0.1 φ 1.5 + 0.1 – 0 DIMENSIONS OF TAPE DIRECTION OF PULLING OUT N = 300 PCS

If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Moisture Proof Packaging All HSDL-3600 options are shipped in moisture proof package. Once opened, moisture absorption begins. Package Temperature Time In Reel 60 °C ≥ 48 hours In Bulk 100 °C ≥ 4 hours 125°C ≥ 2 hours Baking should only be done once. UNITS IN A SEALED MOISTURE-PROOF PACKAGE PACKAGE IS OPENED (UNSEALED) ENVIRONMENT LESS THAN 25°C, AND LESS THAN 60% RH? PACKAGE IS OPENED MORE THAN 3 DAYS? PERFORM RECOMMENDED BAKING CONDITIONS NO BAKING IS NECESSARY YES NO YES NO

Heat Up P1, R1 25 °C to 125°C4 °C/s Solder Paste Dry P2, R2 125 °C to 170°C 0.5°C/s P3, R3 170 °C to 230°C4 °C/s Solder Reflow (245 °C at 10 seconds max.) P3, R4 230 °C to 170°C- 4 °C/s Cool Down P4, R5 170 °C to 25°C- 3 °C/s The reflow profile is a straight- line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different ∆T/∆time temperature change rates. The ∆T/∆time rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3600 castellation I/O pins are heated to a temperature of 125°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL-3600 castellation I/O pins. Process zone P2 should be of sufficient time duration (> 60 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 170°C (338°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 230°C (446°F) for optimum results. The dwell time above the liquidus point of solder should be between 15 and 90 seconds. It usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 90 seconds, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170°C (338°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed -3°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3600 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL-3600 transceiver. t-TIME (SECONDS) T – TEMPERATURE – (°C) 200 170 125 100 50 150 100 200 250 300 150 183 230 HEAT UP SOLDER PASTE DRY SOLDER REFLOW COOL DOWN R3 R4 90 sec. MAX. ABOVE 183°C MAX. 245°C Reflow Profile

Appendix A: Test Method A1. Background Light and Electromagnetic Field There are four ambient interference conditions in which the receiver is to operate correctly. The conditions are to be applied separately: 1. Electromagnetic field:

3 V/m maximum (please refer to

IEC 801-3, severity level 3 for details). 2. Sunlight: 10 kilolux maximum at the optical port. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased to provide 490 µW/cm 2 (with no modulation) at the optical port. The light source faces the optical port. This simulates sunlight within the IrDA spectral range. The effect of longer wavelength radiation is covered by the incandescent condition. 3. Incandescent Lighting: 1000 lux maximum. This is produced with general service, tungsten-filament, gas-filled, inside frosted lamps in the 60 Watt to 100 Watt range to generate 1000 lux over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The source is expected to have a filament temperature in the 2700 to 3050 Kelvin range and a spectral peak in the 850 to 1050 nm range. 4. Fluorescent Lighting: 1000 lux maximum. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave signal (0 µW/cm 2 minimum and 0.3 µW/cm2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The frequency of the optical signal is swept over the frequency range from 20 kHz to 200 kHz. Due to the variety of fluorescent lamps and the range of IR emissions, this condition is not expected to cover all circumstances. It will provide a common floor for IrDA operation. All Avago IR transceivers operating under the recommended drive conditions are classified as CENELEC EN60825-1 Accessible Emission Limit (AEL) Class 1. This standard is in effect in Europe as of January 1, 1997. AEL Class 1 LED devices are considered eye safe. Please see Application Note 1094 for more information.

Figure 1.0. Stencil and PCBA.

1.1 Recommended Land Pattern for HSDL-3600#007/#017

Dim. mm Inches a 2.40 0.095 b 0.70 0.028 c (pitch) 1.10 0.043 d 2.35 0.093 e 2.80 0.110 f 3.13 0.123 g 4.31 0.170 Figure 2.0. Top view of land pattern. Appendix B : HSDL-3600#007/#017 SMT Assembly Application Note

1.0 Solder Pad, Mask and Metal Solder Stencil Aperture

a b f theta 10x PAD Y d e g Rx LENSTx LENS FIDUCIAL X c FIDUCIAL

1.2 Adjacent Land Keep-out and

Dim. mm Inches h min. 0.2 min. 0.008 j 13.4 0.528 k4 . 7 0.185 l3 . 2 0.126

• Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area.
• “ h” is the minimum solder resist strip width required to avoid solder bridging adjacent pads.
• It is recommended that 2 fiducial cross be placed at mid-length of the pads for unit alignment. Figure 3.0. HSDL-3600#007/#017 PCBA – adjacent land keep-out and solder mask. Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended.

2.0 Recommended Solder Paste/

Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.30 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume). h l Rx LENSTx LENS j SOLDER MASK LAND k Y

2.1 Recommended Metal Solder

It is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used: See Fig 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches w, the width of aperture is fixed at 0.70 mm (0.028 inches) Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimensions

3.0 Pick and Place Misalignment

Tolerance and Product Self- Alignment after Solder Reflow If the printed solder paste volume is adequate, the unit will self-align in the X-direction after solder reflow. Units should be properly reflowed in IR Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter. Allowable Misalignment Tolerance X – direction ≤ 0.2 mm (0.008 inches) Theta – direction +/- 2 degrees APERTURE AS PER LAND DIMENSIONS SOLDER PASTE l w t (STENCIL THICKNESS) Figure 4.0 Solder paste stencil aperture.

3.2 Tolerance for Rotational (Theta)

Units when mounted should not be rotated more than ± 2 degrees with reference to center X-Y as specified in Fig 2.0. Pictures 3.0 and 4.0 show units before and after reflow. Units with a Theta misalignment of more than 2 degrees do not completely self align after reflow. Units with ± 2 degree rotational or Theta misalignment self-aligned completely after solder reflow.

3.1 Tolerance for X-axis Alignment

Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during placement of the unit. The castellations will completely self- align to the pads during solder reflow as seen in the pictures below.

3.3 Y-axis Misalignment of

In the Y-direction, the unit does not self-align after solder reflow. It is recommended that the unit be placed in line with the fiducial mark (mid-length of land pad.) This will enable sufficient land length (minimum of 1/2 land length.) to form a good joint. See Fig 5.0. Figure 5.0. Section of a castellation in Y-axis.

3.4 Example of Good HSDL-3600

#007/#017 Castellation Solder Joints Photo 5.0. Good solder joint. This joint is formed when the printed solder paste volume is adequate, i.e., 0.30 cubic mm and reflowed properly. It should be reflowed in IR Hot-air convection reflow oven. Direction of board travel does not matter. MINIMUM 1/2 THE LENGTH OF THE LAND PAD LENS EDGE FIDUCIAL Y 0.8 1.2 0.70 0.425 0.20 0.70.4

4.0 Solder Volume Evaluation and Calculation

Geometry of an HSDL-3600#007/#017 solder fillet.

Appendix C: HSDL-3600#008/#018 SMT Assembly Application Note Figure 1.0. Stencil and PCBA.

1.1 Recommended Land Pattern for HSDL-3600#008/#018

Dim. mm Inches a 1.95 0.077 b 0.60 0.024 c (pitch) 1.10 0.043 d 1.60 0.063 e 5.70 0.224 f 3.80 0.150 g 2.40 0.094 h 0.80 0.032 METAL STENCIL FOR SOLDER PASTE PRINTING LAND PATTERN PCBA STENCIL APERTURE SOLDER MASK SHIELD SOLDER PAD a b theta 10x PAD Y d e g Tx LENSRx LENS FIDUCIAL X c FIDUCIAL h f Figure 2.0. Top view of land pattern.

Dim. mm Inches h min. 0.2 min. 0.008 j 13.4 0.528 k 5.8 0.228 l 3.5 0.130

• Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area.
• “ h” is the minimum solder resist strip width required to avoid solder bridging adjacent pads.
• It is recommended that 2 fiducial cross be placed at mid- length of the pads for unit alignment.

Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.28 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume). Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended. h l Tx LENSRx LENS j SOLDER MASK LAND k Y Figure 3.0. HSDL-3600#008/#018 PCBA – Adjacent land keep-out and solder mask.

It is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used: Figure 4.0. Solder paste stencil aperture. Allowable Misalignment Tolerance X – direction ≤ 0.2 mm (0.008 inches) Tolerance and Product Self- Alignment after Solder Reflow If the printed solder paste volume is adequate, the unit will self- align in X-direction after solder reflow. Units should be properly reflowed in IR Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter. APERTURE AS PER LAND DIMENSIONS SOLDER PASTE l w t (STENCIL THICKNESS) See Fig 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches w, the width of aperture is fixed at 0.60 mm (0.024 inches) Aperture opening for shield pad is 5.7 mm x 1.6 mm as per land dimensions

Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during placement of the unit. The castellations will completely self- align to the pads during solder reflow as seen in the pictures below. Photo 1.0. Castellation mis-aligned to land pads in X-axis before reflow. Units when mounted should not be rotated more than ± 1 degrees with reference to center X-Y as specified in Fig. 2.0. Photos 3.0 and 4.0 show that unit cannot be self-aligned back due to the small wetting force. Units with a Theta misalignment of more than 1 degree do not completely self align after reflow. Castellation ß ß Solder Photo 2.0. Castellation self-aligned to land pads after reflow.

In the Y-direction, the unit does not self align after solder reflow. It is recommended that the unit be placed in line with the fiducial mark. This will enable sufficient land length to form a good joint. See Fig. 5.0.

3.4 Example of Good Castellation Solder Joints

Photo 7.0. Good solder joint after reflow. This joint is formed when the printed solder paste volume is adequate, i.e. 0.30 cubic mm and reflowed properly. It should be Photo 6.0. Good attachment before reflow. reflowed in IR Hot-air convection reflow oven. Direction of board travel does not matter. Figure 5.0. Section of a castellation in Y-axis. Tx LENS EDGE FIDUCIAL Y Rx LENS

Geometry of an HSDL-3600#008/#018 solder fillet. Vpaste = Vsolder/0.6 = 0.277 mm3 0.8 1.15 0.6 0.6 0.1 0.46

wide voltage operating range infrared transceiver is a low-cost and small form factor that is designed to address the mobile computing market such as notebooks, printers and LAN access as well as small embedded mobile products such as digital cameras, cellular phones, and PDAs. It is fully compliant to IrDA 1.1 specification up to

4 Mb/s, and supports HP-SIR,

Sharp ASK, and TV Remote modes. The design of the HSDL- 3600 also includes the following unique features:

• Low passive component count.
• Adjustable Optical Power Management (full, 2/3, 1/3 power).
• Shutdown mode for low power consumption requirement.
• Single-receive output for all data rates. Adjustable Optical Power Management The HSDL-3600 transmitter offers user- adjustable optical power levels. The use of two logic-level mode- select input pins, MODE 0 and MODE 1, offers shutdown mode as well as three transmit power levels as shown in the Table below. The power levels are setup to correspond nominally to maximum, two-third, and one- third of the transmission distance. This unique feature allows lower optical power to be transmitted at shorter link distances to reduce power consumption. There are 2 basic means to adjust the optical power of the HSDL-3600: Dynamic: This implementation enables the transceiver pair to adjust their transmitter power according to the link distance. However, this requires the IrDA protocol stack (mainly the IrLAP layer) to be modified. Please contact Hewlett Packard Application group for further details. Static: Pre-program the ROM BIOS of the system (e.g. notebook PC, digital camera, cell phones, or PDA) to allow the end user to select the desired optical power during the system setup stage. Selection of Resistor R1 Resistor R1 should be selected to provide the appropriate peak pulse LED current over different ranges of Vcc. The recommended R1 for the voltage range of 2.7 V to 3.3 V is 2.2 Ω while for 3.0 V to 3.6 V is 2.7 Ω . The HSDL-3600 typically provides 250 mW/sr of intensity at the recommended minimum peak pulse LED current of 400 mA. Interface to Recommended I/O Chips The HSDL-3600’s TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required. Data rate from 9.6 kb/s up to 4 Mb/s is available at the RXD pin. The FIR_SEL pin selects the data rate that is receivable through RXD. Data rates up to 115.2 kb/s can be received if FIR_SEL is set to logic low. Data rates up to 4 Mb/s can be received if FIR_SEL is set to logic high. Software driver is necessary to program the FIR_SEL to low or high at a given data rate.

4 Mb/s IR link distance of

greater than 1.5 meters have been demonstrated using typical HSDL-3600 units with National Semiconductor’s PC87109 3 V Endec and Super I/Os, and the SMC Super I/O chips. MODE MODE 1 Transmitter

10 Shutdown

00 Full Power

Appendix D: General Application Guide for the HSDL-3600 Infrared IrDA® Compliant 4 Mb/s Transceiver

(A) National Semiconductor Super I/O and Infrared Controller For National Semiconductor Super I/O and Infrared Controller chips, IR link can be realized with the following connections:

• Connect IRTX of the National Super I/O or IR Controller to TXD (pin 9) of the HSDL-3600.
• Connect IRRX1 of the National Super I/O or IR Controller to RXD (pin 8) of the HSDL-3600.
• Connect IRSL0 of the National Super I/O or IR Controller to FIR_SEL (pin 3) of the HSDL-3600. Please refer to the table below for the IR pin assignments for the National Super I/O and IR Controllers that support IrDA 1.1 up to 4 Mb/s: IRTX IRRX1 IRSL0 PC97/87338VJG 63 65 66 PC87308VUL 81 80 79 PC87108AVHG 39 38 37 PC87109VBE 15 16 14 Please refer to the National Semiconductor data sheets and application notes for updated information. Functional Block Diagram TXD (9) MD0 (4) MD1 (5) RXD (8) FIR_SEL (3) GND (7) AGND (2) VCC (1) LEDA (10) VCC SP HSDL-3600 CX1 CX2 NATIONAL SEMICONDUCTOR SUPER I/O OR IR CONTROLLER IRTX IRRX1 IRSL0 * MODE GROUND FOR FULL POWER OPERATION

(B) HSDL-3600 Interoperability with National Semiconductor PC97338VJG SIO Evaluation Report Introduction The objective of this report is to demonstrate the interoperability of the HSDL-3600 IR transceiver IR module as wireless communication ports at the speed of 2.4 kb/s - 4 Mb/s with NS’s PC97338VJG Super I/O under typical operating conditions. Test Procedures 1. Two PC97338VJG evaluation boards were connected to the ISA Bus of two PCs (Pentium

200 MHz) running Microsoft’s

DOS operating system. One system with an HSDL-3600 IR transceiver connected to the PC97338VJG evaluation board will act as the master device. Another system with an HSDL-3600 IR transceiver connected to the PC97338VJG will act as the slave device (i.e. Device Under Test). 2. The test software used in this interoperability test is provided by National Semiconductor. A file size of 1.7M byte from the master device, with the PC97338VJG performing the framing, encoding is transmitted to the slave device. The slave device, with the PC97338VJG performing the decoding, and CRC checksum, will receive the file. The file is then checked for error by comparing the received file with the original file using the DOS “fc” command. 3. The link distance is measured by adjusting the distance between the master and slave for errorless data communications. Functional Block Diagram TXD (9) MD0 (4) MD1 (5) RXD (8) FIR_SEL (3) GND (7) AGND (2) VCC (1) LEDA (10) VCC SP HSDL-3600 CX1 CX2 NATIONAL SEMICONDUCTOR PC97338VJG SUPER I/O IRTX (63) IRRX1 (65) IRSL0 (66) * MODE GROUND FOR FULL POWER OPERATION A0 - A3 RD, WR, CS D0 - D7 DRQ DACK, TC IRQ SYSTEM BUS

14.314 MHz

HSDL-3600 Interoperability with NS PC97338 Report (i) Test Conditions Vcc = 3.0 – 3.6 V RLED = 2.7 Ω Optical transmitter pulse width = 125 ns Mode set to full power (ii) Test Result The interoperability test results show that HSDL-3600 IR transceiver can operate ≥ 1.5 meter link distance from 3 V to 3.6 V with NS’s PC97338 at any IrDA 1.1 data rate without error. (C) Standard Micro System Corporation (SMC) Super and Ultra I/O Controllers For SMC Super and Ultra I/O Controller chips, IR link can be realized with the following connections:

• Connect IRTX of the SMC Super or Ultra I/O Controller to TXD (pin 9) of the HSDL- 3600.
• Connect IRRX of the SMC Super or Ultra I/O Controller to RXD (pin 8) of the HSDL- 3600.
• Connect IRMODE of the Super or Ultra I/O Controller to FIR_SEL (pin 3) of the HSDL- 3600. Please refer to the table below for the IR pin assignments for the SMC Super or Ultra I/O Controllers that support IrDA 1.1 up to 4Mb/s: HSDL-3600 Interoperability with SMC 669/769 Report (i) Test Conditions Vcc = 3.0 – 3.6 V RLED = 2.7 Ω Optical transmitter pulse width = 125 ns Mode set to full power (ii) Test Result The interoperability test results show that HSDL-3600 IR transceiver can operate ≥1.5 meter link distance from 3 V to 3.6 V with SMC 669/769 at any IrDA 1.1 data rate without error. IRTX IRRX IRMODE FDC37C669FR 89 88 23 FDC37N769 87 86 21 FDC37C957/8FR 204 203 145 or 190

HSDL-3600 Interoperability with SMC’s Super I/O or IR Controller TXD (9) MD0 MD1 RXD (8) FIR_SEL (3) GND (7) AGND (2) VCC (1) LEDA (10) VCC SP HSDL-3600 CX1 CX2 4 5 STANDARD MICROSYSTEM CORPORATION SUPER I/O OR IR CONTROLLER IRRX IRMODE IRTX MODE GROUND FOR FULL POWER OPERATION

For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved. Obsoletes 5980-0460E 5988-2311EN April 20, 2006