HSDL-3200-021

HSDL-3200-021 LITEON | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 14

Technical content

Features

• Fully compliant to IrDA data 1.4 low power specifications
• Ultra small package
• Minimal height: 2.5 mm
• 2.7 to 3.6 V CC
• Low shutdown current – 10 nA Typical
• Complete shutdown – TXD, RXD, PIN diode
• Three external components
• Temperature performance guaranteed, –25° C to +85°C
• 25 mA LED drive current
• Integrated EMI shield
• IEC825-1 Class 1 eye safe
• Edge detection input – Prevents the LED from long turn-on time
• Lead-free and RoHS compliant

Applications

• Mobile telecom – Cellular phones – Pagers – Smart phones
• Data communication – PDAs – Portable printers
• Digital imaging – Digital cameras – Photo-imaging printers
• Electronic wallet

Description

The HSDL-3200 is a new generation of low-cost Infrared (IR) transceiver module from Lite-On Technology. It features the smallest footprint in the industry at 2.5 H x 8.0 W x 3.0 D mm. The supply voltage can range from 2.7 V to 3.6 V. The LED drive current of 25 mA assures that link distances meet the IrDA Data 1.4 (low power) physical layer specification. The HSDL-3200 meets the link distance of 20 cm to other low power devices, and 30 cm to standard 1 meter IrDA devices. 47 Ω VCC TXD 7 LED DRIVER RXD 6 SHUT DOWN 5 RIX PULSE SHAPER TXD

8 LEDA

4 AGND

1 GND

6.8 µF C2 100 nF SHIELD HSDL-3200#021 Pinout 87654321 HSDL-3200-028 Pinout 87654321 HSDL-3200 IrDA® Data 1.4 Compliant

115.2 Kb/s Infrared Transceiver

Recommended Application Circuit Components Component Recommended Value Note R1 47 Ω , ± 1%, 0.125 Watt C1 6.8 µF, ± 20%, Tantalum 4 C2 100 nF, ± 20%, X7R Ceramic Note: 4. C1 must be placed within 0.7 cm of the HSDL-3200 to obtain optimum noise immunity. I/O Pins Configuration Table Pin Description Symbol Active Note

1 Ground GND

2 Pin Bypass Capacitor CX

3 Supply Voltage V CC

4 Analog Ground AGND

5 Shut Down SD High 1

6 Receiver Data Output RXD Low

7 Transmitter Data Input TXD High

8 LED Anode LEDA

Note: 1. The shutdown pin (SD) must be driven either high or low. Do NOT float the pin. Caution: The BiCMOS inherent to this design of this component increases the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

Ordering Information

The ordering information is as shown in the table below. There are two options available. Front Option #021 Taped and 13” Reel packaging, 2500 per reel Top Option –028 Taped and 13” Reel Packaging, 2500 per reel Transceiver I/O Truth Table Inputs Outputs TXD Light Input to Receiver SD LED RXD Notes High Don’t Care Low On Not Valid Low High Low Off Low 2, 3 Low Low Low Off High Don’t Care Don’t Care High Off High Notes: 2. In-Band IrDA signals and data rates ≤115.2 Kb/s. 3. RXD Logic Low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incid ent intensity.

For implementations where case to ambient thermal resistance ≤ 50°C/W. Parameter Symbol Min. Max. Units Conditions Storage Temperature T S –40 100 °C Operating Temperature T A –25 85 °C DC LED Current I LED (DC) 20 mA Peak LED Current I LED (PK) 80 mA ≤ 90 µs Pulse Width, ≤25% Duty Cycle LED Anode Voltage V LEDA –0.5 7 V Supply Voltage V CC 07 V Input Voltage TXD, SD V I 0V CC +0.5 V Output Voltage RXD V O –0.5 V CC +0.5 V Recommended Operating Conditions Parameter Symbol Min. Max. Units Conditions Notes Operating Temperature T A –25 85 °C Supply Voltage V CC 2.7 3.6 V Logic High Voltage V IH 2/3 VCC VCC V TXD, SD Logic Low Voltage V IL 0 1/3 V CC V TXD, SD Logic High Receiver EI H 0.0081 500 mW/cm 2 For in-band signals. 5 Input Irradiance Logic Low Receiver EI L 0.3 µW/cm2 For in-band signals. 5 Input Irradiance LED Current Pulse I LEDA 25 80 mA Guaranteed at 25 °C Amplitude Receiver Signal Rate 2.4 115.2 Kb/s Ambient Light See “Test Methods” on page 12 for details Note: 5. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 nm ≤ lp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification.

Electrical and Optical Specifications Specifications hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25 °C and 3.0 V unless otherwise noted. Parameter Symbol Min. Typ. Max. Units Conditions Note Receiver RXD Logic Low V OL 0 0.4 V I OL = 200 µA, For in-band EI 6 Output Voltage Logic High V OH VCC VCC VI OH = –200 µA, For in-band –0.2 EI ≤0.3 µW/cm2 Viewing Angle 2 f1/2 30 ° Peak Sensitivity Wavelength lp 880 nm RXD Pulse Width tpw 1.5 2.5 4.0 µs6 RXD Rise and Fall Times tr, tf 25 100 ns tpw (EI) = 1.6 µs, CL = 10 pF Receiver Latency Time t L 25 50 µs6 Receiver Wake Up Time t W 50 100 µs7 Transmitter Radiant Intensity EI H 4 8 28.8 mW/Sr I LEDA = 25 mA, TA = 25°C, q1/2 ≤15° Peak Wavelength lp 875 nm Spectral Line Half Width Dl1/2 35 nm Viewing Angle 2 q1/2 30 60 ° Optical Pulse Width tpw 1.5 1.6 2 µs tpw (TXD) = 1.6 µs Optical Rise and Fall Times tr (EI) 600 ns tpw (TXD) = 1.6 µs tf (EI) Maximum Optical tpw 20 50 µs TXD pin stuck high Pulse Width (max) LED Anode On State V ON 1.6 V I LEDA = 25 mA, Voltage (LEDA) V IH (TXD) = 2.7 V LED Anode Off State I LK 0.01 1.0 µAV LEDA = VCC = 3.6 V, Leakage (LEDA) V I (TXD) ≤ 1/3 VCC Transceiver TXD and SD Logic Low I L –1 –0.01 1 µA0 ≤ VI ≤ 1/3 VCC Input Current Logic High I H 0.01 1 µAV I ≥ 2/3 VCC Supply Current Shutdown I CC1 10 200 nA V CC = 3.6 V, VSD ≥ VCC –0.5 Idle I CC2 2.5 4 mA V CC = 3.6 V, VI (TXD) ≤ 1/3 VCC, EI = 0 Active I CC3 2.6 5 mA V CC = 3.6 V, 8, 9 Receiver V I (TXD) ≤ 1/3 VCC Notes: 6. For in-band signals ≤ 115.2 Kb/s where 8.1 µW/cm2 ≤ EI ≤ 500 mW/cm2. 7. Wake up time is measured from SD pin high to low transition or V CC power on to valid RXD output. 8. Typical value is at EI = 10 mW/cm 2. 9. Maximum value is at EI = 500 mW/cm 2.

HDSL-3200#021 Package Dimensions HSDL-3200#021 Tape and Reel Dimensions 16.4+ 2 21 ± 0.8 UNIT: mm A B R1.0 ∅ 13.0 ± 0.5 2.0 ± 0.5 2 ± 0.5 LABEL /;/;/;/; /;/;/; 3.4 ± 0.1 8.4 ± 0.1 8 ± 0.1 4 ± 0.1 1.5 ± 0.1 7.5 ± 0.1 16.0 ± 0.2 1.75 ± 0.1 ∅ 1.5+ 0.1 0.4 ± 0.05 2.8 ± 0.1 POLARITY PIN 8: LEDA PIN 1: GND OPTION # DIMENSION A (± 1 mm) DIMENSION B (± 2 mm) QUANTITY (POS/REEL) 0S1 0L1 178 330 500 2500 EMPTY PARTS MOUNTED LEADER EMPTY (40 mm MIN.) (400 mm MIN.) (40 mm MIN.) PROGRESSIVE DIRECTION TAPE DIMENSIONS /;/; 0.6 1.25 1.425 2.85 1.35 1.75 0.775 0.475 1.425 2.375 3.325 CL MOUNTING CENTER EXTERNAL GROUND MOUNTING CENTER 4 1.025 SOLDERING PATTERN UNIT: mm TOLERANCE: ± 0.2mm CL 2.5 2.05 2.55 EMITTERRECEIVER 0.35 0.65 0.80 CL 3.325 P0.95X7 = 6.65 0.6 87654321

1 GND 5 SD

2 CX 6 RXD

3 VCC 7 TXD

4 AGND 8 LEDA

2.93 1.85 /;/; /;/; 1.05 1.25 1.175 2.2

5.1 7.5 2.8 3.325 0.95 x 7 = 6.65 ± 0.15 0.6 ± 0.15 0 ± 0.05 (MAX.) +0.05 -0.2 1.8+0.05 -0.2 3.6 1.55 2.35 CL UNIT: mm TOLERANCE: ± 0.2 mm COPLANARITY = 0.1 mm MAX. 0.4 ± 0.15 0.95 ± 0.1 0.7 ± 0.1 2.8 3.35 1.55 0.3

HSDL-3200-028 Tape and Reel Dimensions Bo Po W E 1.5 Ko Do F P2D1 B B 5°(MAX.) /;/;/; 5°(MAX.) Ao AA A-A SECTION B-B SECTION SYMBOL Ao Bo Ko Po P1 P2 T SYMBOL E F Do D1 W 10Po UNIT: mm 5° 3.1 ± 0.1 /;/; /;/; /;/; 2.6 +0.05 - 0.10 16.0+0.5 ∅ 13.1 DETAIL A (5/1) +0.5 120° 60°TYP. ∅ 99.5 ± 1 ∅ 330 ± 1 ∅ 264 NOTES: 1. 10 SPROKET HOLE PITCH CUMULATIVE TOLERANCE IS ± 0.2 mm. 2. CARRIER CAMBER SHALL NOT BE MORE THAN 1 mm PER 100 mm THROUGH A LENGTH OF 250 mm. 3. Ao AND Bo MEASURED ON A PLACE 0.3 mm ABOVE THE BOTTOM OF THE PACKET. 4. Ko MEASURED FROM A PLACE ON THE INSIDE BOTTOM OF THE POCKET TO TOP SURFACE OF CARRIER. 5. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE. PS T

IR Transceiver Reflow Profile: Lead-free The reflow profile is a straight- line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different DT/Dtime temperature change rates. The DT/Dtime rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3200 castellation I/O pins are heated to a temperature of 160°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL- 3200 castellation I/O pins. Process zone P2 should be of sufficient time duration (60 to 120 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 200°C (392°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 255°C (491°F) for optimum results. The dwell time above the liquidus point of solder should be between 20 and 60 seconds. It usually takes about 20 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 60 seconds, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 200°C (392°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 6°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3200 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL- 3200 transceiver. Process Zone Symbol DT Maximum DT/Dtime Heat Up P1, R1 25 °C to 160°C4 °C/s Solder Paste Dry P2, R2 160 °C to 200°C 0.5 °C/s Solder Reflow P3, R3 200 °C to 255°C (260°C at 10 seconds max.) 4 °C/s P3, R4 255 °C to 200°C- 6 °C/s Cool Down P4, R5 200 °C to 25°C- 6 °C/s t-TIME (SECONDS) T – TEMPERATURE – (°C) 230 200 160 120 50 150 100 200 250 300 180 220 255 HEAT UP SOLDER PASTE DRY SOLDER REFLOW COOL DOWN R3 R4 60 sec. MAX. ABOVE 220°C MAX. 260°C

The HSDL-3200 is shipped in moisture proof packaging. Once opened, moisture absorption begins. Solder Pad, Mask and Metal Stencil HSDL-3200#021 Recommended Land Pattern (Front Option) METAL STENCIL FOR SOLDER PASTE PRINTING LAND PATTERN PCB STENCIL APERTURE SOLDER MASK SHIELD SOLDER PAD a b Y f d e g Rx LENSTx LENS theta FIDUCIAL X c8x PAD FIDUCIAL DIMENSION mm INCHES a b c (PITCH) d e f g 1.75 0.60 0.95 1.25 2.70 2.20 2.28 0.069 0.024 0.037 0.049 0.106 0.087 0.089 HSDL-3200-028 Recommended Land Pattern (Top Options) 0.60 0.9 /;/; /;/; 2.20 3.625 MOUNTING CENTER 0.575 1.60 /;/; /;/; /;/; /;/; /;/; /;/; /;/; /;/; /;/; /;/; /;/; /;/; /;/; /;/; PITCH 7 x 0.95 /;/;/; /;/; /;/; /;/; 1.275 1.45 Baking should only be done once. In Reels 60 °C, t ≥ 48 hours 100°C, t ≥ 4 hours In Bulk 125 °C, T ≥ 2 hours 150°C, T ≥ 1 hour Time from Unsealing to Soldering After removal from the bag, the parts should be soldered within three days if stored at the recommended storage conditions. Baking If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Recommended Storage Conditions Storage Temperature 10 °C to 30°C Relative Humidity Below 60%

It is recommended that only 0.127 mm (0.005 inches) or 0.11 mm (0.004 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used: w, the width of aperture is fixed at 0.55 mm (0.022 inches). Aperture opening for shield pad is as per land pattern. Adjacent Land Keepout and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. “h” is the minimum solder resist strip width required to avoid solder bridging adjacent pads. It is recommended that two fiducial crosses be placed at mid-length of the pads for unit alignment. Note: Wet/Liquid Photo- Imageable solder resist/mask is recommended. Recommended Solder Paste/ Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.22 cubic mm (based on either no-clean or aqueous solder cream types with typically 60% to 65% solid content by volume). Using the recommended stencil will result in this volume of solder paste. t, nominal stencil thickness l, length of aperture mm inches mm inches h Y X m k j DIMENSION mm INCHES h k j m MIN. 0.2 8.2 2.6 3.0 MIN. 0.008 0.323 0.102 0.118 APERTURES AS PER LAND DIMENSIONS l w t

Pick and Place Misalignment Tolerance and Self-Alignment after Solder Reflow If the printed solder paste volume is adequate, the HSDL- 3200 will self-align after solder reflow. Units should be properly reflowed in IR/Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter. Tolerance for X-Axis Alignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm (0.008 in.), or about one half the width of the castellation during placement of the unit. The castellations will self-align to the pads during solder reflow. Tolerance for Rotational (Theta) Misalignment Units when mounted should not be rotated more than ± 3 degrees with reference to center X-Y as shown in the recommended land pattern. Units with rotational misalignment of more than ± 3 degrees will not completely self-align after reflow. Units with less than a ± 3 degree misalignment will self-align after solder reflow. Y-Axis Misalignment of Castellation In the Y direction, the HSDL-3200 does not self-align after solder reflow. It is recommended that it be placed in line with the fiducial mark (mid-length of land pad). This will enable sufficient land length (minimum of 1/2 land length) to form a good joint. See the drawing below. Allowable Misalignment Direction Tolerance x ≤0.2 mm (0.008 inches) Theta ± 3 degrees Marking Information The unit is marked with a letter “B” and “YWWLL” for front options on the shield. Y is the year, WW is the workweek, and LL is the Lot information. MINIMUM 1/2 THE LENGTH OF THE LAND PAD LENS EDGE FIDUCIAL

To insure IrDA compliance, there are some constraints on the height and width of the optical window. The minimum dimensions ensure that the IrDA cone angles are met, and there is no vignetting, and the maximum dimensions ensure that the effects of stray light are minimized. The minimum size corresponds to a cone angle of 30 degrees, the maximum to a cone angle of 60 degrees. The drawing below shows the module positioned in front of a window. X is the width of the window, Y is the height of the window, and Z is the distance from the HSDL-3200 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens is 5.1 mm. The equations that determine the size of the window are as follows: X = 5.1 + 2(Z + D) tan q Y = 2(Z + D) tan q Where q is the required half angle for viewing. For the IrDA minimum, it is 15 degrees, for the IrDA maximum it is 30 degrees. (D is the depth of the LED image inside the part, 3.17 mm.) These equations result in the following tables and graphs: Minimum and Maximum Window Sizes Dimensions are in mm. Depth (Z) Y Min. X Min. Y Max. X Max. 0 1.70 6.80 3.66 8.76 1 2.23 7.33 4.82 9.92 2 2.77 7.87 5.97 11.07 3 3.31 8.41 7.12 12.22 4 3.84 8.94 8.28 13.38 5 4.38 9.48 9.43 14.53 6 4.91 10.01 10.59 15.69 7 5.45 10.55 11.74 16.84 8 5.99 11.09 12.90 18.00 9 6.52 11.62 14.05 19.15 10 7.06 12.16 15.21 20.31 Window Height Y vs. Module Depth Z Window Width X vs. Module Depth Z WINDOW WIDTH X – mm MODULE DEPTH Z – mm 01 0 ACCEPTABLE RANGE WINDOW HEIGHT Y – mm MODULE DEPTH Z – mm 01 0 ACCEPTABLE RANGE /;/;/;/;/; /;/;/;/; Y X /;/; /; Z

From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechanical design reasons, place a curve on the back side of the window that has the same radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will reduce the effects. The amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. Flat Window Curved Front and Back Curved Front, Flat Back

interference conditions in which the receiver is to operate correctly. The conditions are to be applied separately: 1. Electromagnetic field:

3 V/m maximum (please refer

to IEC 801-3, severity level 3 for details). 2. Sunlight: 10 kilolux maximum at the optical port. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased to provide 490 µW/cm 2 (with no modulation) at the optical port. The light source faces the optical port. This simulates sunlight within the IrDA spectral range. The effect of longer wavelength radiation is covered by the incandescent condition. 3. Incandescent Lighting: 1000 lux maximum. This is produced with general service, tungsten-filament, gas-filled, inside frosted lamps in the 60 Watt to 100 Watt range to generate 1000 lux over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The source is expected to have a filament temperature in the 2700 to

3050 Kelvin range and a

spectral peak in the 850 to 1050 nm range. 4. Fluorescent Lighting: 1000 lux maximum. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave signal (0 µW/cm 2 minimum and 0.3 µW/cm2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The frequency of the optical signal is swept over the frequency range from 20 kHz to 200 kHz. Due to the variety of fluorescent lamps and the range of IR emissions, this condition is not expected to cover all circumstances. It will provide a common floor for IrDA operation. For company and product information, please go to our web site: WWW.liteon.com or http://optodatabook.liteon.com/databook/databook.aspx Data subject to change. Copyright © 2007 Lite-On Technology Corporation. All rights reserved.