HSDL-3005

HSDL-3005 AVAGO | Alldatasheet

Document overview

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Technical content

Features

• Available in both the front view and top view options
• Guaranteed temperature performance, –25 to 85ºC – Critical parameters are guaranteed over temperature & supply voltage
• Low power consumption
• Small module size: Front View Top View – Height: 2.50 mm 2.80 mm – Width: 8.00 mm 7.50 mm – Depth: 3.00 mm 3.35 mm CAUTION: The BiCMOS inherent to the design of this component increases the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. HSDL-3005 IrDA® Data Compliant Low Power 115.2 kbit/s with Remote Control Infrared Transceiver Data Sheet
• Minimum external components – Integrated single-biased LED resistor – Direct interoperability to MPU – Programmable TxD features – Integrated remote control FET CC supply 2.4 to 3.6 volts
• Integrated EMI shield
• Designed to accommodate light loss with cosmetic windows
• IEC 825-Class I eye safe
• Lead-free package Remote Control Features
• Wide angle and high radiant intensity
• Spectrally suited to remote control transmission function
• Typical link distance up to 7 meters IrDA® Data Features
• Fully compliant to IrDA® physical layer specification 1.4 low power from 9.6 kbit/s to 115.2 kbit/s (SIR) – Excellent nose-to-nose operation – Link distance up to 50 cm
• Complete shutdown for TxD_IrDA, RxD_IrDA, and PIN diode
• Low power consumption – Low idle current, <100µA typically – Low shutdown current, 10 nA typically
• LED stuck-high protection

Applications

• Mobile data communication and universal remote control transmission – Personal digital assistants (PDAs) – Mobile phones

Figure 1. Functional block diagram. infrared transceiver module.

Figure 2. Pinout.

1 LEDA I IR and Remote Control LED Anode 1

8 GND I Connect to System Ground 8

1. Tied through external resistor, R1, to VLED from 2.4 to 4.5 Volts.
2. Logic high turns on the IrDA LED. If held HIGH longer than ~50 µs, the IrDA LED is turned off.

TxD_IrDA must be driven either HIGH or LOW. Do not leave the pin floating.

1. Output is at LOW pulse response when light pulse is seen.
2. Complete shutdown TxD_IrDA, RxD_IrDA, and PIN diode.
3. Regulated, 2.4 to 3.6 Volts.
4. Logic high turns on the RC LED. If held HIGH longer than ~50 µs, the RC LED is turned off.

TxD_RC must be driven either HIGH or LOW. Do not leave the pin floating.

1. Tie this pin to system ground.
2. Tie to system ground via a low inductance trace. For best performance, do not tie it to the
3. CX1 and CX2 must be placed within 0.7 cm of HSDL-3005 to obtain optimum noise immunity.

Configuration for HSDL-3005 The HSDL-3005 can operate in the single-TxD programmable mode or the two-TxD direct transmission mode. (A) Single-TxD Programmable Mode In the single-TxD programmable mode, only one input pin (TxD_IrDA input pin) is used. The transceiver is in default mode (IrDA) when powered up. (B) Single-TxD Programmable Mode SD TXD_IrDA TXD_RC LED Remarks 0 0 0 OFF IR Rx enabled. Idle mode 0 0 1 ON Remote control operation 0 1 0 ON IrDA Tx operation 0 1 1 ON Not recommended 1 0 0 OFF Shutdown mode* * The shutdown condition will set the transceiver to the default mode (IrDA). DRIVE IrDA LED DRIVE RC LED DRIVE IrDA LED SHUTDOWN SHUTDOWN (ACTIVE HIGH) T xD_IrDA (ACTIVE HIGH) T xD_RC (GND) RESET tCtTL RC MODE tBtA tC User needs to apply the following programming sequence to both the TxD_IrDA and SD inputs to enable the transceiver to operate in either the IrDA or remote control mode.

Absolute Maximum Ratings at TA = 25°C For implementations where case to ambient thermal resistance is ≤ 50°C/W. Parameter Symbol Min. Max. Units Conditions Storage Temperature T S –40 100 ºC Operating Temperature T A –25 85 ºC LED Supply Voltage V LED 06 V Supply Voltage V CC 06 V Output Voltage: RxD V O 06 V LED Current Pulse Amplitude I VLED 300 mA ≤ 90 µs Pulse Width ≤ 20% Duty Cycle for TxD_IrDA, TxD_RC Irradiance Recommended Operating Conditions Parameter Symbol Min. Max. Units Conditions Operating Temperature T A –25 85 ºC Supply Voltage V CC 2.4 3.6 V LED Supply Voltage V LED 2.4 4.5 V Logic Input Voltage Logic High V IH 2/3 VCC VCC V Logic Low V IL 0 1/3 V CC V Receiver Input Logic High E IH 0.0081 500 mW/cm 2 For in-band signals ≤ 115.2 kbit/s[3] Logic Low E IL 0.3 µW/cm2 For in-band signals[3] Receiver Data Rate 9.6 115..2 kbit/s Note: 3. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 ≤ lp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.

Electrical and Optical Specifications Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25ºC, VCC set to 3.0 V. Parameter Symbol Min. Typ. Max. Units Conditions Receiver Viewing Angle 2 q1/2 30 º Peak Sensitivity Wavelength lP 875 nm RxD_IrDA Logic High V OH VCC – 0.2 V CC VI OH = –200 µA, EI ≤ 0.3 µW/cm2 Logic Low V OL 0 0.4 V RxD_IrDA Pulse Width (SIR) [4] tRPW 1 2.3 7.5 µs q1/2 ≤ 15º, C L = 9 pF RxD_IrDA Rise & Fall Times tr, tf 30 100 ns C L= 9 pF Receiver Latency Time[5] tL 25 50 µs EI = 9.0 µW/cm2 Receiver Wake Up Time[6] tRW 75 200 µs EI = 10 mW/cm 2 Infrared (IR) Transmitter IR Radiant Intensity I EH 4 20 35 mW/sr q1/2 ≤ 15º, TxD_IrDA ≥ VIH, TA = 25 ºC IR Viewing Angle 2 q1/2 30 60 º IR Peak Wavelength lP 885 nm TxD_IrDA High V IH 2/3 VCC VCC V Low V IL 0 1/3 V CC V TxD_IrDA High I H 0.02 1 µAV I ≥ VIH Low I L –0.02 1 µA0 ≤ VI ≤ VIL LED Current Shutdown I VLED 0.02 1 µAV I (SD) ≥ VIH, Wake Up Time[7] tTW 180 500 ns Optical Pulse Width (SIR) t PW(SIR) 1.41 1.6 µst PW(TXD) = 1.6 µs at 115.2 kbit/s Maximum Optical Pulse Width [8] tPW(Max) 25 120 µs Data Setup Time tA 25 ns Data Pulsewidth tB 25 ns Programming Time tC 25 ns TxD Rise & Fall Times (Optical) tr, tf 600 ns LED Anode On-State Voltage V ON (LEDA) 2.6 V I LEDA = 100 mA, VI(TxD) ≥ VIH Remote Control (RC) Transmitter RC Radiant Intensity I EH 65 mW/sr q1/2 ≤ 15º, TxD_RC ≥ VIH, TA = 25ºC RC Viewing Angle 2 q1/2 30 60 º RC Peak Wavelength lP 885 nm TxD_RC High V IH 2/3 VCC VCC V Low V IL 0 1/3 V CC V TxD_RC High I H 0.02 1 µAV I ≥ VIH Low I L –0.02 1 µA0 ≤ VI ≤ VIL LED Anode On-State Voltage V ON (LEDA) 2.1 V I LEDA = 200 mA, VI(TxD) ≥ VIH Input Current Logic Levels Logic Levels Input Current Output Voltage

HSDL-3005-021 (Front) Package Dimensions 2.85 MOUNTING CENTER 4.0 1.025 NOTES: 1. ALL DIMENSIONS IN MILLIMETERS (mm). 2. DIMENSION TOLERANCE IS 0.2 mm UNLESS OTHERWISE SPECIFIED. 3. COPLANAITY: 0.05 TO -0.150 mm. CL 2.5 4.0 8.0 2.05 2.55 EMITTERRECEIVER 0.35 0.65 0.80 CL 3.325 6.65 0.6 2.93.0 1.85 1.175 0.60 1.25 1.75 1.35 0.475 1.425 2.375 3.325 CL MOUNTING CENTER EXTERNAL GROUND 0.775 234567

1 VLEDA 5 SD

2 N.C. 6 VCC

3 TxD_IrDA 7 TxD_RC

4 RxD 8 GND

1.425 SOLDERING PATTERN

HSDL-3005-021(Front) Tape and Reel Dimensions 16.4 + 2 21 ± 0.8 UNIT: mm B C ∅ 13.0 ± 0.5 2.0 ± 0.5 2.0 ± 0.5 LABEL 3.4 ± 0.1 8.4 ± 0.1 8.0 ± 0.1 4.0 ± 0.1 1.5 ± 0.1 7.5 ± 0.1 16.0 ± 0.2 1.75 ± 0.1 ∅ 1.5+ 0.1 0.4 ± 0.05 2.8 ± 0.1 POLARITY PIN 8: VLED PIN 1: GND OPTION # "B" "C" QUANTITY 001 021 178 330 500 2500 EMPTY PARTS MOUNTED LEADER EMPTY (40 mm MIN.) (400 mm MIN.) (40 mm MIN.) PROGRESSIVE DIRECTION R 1.0 DETAIL A DETAIL A UNIT: mm

HSDL-3005-028 (Top) Package Dimensions CL 5.1 7.5 2.8 3.325 0.95 x 7 = 6.65 ± 0.15 0.6 ± 0.15 0.05 (MAX.) +0.05 -0.2 1.8+0.05 -0.2 3.6 1.55 2.35 CL 0.4 ± 0.15 0.95 ± 0.1 0.7 ± 0.1 2.8 3.35 1.55 0.3 0.60 0.90 2.20 MOUNTING CENTER 0.575 1.60 1.275 1.45 CL 0.475 1.425 2.375 3.325 XXX DATECODE MARKING NOTES: 1. ALL DIMENSIONS IN MILLIMETERS (mm). 2. DIMENSION TOLERANCE IS 0.2 mm UNLESS OTHERWISE SPECIFIED.

1 VLED 5 SD

2 N.C. 6 V CC <=0.1 mm UNDER THE COPLANARITY SPECS.

HSDL-3005-028 (Top) Tape and Reel Dimensions Bo Po W E 1.5 Ko Do F P2D1 B B 5°(MAX.) 5°(MAX.) Ao AA A-A SECTION B-B SECTION SYMBOL Ao Bo Ko Po P1 P2 T SYMBOL E F Do D1 W 10Po UNIT: mm 5° 3.1 ± 0.1 2.6 +0.05 - 0.10 16.0 +0.5 ∅ 13.1 DETAIL A (5/1) +0.5 120° 60°TYP. ∅ 99.5 ± 1 ∅ 330 ± 1 ∅ 264 NOTES: 1. 10 SPROKET HOLE PITCH CUMULATIVE TOLERANCE IS ± 0.2 mm. 2. CARRIER CAMBER SHALL NOT BE MORE THAN 1 mm PER 100 mm THROUGH A LENGTH OF 250 mm. 3. Ao AND Bo MEASURED ON A PLACE 0.3 mm ABOVE THE BOTTOM OF THE PACKET. 4. Ko MEASURED FROM A PLACE ON THE INSIDE BOTTOM OF THE POCKET TO TOP SURFACE OF CARRIER. 5. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE. PS T

Figure 7. Baking conditions chart. Baking should only be done once.

Recommended Reflow Profile Process Zone Symbol DT Maximum DT/Dtime Heat Up P1, R1 25 °C to 160°C4 °C/s Solder Paste Dry P2, R2 160 °C to 200°C 0.5 °C/s Solder Reflow P3, R3 200 °C to 255°C (260°C at 10 seconds max.) 4 °C/s P3, R4 255 °C to 200°C– 6 °C/s Cool Down P4, R5 200 °C to 25°C– 6 °C/s The reflow profile is a straight- line representation of a nominal temperature profile for a con- vective reflow solder process. The temperature profile is divided into four process zones, each with different DT/Dtime temperature change rates. The DT/Dtime rates are detailed in the above table. The tempera– tures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3005 castellation pins are heated to a temperature of 160°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL-3005 castellations. Process zone P2 should be of sufficient time duration (60 to 120 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 200°C (392°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 255°C (491°F) for optimum results. The dwell time above the liquidus point of solder should be between 20 and 60 seconds. It usually takes about 20 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 60 seconds, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 200°C (392°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 6°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3005 castellations to change dimensions evenly, putting minimal stresses on the HSDL- 3005 transceiver. t-TIME (SECONDS) T – TEMPERATURE – (°C) 230 200 160 120 50 150 100 200 250 300 180 220 255 HEAT UP SOLDER PASTE DRY SOLDER REFLOW COOL DOWN R3 R4 60 sec. MAX. ABOVE 220°C MAX. 260°C

1.0 Solder Pad, Mask and Metal Stencil

Figure 8. Stencil and PCBA.

1.1 Recommended Land Pattern

Figure 9. Land pattern.

Figure 10. Solder stencil aperture.

1.2 Recommended Metal

used for solder paste printing.

1.3 Adjacent Land Keepout and

unit relative to the land pattern. components within this area. bridging adjacent pads is 0.2 mm. Figure 11. Adjacent land keepout and solder mask areas.

Appendix B: PCB Layout Suggestion The following PCB layout guidelines should be followed to obtain a good PSRR and EM immunity resulting in good electrical performance. Things to note: 1. The ground plane should be continuous under the part, but should not extend under the shield trace. 2. The shield trace is a wide, low inductance trace back to the system ground. 3. VLED can be connected to either unfiltered or unregulated power supply. If VLED and Vcc share the same power supply, CX3 need not be used and the connections for CX1 and CX2 should be before the current limiting resistor R1. In a noisy environment, including capacitor CX2 can enhance supply rejection. CX1 is generally a ceramic capacitor of low inductance providing a wide frequency response while CX2 and CX3 are tantalum capacitors of big volume and fast frequency response. The use of a tantalum capacitor is more critical on the VLED line, which carries a high current. 4. Preferably a multi-layered board should be used to provide sufficient ground plane. Use the layer underneath and near the transceiver module as Vcc, and sandwich that layer between ground connected board layers. Refer to the diagram below for an example of a four-layer board. The area underneath the module at the second layer, and 3 cm in all directions around the module, is defined as the critical ground plane zone. The ground plane should be maximized in Top View this zone. Refer to application note AN1114 or the Avago IrDA Data Link Design Guide for details. The layout below is based on a two-layer PCB. Bottom View TOP LAYER CONNECT THE METAL SHIELD AND MODULE GROUND PIN TO BOTTOM GROUND LAYER. LAYER 2 CRITICAL GROUND PLANE ZONE. DO NOT CONNECT DIRECTL Y TO THE MODULE GROUND PIN. LAYER 3 KEEP DATA BUS AWAY FROM CRITICAL GROUND PLANE ZONE. BOTTOM LAYER (GND)

Figure 12. IR layout in mobile phone platform.

Description

The HSDL-3005, a wide-voltage operating range infrared transceiver is a low-cost and small form factor device that is designed to address the mobile computing market such as PDAs, as well as small embedded mobile products such as digital cameras and cellular phones. It is spectrally suited to universal remote control transmission function. It is fully compliant to IrDA 1.4 low power specification from 9.6 kb/s to 115.2 kb/s, and supports most remote control codes. The design of the HSDL- 3005 also includes the following unique features:

• Spectrally suited to universal remote control transmission function.
• Low passive component count.
• Shutdown mode for low power consumption requirement. Selection of Resistor R1 Resistor R1 should be selected to provide the appropriate peak pulse LED current over different ranges of Vcc as shown on page 3 under "Recommended Application Circuit Components". Interface to Recommended I/O Chips The HSDL-3005’s TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required. Data rate from 9.6 kb/s up to 115.2 kb/s is available at the RXD pin. The TXD_RC, (pin 7), or the TXD_IrDA, (pin 3), can be used to send remote control codes. The block diagrams below show how the IrDA port fits into a mobile phone and PDA platform. TRANSCEIVER MOD/ DE-MODULATOR SPEAKER RF INTERFACE AUDIO INTERFACE USER INTERFACE MICROCONTROLLER DSP CORE ASIC CONTROLLER IR MICROPHONE MOBILE PHONE PLATFORM RC HSDL-3005

Figure 13. IR layout in PDA platform. control transmission function.

Appendix D: Window Designs for HSDL-3005 To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 30 degrees, the maximum to a cone angle of 60 degrees. X is the width of the window, Y is the height of the window, and Z is the distance from the HSDL- 3005 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens is 5.1 mm. The equations for the size of the window are as follows: X = 5.1 +2(Z + D) tan θ Y = 2(Z + D) tan θ Where θ is the required half angle for viewing. For the IrDA minimum, it is 15 degrees, for the IrDA maximum it is 30 degrees. (D is the depth of the LED image inside the part, 3.17 mm). These equations result in the following tables and graphs: Minimum and Maximum Window Sizes Dimensions are in mm. Depth (Z) Y min. X min. Y max. X max. 0 1.70 6.80 3.66 8.76 1 2.23 7.33 4.82 9.92 2 2.77 7.87 5.97 11.07 3 3.31 8.41 7.12 12.22 4 3.84 8.94 8.28 13.38 5 4.38 9.48 9.43 14.53 6 4.91 10.01 10.59 15.69 7 5.45 10.55 11.74 16.84 8 5.99 11.09 12.90 18.00 9 6.52 11.62 14.05 19.15 10 7.06 12.16 15.21 20.31 Window Height Y vs. Module Depth Z Window Width X vs. Module Depth Z Y X Z WINDOW HEIGHT Y – mm MODULE DEPTH Z – mm 01 0 ACCEPTABLE RANGE 60° CONE 30° CONE WINDOW WIDTH X – mm MODULE DEPTH Z – mm 01 0 ACCEPTABLE RANGE 60° CONE 30° CONE

Almost any plastic material will work as a window material. Polycarbonate is recommended. The surface finish of the plastic should be smooth, without any texture. An IR filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. Light loss should be measured at 875 nm. The recommended plastic materials for use as a cosmetic window are available from General Electric Plastics. Recommended Plastic Materials Material # Light Transmission Haze Refractive Index Lexan 141 88% 1% 1.586 Lexan 920A 85% 1% 1.586 Lexan 940A 85% 1% 1.586 Note: 920A and 940A are more flame retardant than 141. Recommended Dye: Violet #21051 (IR transmissant above 625 nm)

From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechanical or industrial design reasons, place the same curve on the back side of the window that has an identical radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. The amount of change in the Curved Front and Back (Second choice) Curved Front, Flat Back (Do not use) Flat Window (First choice) radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm.

For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries . Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes 5989-0729EN 5989-4166EN June 26, 2006