HS7514 SIPEX | Alldatasheet
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SIGNAL PROCESSING EXCELLENCE 159 DESCRIPTION… The SP7514 and HS3140 are precision 14-bit multiplying DACs, that provide four-quadrant multiplication. Both parts accept both AC and DC reference voltages. The SP7514 is available for use in commercial and industrial temperature ranges, packaged in a 20-pin SOIC. The HS3140 is available in commercial and military temperature ranges, packaged in a 20-pin side-brazed DIP. I Monolithic Construction I 14–Bit Resolution I 0.003% Non-Linearity I Four-Quadrant Multiplication I Latch-up Protected I Low Power - 30mW I Single +15V Power Supply 96k 96k 48k SWITCHES ARE SHOWN IN THE HIGH STATE I OUT1 R FEEDBACK BIT 14 LSB BIT 1 (MSB) BIT 2 BIT 3 BIT 4 4 to 16 DECODE GND VDD VREF
15 EQUAL
SP7514, HS3140 Corporation SIGNAL PROCESSING EXCELLENCE SP7514 and HS3140 14-Bit Multiplying DACs
SIGNAL PROCESSING EXCELLENCE 160 SPECIFICATIONS (Typical @ 25°C, nominal power supply, VREF = +10V, unipolar unless otherwise noted) PARAMETER MIN. TYP. MAX. UNITS CONDITIONS DIGITAL INPUT Resolution Bits 2–Quad, Unipolar Coding Binary 4–Quad, Bipolar Coding Offset Binary Logic Compatibility CMOS, TTL Note 1 Input Current µA REFERENCE INPUT Voltage Range ±25 V Note 2 Input Impedance 3.25 9.75 KOhms ANALOG OUTPUT Scale Factor 225 µA/VREF Scale Factor Accuracy Note 3 Output Leakage nA Note 4 Output Capacitance COUT 1, all inputs high 100 pF COUT 1, all inputs low pF COUT 2, all inputs high pF COUT 2, all inputs low 100 pF STATIC PERFORMANCE Integral Linearity Note 5 SP7514KN/BN, HS3140–4 ±0.003 ±0.006 % FSR SP7514JN/AN, HS3140–3 ±0.006 ±0.012 % FSR Differential Linearity Note 6 SP7514KN/BN, HS3140–4 ±0.003 ±0.006 %FSR SP7514JN/AN, HS3140–3 ±0.006 ±0.012 % FSR Monotonicity SP7514KN/BN, HS3140–4 Guaranteed to 14 bits SP7514JN/AN, HS3140–3 Guaranteed to 13 bits STABILITY (TMIN to TMAX) Scale Factor ppm FSR/°C Note 7 and 8 Integral Linearity 0.5 1.0 ppm FSR/°C Differential Linearity 0.5 1.0 ppm FSR/°C Monotonicity Temp. Range SP7514JN/KN, HS3140C +70 SP7514AN/BN –40 +85 HS3140B –55 +125 DYNAMIC PERFORMANCE Digital Small Signal Settling 1.0 µS Digital Full Scale Settling 2.0 µS Reference Feedthrough Error (VREF = 20Vpp) @ 1kHz 200 µV @ 10kHz mV Reference Input Bandwidth MHz POWER SUPPLY (VDD) Operating Voltage +15 ±5% V Voltage Range +18 V Current 2.0 mA Note 9 Rejection Ratio 0.005 %/%
SIGNAL PROCESSING EXCELLENCE 161 0.048% 0.024% 0.012% 0.006% 0.003% LINEARITY - % VDD -VOLTS Linearity vs. Supply Voltage 2.5 I 2.0 1.5 1.0 DD -mA VDD-VOLTS Power Supply Current vs. Voltage 0.048 0.024 0.012 0.006 0.003 0.01 0.1 INTEGRAL LINEARITY ERROR - % VREF -VOLTS Integral Linearity Error vs. Reference Voltage
2 LSB
1 LSB
1/2 LSB @ 16 BITS LINEARITY ERROR - PPM VOS-mV Additional Linearity Error vs. Output-Amplifier Offset-Voltage (VREF = + 10V) 0.01 GAIN CHANGE - % 0.004 0.002 VDD-VOLTS 0.008 0.006 Gain Change vs. Supply Voltage CHARACTERISTIC CURVES (Typical @ + 25°C, VDD = + 15VDC, VREF = + 10VDC, unless otherwise noted) SPECIFICATIONS (continued) (Typical @ 25°C, nominal power supply, VREF = +10V, unipolar unless otherwise noted) PARAMETER MIN. TYP. MAX. UNITS CONDITIONS ENVIRONMENTAL AND MECHANICAL Operating Temperature SP7514JN/KN +70 SP7514AN/BN –40 +85 HS3140–C +70 HS3140–B –55 +125 HS3140–B/883 –55 +125 Storage Temperature –65 +150 Package SP7514_N 20-pin SOIC HS3140 20–pin Side–Brazed DIP Notes: Digital input voltage must not exceed supply voltage or go below –0.5V ; “0” <0.8V; 2.4V < “1” ≤VDD. AC or DC; use R6758–1 for fixed reference applications Using the internal feedback resistor and an external op amp. The Scale Factor can be adjusted externally by variable resistors in series with the reference input and/or in series to the internal feedback resistor. Please refer to the Applications Information section. At 25°C; the output leakage current will create an offset voltage at the external op amps output. It doubles every 10°C temperature increase. Integral Linearity is measured as the arithmetic mean value of the magnitudes of the greatest positive deviation and the greatest negative deviation from the theoretical value for any given input combination. Differential Linearity is the deviation of an output step form the theoretical value of 1LSB for any two adjacent digital input codes. At 25°C, the output leakage current will create an offset voltage output. It doubles every 10°C temperature increase. Using the internal feedback resistor and an external op amp. Use series 470ohm resistor to limit start-up current.
Pin 1 – IO1 – Current Output 1. Pin 2 – IO2 – Current Output 2. Pin 4 – DB13 – MSB, Data Bit 1. Pin 17 – DB0 – LSB, Data Bit 14. Pin 18 – VDD – Positive Supply Voltage. Pin 19 – VREF – Reference Voltage Input. Pin 20 – RFB – Feedback Resistor. for only 2-n of the converter’s full-scale value. would affect the output by 0.5% of FSR. the same functional performance can be obtained. chip CMOS circuit with a resistor ladder network. sistor for the 1 LSB offset in bipolar mode. Figure 1. SP7514/HS3140 Equivalent Output Circuit
Figure 4. Microprocessor Interface to SP7514/HS3140
0 TO - V REF
to increase noise gain. The trade-off is noise vs.
- Using LF441A amplifier (low power - 741 pinout)
- Specified offset: 0.5mV max
- Temperature coefficient of input offset: 10µV/°C max
operation. Connect IO1 and FB1 as shown in diagram. the VDD supply line to limit current during ‘turn-on’. applications the SP2525 is recommended.
SIGNAL PROCESSING EXCELLENCE 165
ORDERING INFORMATION
Double-Buffered 12-Bit Multiplying DAC
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