FX205 CMLMICRO | Alldatasheet
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Technical content
=) PRODUCT INFORMATION FX205 Tone Encoder Publication D/205/3 August 1990 FUNCTIONAL SCHEMATIC Obsolete Product - For Information Only - AMPLITUDE CONTROL o= FX 205 a a —O FX 205P puch O TONE R2 ASTABLE } ENCODERS 0 0 0 0 ove O rier © a aro[ Jima | Mowostasue a a © +VE ae O Fig. 1
FEATURES
= ~~ PSEUDO-SINEWAVE OUTPUT ™ CHOICE OF PACKAGE STYLES = WIDE FREQUENCY RANGE = ADJUSTABLE OUTPUT AMPLITUDE = OPTIONAL TIMED TONE BURST = CONVERTS EXTERNAL INPUT PULSES TO SINEWAVE OUTPUT
DESCRIPTION
The FX205 and F X205P are monolithic pseudo-sinewave generators. The FX205 is encapsulated in a hermetically sealed metal can and the F X205P is packaged in a plastic D.I.L. The circuits have an extensive range of applications encompassing telecommunications, contral systems and alarm or supervisory signalling The output tone frequency is adjustable between 30Hz and 5kHz by using an external resistor and capacitor (R1 and C1) as illustrated in Fig. 2, Figures 4 and 5 show the component value of R1, for given values of C1 required to generate any frequency in the range. R2 is fixed at 10k ohms. The output frequency, fo, can be obtained from fo= 1 Hertz 5.6 (R2 + 2R1)C1 Where R1 and R2 are expressed in megohms C1 is in microfarads and the value 5.6 is a constant of the device and is subject to a tolerarice of + 10%, The output frequency can range from d.c. to 50kHz by providing external clock pulses to the R1 C1 pin. The input clock must be eight times the required output frequency.
ve SUPPLY The FX205 and FX205P will generate an output for the period of time that the Enable Gate input (] is held positive. Optionally a resistor (Rt) and capacitor (Ct) can be provided as shown on Fig. 2. Rare ni ct] This ensures that the output is generated for a minimum duration given by rx205 on Y Px2058 T = 0.7 Rt Ct seconds lenasve | [- TT | where Rt is expressed in megohms, eve -ve Ct is in microfarads, and 0.7 is a device constant WE suPpLY —|supeuy surpuy {tolerance + 5%). an eowinou “COTO The monostable is not retriggerable and a further ¥X205 AND FX205P COMPONENT CONNECTIONS Fig.2 timed period can only be initiated after completion of the original burst. Should the (2) TIMED TONE BURST Enable input be held positive for longer than time T the device will continue generating a tone until Enable | _ disabled. re (3) DIRECT GATING (Timing Gate o/<) Enable output ' tmin ‘NOTE Brvice completen kat miniaun current Fig, 3 Fteco -negeraeo Paeouency tse 00 3000 IN THE RANGE. 300M2 70" SKHE FOR Gi=t0F KO cALCHLATION OF mi no"Fxeo At ToKohas. REQUIRED FREQUENCY €0 \\, Stone ron vanzous vacues 4500 \\ ad Ri FIRED AT Lekchms 7 . Baw aw J tA MS VN be EN ENT a LUA AT LIS Fy F 3 asoo 2 é TI KIN LAWN KE TES J AT ON 4h . aNNe Se 100 4 SI ~ || Mk. — 100k 200% 300k 400k ‘s00k 600K TouK RL RESISTANCE 18 cms RL RESISTANCE 11 OMS Fig. 4 Fig. 5
MULTI-TONE OUTPUT USING A MASTER CLOCK AND PROGRAMMABLE DIVIDERS. EXTERNAL AMPLITUDE CONTROL Vout = iR,(Sinwt + Sinogt + Sinwst) ive “ve Boag £2 BARE €2 ee RL 33k RL hox L__stiiton | ovrpel output Vout! Viout --- - Lit Ampl Pe EIIEINCS, a + 2k Vz = Vb . “ ae sve joorzer a) aan [000 viout = QBs x RL veane. NOTE GHOS Programabie where RL is in ohms Syrenronous + by We and 6800 is a device constant eg. ‘cpt0S) or similar (subject to #20% tolerance) Fig. 6 Fig. 7 oan. The output is generated in the form of | | Biowite Axion irs seat | | | sinusoidally weighted current steps. A typical -1048 | SUPPLY VOLTAGE = 12v. fo = 1h ne output spectrum is shown in Fig.8, while Fig. 9 ge as asfe ny = e000 shows the effect on the harmonic content of a z ry te te y_ Erte capacitor in parallel to RL. Multiple tones can be ere fy) Eel aan mixed by connecting outputs to a common load = toes resistor as shown in Fig. 6. The circuit is designed Fi Ltt ty r | | to always start and end tone generation at the Fee Tri tlie ce minimum current step (i.e. most negative output wLE TTT TTT TT see sone mee ate lo sto tle te ate oto vote The output voltage can be adjusted over a range ‘FREQUENCY Fig. Of +35% from the nominal level by applying a oa voltage (Vb) to the Amplitude Control input as [| ‘TISICAL SPECTRAL OUTPUT OF Fx205 WITH CAPACITIVE shown in Fig. 7. Vb can'range from 25% to 55% -108 Porouneoa eos Sane BEATIVE TO re of the supply voltage (internal bias is 40% | | supptie VOLEAGE 12¥ fo « 1KHe | ti nominally). Pied | T~ © 28°C RL = 6009 CL = 0.1LF aan E soap fut | TT TT 3 soa: Fat |] TT PET “ Pi yt von | | nol | tT TT TT yy to io ito to Sto éfo Wo elo fo 10t0 rnequency Fig. 9 FX205 PIN CONFIGURATION ‘ . 1. RL cL tees ° 2. -VE supply . °, 5 e 3. Output ° . © 03 70 }) 4. amplitude controt 021 80 5. +E Supply ° 6. Timing Gate inches m.m. A 0.365 9.27 = 7. Enable Gate B 01325 8.26 c View on pins 8. R2 9-800 12:7 E 0.030 0.8 . Tt Note: Pin 5 is internally connected F 9.018 0-45 H fo the case. Fig,10 02038 0.9 Lis 1 43° equally FAZOSP PIM CONFIGURATION spaced ale : * (ror view " a ° sone tes ENABLE D1 8Qriminc 7 fh ES cate are 4. -e Pie ane Gai he N y) PEPE ricci D3 6Qauerr te, SSE>D SONTROL. ; -vE Da s(bureur . Fig, 13 SUPPLY Fig. 1
MAXIMUM RATINGS. Exceeding maximum rating may result in device damage. Maximum Voltage between any pin and +ve supply —20v to +0.3v Operating Temperature Range FX205 —30°C to +85°C FX205P —10°C to +60°C Storage Temperature Range FX205 —55°C to +125°C FX205P —40°C to + 85°C Device Dissipation at 85°C FX205 200mw at 60°C FX205P 120mW OPERATING CHARACTERISTICS Unless otherwise stated Supply Voltage = 12v T’amb = 25°C Output Frequency < 3kHz SYMBOL CHARACTERISTICS | win, | tye. | max. | UNITS Vs Supply Voltage (+ve supply = Ov) | -10 | —12 | -15 | Vv Is Supply Current (no load current) | | 7 | | mA fo Output Frequency Range (determined by R1, C1 & R2) 30 5k Hz fo Output Frequency Range (determined by external clock) 50k Hz Afo Frequency Variation per 1% change in Vs % Afo Frequency Variation per 1°C change in temperature % Pulse Width of External Clock [1.25 | | | os Vo Output Voltage (RL = 6002, Amplitude Control Pin o/c) mV rms. AVo Output Amplitude adjustment range i" (Vb applied to Amplitude Control Pin) #35 % Input Level to Enable Device | ft Vv Input Level to Disable Device [-9 | | | Vv Enable Input Pulse width | wo | | | us Input Impedance of Enable Input || 100k | 2 Value of FI Lim [a Value of R2 | fo [Te Value of Rt took | | toms Q Value of C1 por |] | oF Value of Ct a T Period of Timed Tone Burst 1 (T= 0,7 Rt Ct) ° s CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied ‘and CML reserves the right at any time without notice to change the said circuitry.