FPD3000SOT89 FILTRONIC | Alldatasheet

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FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com

  • PERFORMANCE (1850 MHz) ♦ 30 dBm Output Power (P1dB) ♦ 13 dB Small-Signal Gain (SSG) ♦ 1.3 dB Noise Figure ♦ 45 dBm Output IP3 ♦ 45% Power-Added Efficiency ♦ Evaluation Boards Available ♦ Available in Lead Free Finish: FPD3000SOT89E
  • DESCRIPTION AND APPLICATIONS The FPD3000SOT89 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a 0.25 x 3000 µm Schottky barrier Gate, defined by high- resolution stepper-based photolit hography. The recessed and offs et Gate structure minimizes parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a range of bias conditions and inpu t power levels. The FPD3000 is avai lable in die form and in other packages. Typical applications include driv ers or output stages in PCS/Cellu lar base station high-intercept- point LNAs, WLL and WLAN systems, and other types of wireless infrastructure systems.
  • ELECTRICAL SPECIFICATIONS AT 22°C Parameter Symbol Test Conditions Min Typ Max Units RF SPECIFICATIONS MEASURED AT f = 1850 MHz USING CW SIGNAL Power at 1dB Gain Compression P 1dB V DS = 5 V; IDS = 50% IDSS 29.5 30 dBm Small-Signal Gain SSG V DS = 5 V; IDS = 50% IDSS 11.5 13 dB Power-Added Efficiency PAE VDS = 5 V; IDS = 50% IDSS; POUT = P1dB 45 % Noise Figure NF V DS = 5 V; IDS = 50% IDSS VDS = 5 V; IDS = 25% IDSS 1.3 0.9 dB Output Third-Order Intercept Point (from 15 to 5 dB below P1dB) IP3 V DS = 5V; IDS = 50% IDSS Matched for optimal power Matched for best IP3 dBm Saturated Drain-Source Current I DSS V DS = 1.3 V; VGS = 0 V 750 930 1100 mA Maximum Drain-Source Current I MAX VDS = 1.3 V; VGS ≅ +1 V 1.5 A Transconductance G M VDS = 1.3 V; VGS = 0 V 800 mS Gate-Source Leakage Current I GSO V GS = -5 V 2 20 µA Pinch-Off Voltage |V P| V DS = 1.3 V; IDS = 3 mA 0.7 1.0 1.3 V Gate-Source Breakdown Voltage |V BDGS| I GS = 3 mA 12 16 V Gate-Drain Breakdown Voltage |V BDGD| I GD = 3 mA 12 16 V

FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com

  • ABSOLUTE MAXIMUM RATINGS1 Parameter Symbol Test Conditions Min Max Units Drain-Source Voltage V DS -3V < VGS < +0V 8 V Gate-Source Voltage V GS 0V < VDS < +8V -3 V Drain-Source Current I DS For VDS > 2V I DSS mA Gate Current I G Forward or reverse current 30 mA RF Input Power2 PIN Under any acceptable bias state 600 mW Channel Operating Temperature T CH Under any acceptable bias state 175 ºC Storage Temperature T STG Non-Operating Storage -40 150 ºC Total Power Dissipation P TOT See De-Rating Note below 3.5 W Gain Compression Comp. Under any bias conditions 5 dB Simultaneous Combination of Limits3 2 or more Max. Limits 80 % 1TAmbient = 22°C unless otherwise noted 2Max. RF Input Limit must be further limited if input VSWR > 2.5:1 3Users should avoid exceeding 80% of 2 or more Limits simultaneously Notes:
  • Operating conditions that exceed the Absolute Maximum Ratings will result in permanent damage to the device.
  • Total Power Dissipation defined as: PTOT ≡ (PDC + PIN) – POUT, where: P DC: DC Bias Power PIN: RF Input Power POUT: RF Output Power
  • Total Power Dissipation to be de-rated as follows above 22°C: PTOT= 3.5W – (0.025W/°C) x TPACK where TPACK = source tab lead temperature above 22°C (coefficient of de-rating formula is the Thermal Conductivity) Example: For a 65 °C source lead temperature: PTOT = 3.5W – (0.025 x (65 – 22)) = 2.43W
  • HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised duri ng handling. Proper Electrostatic Discharge (ESD) precautions should be observed at al l stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A per ESD-STM5.1- 1998, Human Body Model. Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263.
  • APPLICATIONS NOTES & DESIGN DATA Applications Notes are available from your local Filt ronic Sales Representative or directly from the factory. Complete design data, including S-parameters, noise data , and large-signal models are available on the Filtronic web site. Evaluation Boards available upon request.

FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com

  • BIASING GUIDELINES ¾ Active bias circuits provide good performance stab ilization over variations of operating temperature, but require a larger number of com ponents compared to self -bias or dual-biased. Such circuits should include provisions to ensure that Gate bias is ap plied before Drain bias, otherwise the pHEMT may be indu ced to self-oscillate. Contact your Sales Representative for additional information. ¾ Dual-bias circuits are relatively simple to im plement, but will requir e a regulated negative voltage supply for depletion-mode devices such as the FPD3000SOT89. ¾ Self-biased circuits employ an RF-bypassed Source resistor to provide the negative Gate-Source bias voltage, and such circuits provide some temperature stabilization for the device. A nominal value for circuit development is 1.2 Ω for a 50% of IDSS operating point. ¾ For standard Class A operation, a 50% of I DSS bias point is recommended. A small amount of RF gain expansion prior to the onset of compression is normal for this operating point. Note that pHEMTs, since they are “quasi- E/D mode” devices , exhibit Class AB tra its when operated at 50% of IDSS. To achieve a larger separation between P 1dB and IP3, an operating point in the 25% to 33% of I DSS range is suggested. Such Class AB operation will not degrade the IP3 performance.
  • PACKAGE OUTLINE (dimensions in mm) All information and specifications subject to change without notice.

FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com

  • TYPICAL TUNED RF PERFORMANCE Typical power and efficiency is shown above. The devices were biased nominally at V DS = 5V, I DS = 50% of I DSS, at a test frequency of 1.85 GHz. The te st devices were tune d (input and output tuning) for maximum output power at 1dB gain compression. Power Transfer Characteristic 23.0 24.0 25.0 26.0 27.0 28.0 29.0 30.0 31.0 32.0 Input Power (dBm) Output Power (dBm) -0.75 -0.25 0.25 0.75 1.25 1.75 2.25 2.75 3.25 Gain Compression, (dB) Pout (dBm) Comp Point Drain Efficiency and PAE 10% 15% 20% 25% 30% 35% 40% 45% Input Power (dBm) PAE (%) 10% 15% 20% 25% 30% 35% 40% 45% Drain Efficiency (%) PAE Eff.

FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com Note: pHEMT devices exhibit no n-classical intermodulation perfor mance, with equivalent IP3 values exceeding 14 dB above P 1dB. This IMD enhancement is affected by the quiescent bias current, the Drain-Source voltage, and the tuning or matching applied to the device. Maximum Stable Gain & S21 Frequency (GHz) FPD3000SOT89 5V / 50%IDSS 35Mag S21 & MSG MSG S21 Typical Intermodulation performance VDS = 5V, IDS = 50% IDSS at f = 1.85GHz Inout Power (dBm) Output Power (dBm) -60.00 -58.00 -56.00 -54.00 -52.00 -50.00 -48.00 -46.00 -44.00 -42.00 -40.00 3rd Order IM Products (dBc) Pout (dBm) 3rds (dBc)

FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com

1850 MHz

Contours swept with a constant input power, set so that nominal P 1dB is achieved at the point of optimum output match. Input (Source plane) Γs: 0.70 ∠ -165.5º 0.17 - j0.12 (normalized) 8.5 – j6.0 Ω Nominal IP3 per formance is obtained with th is input plane match, and the output plane match as shown.

  • TYPICAL OUTPUT PLANE POWER CONTOURS (VDS = 5V, IDS = 50% IDSS)

900 MHz

Contours swept with a constant input power, set so that nominal P 1dB is achieved at the point of optimum output match. Input (Source plane) Γs: 0.78 ∠ -147.4º 0.13 - j0.29 (normalized) 6.5 – j14.5 Ω Nominal IP3 per formance is obtained with this input plane match, and the output plane match as shown. 0 1. 10. Swp Max 143 Swp Min 30dBm 29dBm 28dBm 27dBm 26dBm 25dBm 24dBm 10.0 -10.0 5.0 -5.0 3.0 -3.0 4.0 -4.0 0.2 -0.2 0.4 -0.4 Swp Max 131 Swp Min 29dBm 28dBm 27dBm26dBm 25dBm 24dBm 30dBm

FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com

  • TYPICAL SCATTERING PARAMETERS (50Ω SYSTEM) See Website “More Info” for S-parameter design files. 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 FPD3000SOT89 5V / 50%IDSS Swp Max 8GHz Swp Min 0.5GHz S22

1 GHz

2 GHz

3 GHz

4 GHz

5 GHz

6 GHz 7 GHz

10.0 -10.0 5.0 -5.0 3.0 -3.0 4.0 -4.0 0.2 -0.2 0.4 -0.4 FPD3000SOT89 5V / 50%IDSS Swp Max 8GHz Swp Min 0.5GHz S11

1.5 GHz

2.5 GHz

3.5 GHz

5 GHz 6 GHz 7 GHz

FPD3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT Phone: +1 408 850-5790 http:// www.filtronic.co.uk/semis Revised: 01/05/05 Fax: +1 408 850-5766 Email: sales@filcsi.com

  • TYPICAL I-V CHARACTERISTICS Note: The recommended method for measuring IDSS, or any particular IDS, is to set the Drain-Source voltage (VDS) at 1.3V. This measurement point avoids th e onset of spurious self-oscillation which would normally distort the current measurement (thi s effect has been filtered from the I-V curves presented above). Setting the V DS > 1.3V will generally cause errors in the current measurements, even in stabilized circuits. Recommendation: Traditionally a device’s I DSS rating (IDS at VGS = 0V) was used as a predictor of RF power, and for MESFETs there is a correlation between I DSS and P 1dB (power at 1dB gain compression). For pHEMTs it ca n be shown that there is no meaningful statistical correlation between I DSS and P 1dB; specifically a linear regr ession analysis shows r 2 < 0.7, and the regression fails the F-statistic test. I DSS is sometimes useful as a guide to circuit tuning, since the S 22 does vary with the quiescent operating point IDS. DC IV Curves FPD3000SOT89 0.0 0.2 0.4 0.6 0.8 1.0 1.2 Drain-Source Voltage (V) Drain-Source Voltage (A) VG=-1.50V VG=-1.25V VG=-1.00V VG=-0.75V VG=-0.50V VG=-0.25V VG=0V