EVLB001

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Dimmable Fluorescent Ballast User Guide

ATAVRFBKIT / EVLB001 User Guide 1 7597B–AVR–10/07 Section 1 Section 2 Section 3 Section 4 Section 5 Section 6 Section 7

ATAVRFBKIT / EVLB001 User Guide 1-1 7597B–AVR–10/07 Section 1 Introduction Efficient fluorescent lamps and magnetic ballasts have been the standard lighting fixture in commercial and industrial lighting for many year s. Several lamp types, rapid start, high output, and others are available for cost effe ctive and special applications. But incandescent lamps, in spite of the poor light to p ower ratio, typically one fourth of fluo- rescent, offer one feature - dimming - that hasn’t been available in fluorescent lamps until now. Dimming allows the user to conserve elec trical power under natural ambient light or create effects to enhance mood or image pr esentation and projection for example. Typical rapid start fluorescent lamps have two pins at each end with a filament across the pins. The lamp has argon gas under low pressure and a small amount of mercury in the phosphor coated glass tube. As an AC voltage is applied at each end and the fila- ments are heated, electrons are driven off the fila ments that collide with mercury atoms in the gas mixture. A mercury electron reaches a higher energy level then falls back to a normal state releasing a photon of ultraviolet (UV) wavelength. This photon collides with both argon assisting ionization and the phosphor co ated glass tube. High voltage and UV photons ionize the argon, increasing gas conduct ion and releasing more UV pho- tons. UV photons collide with the phosphor atoms in creasing their electron energy state and releasing heat. Phosphor electron state decreas es and releases a visible light pho- ton. Different phosphor and gas materials can modify some of the lamp characteristics.

ATAVRFBKIT / EVLB001 User Guide 1-2 7597B–AVR–10/07 Figure 1-1. Fluorescent Tube Composition Since the argon conductivity increases and resistan ce across the lamp ends decreases as the gas becomes excited, an inductance (ballast) must be used to limit and control the gas current. In the past, an inductor could be designed to limit the current for a nar- row range of power voltage and frequency. A better method to control gas current is to vary an inductor’s volt-seconds to achieve the desired lamp current and intensity. A vari- able frequency inverter operating from a DC bus can do this. If the inductor is part of an R-L-C circuit, rapid start ignition currents, maxim um intensity, and dimming currents are easily controlled depending on the driving frequency versus resonant frequency. A ballast should include a power factor corrector ( PFC) to keep the main current and voltage in phase with a very low distortion over a wide range of 90 to 265 VAC 50/60 Hz. With microcontroller control, economical remote ana log or digital control of lamp func- tion and fault reporting are a reality . Moreover, adjusting the lamp power to correspond with human perceived light level is possible. An ap plication specific microcontroller brings the designer the flexibility to increase per formance and add features to the light- ing product. Some of the possible features are desc ribed here in detail. The final design topology is shown in the block diagram of Figure 2-1. Now, a new way of dimming fluorescent lamps fills t he incandescent/fluorescent feature gap plus adds many additional desirable features at a very reasonable cost.

1-3 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07

1.1 General

Description

Fluorescent ballast topology usually includes line conditioning for CE and UL compli- ance, a power factor correction block including a b oost converter to 400 V for universal input applications and a half bridge inverter. By varying the frequency of the inverter, the controller will preheat the filaments (high frequen cy), then ignite the lamp (reducing the frequency). Once the lamp is lit, varying the frequ ency will dim the light. The Atmel AT90PWM2B/216 microcontroller can be programmed to perform all of these functions. Figure 1-2. Ballast Demonstrator Board

1.2 Ballast

Features

• Automatic microcontroller dimmable ballast
• Universal input – 90 to 265 VAC 50/60 Hz, 90 to 37 0 VDC
• Power Factor Corrected (PFC) boost regulator
• Power feedback for stable operation over line volt age range
• Variable frequency half bridge inverter
• 18W, up to 2 type T8 lamps
• Automatic dimmable single lamp operation
• Automatic detection of Swiss or DALI
• Very versatile power saving options with microcont roller design for most functions

ATAVRFBKIT / EVLB001 User Guide 2-4 7597B–AVR–10/07 Section 2 Ballast Demonstrator Device Features

2.1 Atmel Supported

AT90PWM2B/216 Microcontroller

• High speed comparator for PFC zero crossover detec tion
• 6 Analog inputs for A/D conversion, 2.56V referenc e level
• 3 Digital inputs used for the dimming control inpu t
• 3 High speed configurabel PWM outputs used for the PFC and half bridge driver
• A fully differential A/D with programmable gain us ed for efficient current sensing
• SOIC 24 pin package
• Low power consumption in standby mode

2.2 IXYS ® Supported

Products IXI859 Charge pump with voltage regulator and MOSFET driver

• 3.3V regulator with undervoltage lockout
• Converts PFC energy to regulated 15VDC
• Low propagation delay driver with 15V out and 3V i nput for PFC FET gate IXTP3N50P MOSFET 500V, low R DS (ON) power MOSFET, 3 used in design IXTP02N50D depletion mode MOSFET
• 500V, 200mA, normally ON, TO-220 package and confi gured as current source IXD611S MOSFET driver
• Up to 600mA drive current
• half bridge, high and low side driver in a single surface mount IC
• Undervoltage lockout

Ballast Demonstrator Device Features 2-5 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 LDA111S Optocoupler (by Clare Inc., an IXYS company)

• 100mA continuous load rating
• 3750V RMS input to output isolation Figure 2-1. Ballast Demonstrator Block Diagram UVLO 15V 3.3VRegulator PFC Driver IX859 PFC BOOST REGULATOR Driver Driver 15V INVERTER DECOUPLING CAPACITOR RESONATING INDUCTOR AND FILAMENT TRANSFORMER 113 105 7T4 IXD611 R28 IXTP3N50P BULK CAPACITOR C9 C14 R13 R35 IXTP02N50D R10 R14 R39 2 10 5 6 C11 RESONATING CAPACITOR BALANCE TRANSFORMER AND LAMPS POWER VOLTAGE R42 PFC Output Inverter High Inverter Low V_HAVERSINE V_BUS V_LAMP I_LAMP PSCOUT00/PD0 PSCOUT20/PB0 PSCOUT21/PB1 ADC5/PB2 ADC4/PB7 ADC3/PD6 AMP0+/PB4 AMP0-/PB3 PFC_ZCD ACMP0/PD7 AT90PWMX Isolated DALI SWITCH Dimming Control DALI+ DALI- SWITCH DALI_TX DALI_RX SWITCH_CTRL TXD/DALI/PD3 RXD/DALI/PD4 ADC7/PB6 PFC Inductor

ATAVRFBKIT / EVLB001 User Guide 3-6 7597B–AVR–10/07 Section 3 Microcontroller Port Pin Assignments PD0 PCOUT00 PFC_OUTPUT - To IXI859 FET driver input PD1 PSCIN0 DUAL_LAMP - Dual lamp detection PD3 TXD/DALI DALI_TX - DALI transmit line PD4 RXD/DALI DALI_RX - DALI receive line PD5 ADC2 LAMP_EOL - Not supported in hardware nor sof tware PD6 ADC3 V_LAMP - Rectified lamp voltage sense, missi ng lamp, open or shorted filament, preheat, ignition & run. PD7 ACMP0 PFC_ZCD - Comparator for PFC zero current c rossing sense PB0 PSCOUT20 INVERTER_L - Low side half bridge driver output PB1 PSCOUT21 INVERTER_H - High side half bridge drive r output PB2 ADC5 V_BUS - 400VDC bus voltage sense for regulat ion. PB3 AMP0- GND - Diff amp - A/D, 1 ohm bus current shu nt resistor PB4 AMP0+ I_LAMP - Diff amp + A/D PB5 ADC6 TEMPERATURE - Ambient temperature in lamp ho using PB6 ADC7 SWITCH_CTRL - SWITCH Control input PB7 ADC4 V_HAVERSINE - Haversine input sense. PE0 RST# RESET - Reset pin for zero crossing detector PE1 PE1 XTAL1 PE2 ADC0 XTAL2

ATAVRFBKIT / EVLB001 User Guide 4-7 7597B–AVR–10/07 Section 4 Ballast Demonstrator Operation

4.1 General

• Constant power as determined by DALI or Switch Cont rol 400 volt DC bus as provided by a power factor correcting boost regulator (PFC) 100% to 2% dimming setting
• One or two lamps, type T8 of 18W Ballast to compensate automatically Hardware is capable of up to 40W per lamp Line voltage of 90 to 265 VAC, 50 or 60 Hz
• Control method DALI power control – auto recognition of control me ans One touch “Switch” dimming100% ON after ignition th en dim to the last or current programmed value, if any. 4.2 Startup features Software based features that are not fully implemented. End users are invited to develop features based on the following characteristics.
• Auto re-strike -Missing lamp detection allows a default power of 1 00% on the remaining lamp with no dimming. -Open filament detection for one or two lamps as de termined by combination of 400VDC current plus lamp voltage prior to ignition. -On board physical jumper to set for one or two lamp normal operation. Shorted filament -Detection by voltage sense across lamp during preh eat. 400VDC current monitor detects over current limit upon startup. The microc ontroller will sense the expected DC current to the half bridge and resonant circuit relative to the drive frequency.

Ballast Demonstrator Operation ATAVRFBKIT / EVLB001 User Guide 4-8 7597B–AVR–10/07 4.3 Circuit Topology Input filter with varistor for noise suppression and protection. PFC / boost circuit including IXI859 MOSFET driver AT90PWM2B/216 microcontroller 24 pin SOIC half bridge driver half bridge power MOSFET stage for up to 2 lamps Voltage driven filaments for wider lamp variety and better stability under all conditions 400VDC bus voltage after the PFC boost

4.4 Startup and PFC

Description Upon application of main power, the microcontroller does not drive the PFC MOSFET Q3. The C9 capacitor is charged to the peak line voltage. The depletion FET Q1 and the Zener Diode provide a DC voltage with enough current to supply the control portion of the ballast. As soon as the microcontroller requests the ballast to start, the PFC is enabled accord- ing to the following sequence. The microcontroller checks that the DC bus voltage is 90% of the haversine peak and the under voltage lockout (UVLO) requirements are m et, then a series of fixed width soft-start pulses are sent to the PFC MOSFET (Q3) a t 10 µS at a 20 kHz rate. At very low load currents the bus voltage should rise to 40 0V. If the bus rises to 415 VDC all PFC pulses stop. As the 400V drops, the zero crossi ng detector PD7 starts to sense a zero crossing from the PFC transformer secondary. A 400V DC bus and a zero crossing event start the PFC control loop. Checks are made to detect the presence of the rectified power (haversine) and bus volt- age throughout normal operation. Main supply voltag e senses at PB7 < 0.848 (90 VAC) or > 2.497 (265 VAC) peak faults the PFC to off, tu rns off the PFC MOSFET (Q3) and initiates a restart. The control consists of measuring the error between VBUS and 400V (2.39V at PB2) to determine the PFC drive pulse width (PW). The PW is proportional to the error, and has to be constant over a complete half period. The upd ate is done each time the haversine reaches zero. PFC DRIVING Main Supply Voltage Ipeak = Vin x Ton / L Imean = Ipeak/2 Ion Ioff Actual switching frequency is higher than shown

Ballast Demonstrator Operation 4-9 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 The maximum current the PFC MOSFET (Q3) can sustain is 4.5A. The relation between PW and the peak current in PFC MOSFET (Q3) is: PW = t = L x Ipk / Vhaversine_max With L at 700µH and Ipk at 4.5A, PWmax = 8.5µS at h igh line (265 Vrms). With L at 700µH and Ipk at 4.5A, PWmax = 24.7µS at high line (90 Vrms). This also effectively limits the FET dissipation un der upset conditions. Under normal operation, a pulse width maximum of 25µS is allowed for a maximum bus voltage error with the high line limitation. Regulation of 1% of the VBUS is achieved with this control scheme. After the PFC FET ON pulse, the PFC inductor flybac k boosts the voltage through the PFC diode to the bulk filter capacitor. The boost c urrent decays as measured by the inductor secondary. After the current goes to zero, the next pulse is started. This ensures operation in a critical conduction boost mo de. The current zero crossing detec- tion of PD7 sets the PFC off time. This off time is effectively proportional to the haversine amplitude with the lowest PFC frequency occurring at the haversine crest and the highest frequency at the haversine zero. Becaus e of the haversine voltage and di=v*dt/L, the mains current envelope should follow the voltage for near unity power fac- tor. This assumes a nearly constant error (di) of the DC bus over each haversine period. The PFC ON time is modified proportionally to the e rror between 400V and the actual value of the bus. In case the Vbus reaches the over shoot value of 415V the pulse is reduced to 0. This control loop will determine the regulation res ponse to ripple current on the 400V bulk filter cap and the loads for a specific application design requirements.

4.4.1 System Sequential

Step Description Main voltage applied. Undervoltage lockout (UVLO) released. IXI859 voltage regulator supplies 3.3V to microcontroller. Power microcontroller ON in low current standby mode. Disable half bridge drive output PB0 & PB1 Disable PD5 comparator (Not implemented). PB7, scaled haversine voltage must be >0.848 Vmin ( 90VAC) & <2.497 (265VAC) Vmax (haversine peak) for the PFC to start. PD0 soft start PFC with 10µS pulses at 50µS period for 800µS. Monitor comparator at PD7 for change 1 to 0 indicat ing a zero crossing of the PFC inductor secondary voltage. This occurs after the 10µS start pulse burst. If no PD7 change and after 800µS halt PD0, wait 1 s econd and provide again PD0 with 10µS pulses for 800µS. Try 10 times and if no cross ing, set PFC alarm. After PD7 comparator transition and 400VDC (2.368V at PB2), enable PFC control loop. -Adjust PB2 (400VDC sense) setpoint to 2.368V with deadband. -If PB2 > 2.50V then inhibit PD0 pulse. -If PB2 = < 2.368V then use the control loop to establish the PD0 PFC pulse width.

Ballast Demonstrator Operation ATAVRFBKIT / EVLB001 User Guide 4-10 7597B–AVR–10/07 Limit pulse width to 25uS or as determined by the haversine peak voltage. The adjustment of the PFC T ON and T OFF is down as follows: - The T OFF is automatically adjusted by hardware at each PFC inductor current zero crossing detection, - The T ON is adjusted by software accordingly to the Vout me asurement each time the main supply voltage reach zero (Each half period of the main voltage supply)..

4.5 Lamp Operation

T4 primary and C11 form a serial resonant circuit driven by the output half bridge. Since the output is between 400V and 0V, DC isolation is provided by C14 to drive the lamp circuit with AC. The lamp is conected in parallel o f the resonating capacitor C11 (But there is no current through the lamp). The lamp fil aments are driven by windings on T1 secondaries to about 3Vrms so that the resonating inductor current provides the starting lamp filament current. Initially, the system is set up at 80KHz, a frequency well above resonance the frequency then ramps down to 55 kHz for ignition. 80 kHz prov ides a lagging power factor where most of the drive voltage appears across the inductor. A smaller voltage appears across the resonating capacitor C11 and the lamps. However with 1 mH gapped inductance, there is sufficient inductor current to heat the filaments. For lamp ignition, the frequency is decreased from 80 kHz to 40 kHz with 30 kHz/sec slope towards resonance causing the lamp voltage to rise to about 340V peak. Ignition occurs at about 40 kHz for a 18W T8 lamp. The plasma established in the lamp presents a resistive load across the resonating capacitor th ereby reducing the voltage across the capacitor and shifting the reactive power in the br idge circuit to resistive power in the lamp. A further reduction in frequency to 32 kHz at 30 kH z/sec establishes maximum bright- ness as the resonant circuit now has a leading (cap acitive) power factor causing more voltage and current (approx. 360 Vpeak) across the capacitor and the lamp. Dimming is accomplished by raising the drive freque ncy towards 100 kHz. The lower lamp (capacitor) voltage caused by changing from a leading to a lagging (inductive) power factor and the resulting drop in lamp current causes lamp dimming. The visual perception of brightness is logarithmic with applie d power and must be taken into account in the control method scheme.

4.5.1 Single Lamp

Not implemented. Single lamp operation can be detected from the 400V DC bus current through a 1 ohm sense resistor sensed by the differential input PB3/PB4. The AT90PWM2B/216 differen- tial amplifier has the gain preset in the source code at 10. This scales the 200mV for two lamps to a reasonable A/D resolution. PB4 requires low pass filtering. Through the 1 ohm sense resistor R28, V = I*R = 80 Watts*1/400V = 200mA*1 = 200mV. At preheat, the current for one lamp is half of that for two la mps. This current is also used to sense open filament condition or lamp removed under power condition. An abrupt change in

Ballast Demonstrator Operation 4-11 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 the bus current is a good indicator of lamp conditi on that does not require a high fre- quency response or a minimal response due to reactive currents. Once the single lamp condition is detected, the minimum run frequency is determined by lamp current PB4 < 100mV. If the single lamp condit ion occurs while running, as noted by a decrease in current of more than 20% from the preset level, increase the frequency until the PB4 = 90mV. If the PB4 increases to 120mV , assume the lamp has been replaced by a new one. Increase the frequency to 80 kHz to restart the ignition process. This is necessary to preheat the new lamp filament to ensure that the hot lamp will not ignite sooner than the cold lamp, exceeding the bal ance transformer range. Start the ignition sequence. With one cold lamp in parallel with one hot lamp, it may be necessary to restart several times to get both lamps to ignite. Note that the lamp and resonant circuit use a commo n return ground separate from the rest of the circuit. The ballast demonstrator uses active power feedback of the sense voltage versus drive frequency to meet power object ives. Also note that the differential amplifier is connected across the current sense res istor R28 to ensure a Kelvin connec- tion. Layout of the amplifier + and – is critical f or fast noise free loop response.

4.5.2 Lamp Sequential

Step Description After PB2 (boost voltage at 400V) >= 2.400V (acros R42) start preheat Enable PD6 rectified lamp voltage sense Enable PB0 and PB1 half bridge drive output PB0 & PB1 12.5µS total period (80 kHz) 50% duty 180 ° out of phase. Check PB4 > 20mV, then 2 lamps. If PB4 < 20mV, assume a single lamp. If PB4 < 10mV, assume an empty fixture = fault & shutdown. Determine the lamp intensity control method: DALI (presence of data stream at PD4), or Switch (presence of 50/60 Hz modulated at PB6).

4.5.3 Start and Ignition

Description Sweep PB0 and PB1 frequency down at 30 kHz/sec or 33µS/sec rate. Stop sweep at 40 kHz or 25µS period (12.5µS pulses for each half bridge FET) Check PB4 > 100mV (2 lamps) or > 30mV (1 lamp) for proof of ignition. Hold ignition frequency for 10mS. If no PD6 voltage, collapse to < 200mV for proof of ignition, increase frequency to 77 kHz for preheat for 1 second. Repeat ignition sequence 6 times then if fails, set DALI fail flag or shut down. Disable if dimmed frequency > 60 kHz. Disable if single lamp. Proceed to power setting command at 30 kHz/sec rate as established by external con- trol or if no internal control proceed to PB4 195mV at input terminals before gain (about 32 kHz) for 100% power. If Switch control, proceed to max power. A continuo us pressing of this switch will cause a progressive increase of frequency at 33 kHz per s econd. The exception for a single lamp will be minimum frequency for 97mV (39 watts) at PB4 for 100% brightness. This is the default power for a single lamp with no dimming.

Ballast Demonstrator Operation ATAVRFBKIT / EVLB001 User Guide 4-12 7597B–AVR–10/07

4.5.4 Power Control

Calculate input power for both lamps = PB4 (lamp cu rrent) * (lamp voltage). Use this data for DALI feedback verification if required. Se t programmable gain of AMP0 to 10. 78 watts will be 0.195 VDC at the input of AMP0+ or 1.95V internal A/D input. Adjust frequency up (lower power) or down (higher p ower) at 30KHz/sec rate. Limit fre- quency to 100% (PB4 = 0.195V and 32KHz) to 80KHz di mming range. The dimming must be logarithmic for the best resolution. The la rgest lumen change will be at the low- est power setting. A small high frequency change 70 to 80kHz will give a large perceived dimmed range. If PB4 > 0.220V for two lamps or > 0.110V for one lamp, set half bridge drive off to avoid an over current. Start re-ignition sequence. Repeat 6 times and if still out of the limit, set TX DALI fail signal & shutdown PFC and half bridge drive.

ATAVRFBKIT / EVLB001 User Guide 5-13 7597B–AVR–10/07 Section 5 Device Design & Application

5.1 Magnetics PFC – Power Factor Correction

Without going into the derivations of the formulae used, the inductor design is as follows: L = 1.4 * 90VAC * 25 µS = 700 µH 4.5A peak The ON time has been discussed earlier and the OFF time maximum will occur at high line condition at the peak of the haversine. A 16mm core was chosen for the recom- mended power density at 200mT and 50 kHz.

5.2 IXYS

The IXYS IXTP02N50D depletion mode MOSFET is used in this circuit to provide power and a start-up voltage to the Vcc pin of the IXI859 charge pump regulator. The IXTP02N50D acts as a current source and self regula tes as the source voltage rises above the 15V zener voltage and causes the gate to become more negative than the source due to the voltage drop across the source re sistor (R2). Enough energy is avail- able from the current source circuit during the conduction angles to keep the IXI859 (U1) pin 1 greater than 14VDC as required to enable the Under Voltage Lock Out (UVLO) cir- cuitry in the IXI859.

5.3 IXYS IXD611

The IXD611 half bridge driver includes two independ ent high speed drivers capable of 600mA drive current at a supply voltage of 15V. The isolated high side driver can with- stand up to 650V on its output while maintaining it s supply voltage through a bootstrap diode configuration. In this ballast application, t he IXD611 is used in a half bridge inverter circuit driving two IXYS IXTP3N50P power M OSFETs. The inverter load con- sists of a series resonant inductor and capacitor t o power the lamps. Filament power is also provided by the load circuit and is wound on t he same core as the resonant induc- tor. Pulse width modulation (PWM) is not used in th is application, instead the power is varied and the dimming of the lamps is controlled t hrough frequency variation. It is important to note that pulse overlap, which could lead to the destruction of the two MOS- FETs due to current shoot through, is prevented via the input drive signals through the microcontroller(500nS deadtimes).

Device Design & Application ATAVRFBKIT / EVLB001 User Guide 5-14 7597B–AVR–10/07 Other features of the IXD611 driver include: Wide supply voltage operation 10-35V Matched propagation delay for both drivers Undervoltage lockout protection Latch up protected over entire operating range +/- 50V/ns dV/dt immunity

5.4 IXYS IXI859

The IXI859 charge pump regulator integrates three p rimary functions central to the PFC stage of the ballast demonstrator. First it include s a linear regulated supply voltage out- put, and in this application the linear regulator p rovides 3.3V to run the microcontroller. The second function is a gate drive buffer that swi tches an external power MOSFET used to boost the PFC voltage to 400V. Once the mic rocontroller is booted up and run- ning, it generates the input signal to drive the PF C MOSFET through the IXI859 gate drive buffer. Finally, the third function provides two point regulated supply voltage for operating external devices. As a safety feature, th e IXI859 includes an internal Vcc clamp to prevent damage to itself due to over-voltage conditions. In general applications at start-up, an R-C combina tion is employed at the Vcc supply pin that ramps up a trickle voltage to the Vcc pin from a high voltage offline source. The value of R is large to protect the internal zener diode clamp and as a result, cannot sup- ply enough current to power the microcontroller on it’s own. C provides energy to boot the microcontroller. At a certain voltage level dur ing the ramp up, the Under Voltage Lock Out point is reached and the IXI859 enables it self. The internal voltage regulator that supplies the microcontroller is also activated during this time. However, given the trickle charge nature of the Vcc input voltage, the microcontroller must boot itself up and enable PFC operation to provide charge pump power t o itself. This means that the R-C combination must be sized carefully so that the vol tage present at the Vcc pin does not collapse too quickly under load and causes the UVLO circuitry to disable device opera- tion before the microcontroller can take over the charge pump operation. Also note that there is an internal comparator that only releases charge pump operation when the Vcc voltage drop below 12.85V. The charge pump is released and Vcc voltage is pumped up to 13.15V at which time the internal comparator dis ables the charge pump. This results in a tightly regulated charge pump voltage. One problem with the R-C combination described abov e is that when a universal range is used at the Vcc pin, 90-265VAC, R must dissipate nine times the power, current squared function for power in R, over a three-fold increase of voltage from 90V at the low end to 265V on the high end. As an alternative and as used in the ballast demon- strator, the Vcc pin is fed voltage by way of a con stant current source as previously described in Section 5.2. This circuit brings sever al advantages over the regular R-C usage. First we can reduce power consumed previously by R and replace it with a circuit that can provide power at startup. It can also prov ide sufficient power to run the micro- controller unlike the R-C combination. This would b e an advantage in the case that a standby mode is desired. Overall power consumption can be reduced by allowing the microcontroller to enter a low power mode and shut down PFC operation without having to reboot the microcontroller. Since the R-C combin ation cannot provide enough power to sustain microcontroller operation, the microcont roller must stay active running the PFC section to power itself.

Device Design & Application 5-15 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07

5.5 IXYS IXTP3N50P

The IXTP3N50P is a 3A 500V general purpose power MO SFET that comes from the family of IXYS PolarHV MOSFETs. When comparing equi valent die sizes, PolarHT results in 50% lower RDS(ON), 40% lower RTHJC (ther mal resistance, junction to case), and 30% lower Qg (gate charge) enabling a 30% - 40% die shrink, with the same or better performance versus the 1st generation power MOSFETs. Within the ballast demonstrator itself the IXTP3N50 serves two functions. The first of which is the power switching pair of devices in the half-bridge circuit that drives the lamps. While a third device serves in the main PFC circuit as the power switch that drives the PFC inductor.

5.6 Clare LDA111S

Clare's family of single and dual optocoupler provi de an optically isolated means of switching control circuits. The LDA111S contains on e phototransistor that is optically coupled to an LED. Shunt resistors can be used to a djust the threshold currents required to activate the output circuitry. While bo th AC and DC input versions are avail- able, the LDA111S is a DC input only model and feat ures a 100mA continuous load rating, 3750V RMS input to output isolation, and a 1000% current tra nsfer ratio. The LDA111S role is to isolate control signals within the ballast design.

ATAVRFBKIT / EVLB001 User Guide 6-16 7597B–AVR–10/07 Section 6 ATPWMX Demonstrator Software This section of the application note describes the software architecture utilizing the fol- lowing source code files and related state machines: /square6Main_fbkit.c Initialisation of peripherals (Ports, ADC, timer...). Clock pfc and lamp task each 200uS and let control task operating during free time. /square6Pfc_fbkit.c PFC State Machine: executed each mS at low speed ( 1MHZ when the microller has not yet been speeded up), and each 200uS at nominal speed (8MHz). /square6Lamp_fbkit.c Lamp State Machine: executed each 200uS. /square6Control_fbkit.c Control State Machine: executed during CPU free time. Associated header files:

• Main_fbkit.h
• Pfc_fbkit.h
• Lamp_fbkit.h
• Control_fbkit.h The software uses the following peripherals:
• TIMER0, ADC, amplifier, Comparator0, PSC0, PSC2, P LL, DALI via EUSART The application has been designed to work either with the AT90PWM2B/216 or 3B.

ATPWMX Demonstrator Software 6-17 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 In order for the ballast to operate, three primary control systems should run simulta- neously. One for the PFC control, one for the Lamp control, and one for the Command control of the ballast. Since the software jitter was producing visible fli ckering, there is no more ADC state machine. Each analog conversion is done just before being used for control loops. The complete software package for the application i s split into the functional blocks in the diagram shown below. While the variables are identified as follows. g_ global gv_ global volatile gs_ global static Voltage and current variables are identified by the following examples. g_v or g_i global - voltage/current gv_v or gv_i global volatile - voltage/current gs_v or gs_i global static - voltage/current Figure 6-1. Demo Software Architecture V_HAVERSINE V_BUS PFC_ZCD DALI_RX DALI_TX SWITCH_CTRL Analog comparator DALI PFC_OUTPUT INVERTER_HIGH INVERTER_LOW PFC CTRL LAMP CTRL COMMAND CTRL gv_v_haversine gv_v_bus gv_lamp_state gv_lamp_preset _current gv_pfc_state gv_lamp_on I_LAMP V_LAMP gv_i_lamp gv_v_lamp DUAL_LAMP LAMP_EOL TEMPERATURE Not software implemented Not software implemented Not software implemented

ATPWMX Demonstrator Software ATAVRFBKIT / EVLB001 User Guide 6-18 7597B–AVR–10/07

6.1 Main_pwmx_fluo_de

mo.c This file executes all the peripheral initializatio n and then schedules the different control tasks. The ADC and the Command control state machines are also included in this file. The ADC machine is controlled via interrupts.

6.1.1 COMMAND

The Command Control state machine centralizes the S WITCH and DALI controls in order to switch PFC operation On or Off and to set the lamp control instructions given by the user. The Command Control state machine functional diagram is shown below: Figure 6-2. Control State Machine The different states are outlined below: WAIT_FOR_FIRST_COMMAND The three control means are scanned and the first c ommand caught sets the state machine acco rd ing to the comm and received . (SWITCH_ C ONTROL or DALI_CONTROL). SWITCH_CONTROL Read the input pin. Analyze the touch dim command. Set the control variable values corresponding to the user request. DALI_CONTROL Read the DALI Command. Answer the request or set the control variable valu es corresponding to the DALI command. WAIT_FOR_FIRST_COMMAND gs_nbr_read_switch_shot_zero >= MIN_SHORT_TOUCH_SET is_dali_running() == 1 SWITCH_CONTROL update gv_pfc_state and gv_lamp_state depending on gv_lamp_preset_current DALI_CONTROL update gv_pfc_state and gv_lamp_state depending on gv_lamp_preset_current

ATPWMX Demonstrator Software 6-19 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07

6.1.2 Control state

6.1.2.1 Input variables

• gv_lamp_on is necessary to determine whether the lamp is already on or not.
• g_too_many_ignition_tries can be set in lamp state machine.

6.1.2.2 Output variables

• gv_lamp preset current is set to the wanted value and depending on the gv_lamp_on and g_too_many_ignition_tries values, gv_lamp_state , gv_pfc_state and gv_lamp_on can be set to the following values LAMP_OFF, SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED, and 0 or 1. 6.2 Pfc_ctrl.c This file executes the PFC state machine according to the scheduler in the Main_pwmx_fluo_demo.c file.

6.2.1 PFC STATE

The PFC state machine functional diagram is shown in Figure 6-3. Figure 6-3. PFC State Machine The different states are outlined below: PFC_OFF Nothing happens, the exit from this state is requested when the gv_lamp_preset_current variable is modified in control_FBKIT.c file. INIT_PFC Nothing happens, the state machine automatically goes to next step (INIT_PFC_HAVERSINE_CHECK) on the next pfc_task(). INIT_PFC_HAVERSINE_CHECK Initialize the control values of the PFC. Then jump to the HAVERSINE_CHECK state. HAVERSINE_MEASURE Measure the haversine peak voltage during HAVERSINE_MIN_CHECK_TIME. Then jump to the HAVERSINE_CHECK state.

ATPWMX Demonstrator Software ATAVRFBKIT / EVLB001 User Guide 6-20 7597B–AVR–10/07 HAVERSINE_CHECK PFC haversine peak must be between HAVERSINE_PEAK_M IN and HAVERSINE_ PEAK_MAX (90VAC and 265VAC). If the haversine value is OK, set the max pulse wid th allowed and jump to the CON- FIGURE_PFC_SOFT_START state. Else go back to INIT_PFC_HAVERSINE_CHECK state. CONFIGURE_PFC_SOFT_START Configures the peripherals PSC0 and comparator0 to soft start the PFC. INIT_PFC_HAVERSINE_CHECK PFC_CONTROL_LOOP PFC_DELAY_FOR_NEXT_SOFT_START PFC_FIND_ZCD SPEED_UP_MICROCONTROLLER PFC_SOFT_START CONFIGURE_PFC_SOFT_START HAVERSINE_MEASURE HAVERSINE_CHECK g_pfc_time_since_previous_timer_reset <= HAVERSINE_MIN_CHECK_TIME HAVERSINE_PEAK_MIN <= gs_v_haversine_peak <= HAVERSINE_PEAK_MAX (0.95 * gs_v_haversine_peak) <= gv_v_bus <= V_BUS_SET_POINT gs_pfc_soft_start_tries <= PFC_START_MAX_TRIESPFC_PROBLEM gvs_zcd_occures Get_v_bus() <= V_BUS_OVERSHOOT SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED PFC_OFF gv_lamp_preset_current == 0 during control_task in control_FBKIT.c INIT_PFC gvs_zcd_occures == 1 gv_lamp_preset_current != 0 during control_task in control_FBKIT.c

ATPWMX Demonstrator Software 6-21 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 Then jump to START_PFC_SOFT_START. START_PFC_SOFT_START Check that the soft start has been tried less than PFC_START_MAX_TRIES If OK then start PSC0 and jump to PFC_SOFT_START st ate. Else immediately jump to the PFC_PROBLEM state. PFC_SOFT_START Check that the PFC has been tried to be set less times than PFC_START_MAX_TRIES. According to this test, SPEED_UP_MICROCONTROLLER or jump to PFC_PROBLEM. SPEED_UP_MICROCONTROLLER In case a zero crossing detection happens, the PFC is switched on. The power will then be sufficient so that the microcontroller can be sp eeded up to its nominal speed, then it is necessary to find the zero crossing detection in the PFC_FIND_ZCD. In case no zero crossing detection happens, a next try will be operate in PFC_DELAY_FOR_NEXT_SOFT_START. PFC_DELAY_FOR_NEXT_SOFT_START In case the soft start fails, the software has to w ait DELAY_FOR_NEXT_PFC_SOFT_ START*DELAY_MULTIPLIER_FOR_NEXT_PFC_SOFT_START, bef ore trying a new soft start by going back to the CONFIGURE_PFC_SOFT_START state. PFC_FIND_ZCD Find the Zero Crossing Detection in order to start the PFC_CONTROL_LOOP on a zero crossing. SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED Switch off the PFC. Switch the microcontroller to a low power consumption mode. Then go back to PFC_OFF state.

ATPWMX Demonstrator Software ATAVRFBKIT / EVLB001 User Guide 6-22 7597B–AVR–10/07

6.2.2 PFC State Machine

6.2.2.1 Input variables

gv_lamp_preset_current which is modified in control_FBKIT.c file makes the PFC state machine changing from PFC_OFF to INIT_PFC when the user request to switch the lamp on.

• gv_pfc_state is set to SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED sta te on the control_FBKIT.c file when the user request to switch the lamp off.

6.2.2.2 Output variables

• None. 6.3 Lamp_ctrl.c This file executes the Lamp state machine according to the scheduler in the Main_pwmx _fluo_demo.c file.

6.3.1 Lamp State Machine The different states are outlined below:

Figure 6-4. Lamp State Machine LAMP_OFF Nothing happens, the exiting of this state takes place as soon as the gv_pfc_state is set to PFC_CONTROL_LOOP. CONFIGURE_LAMP_PREHEAT START_IGNITION LAMP_PREHEAT g_lamp_time_multiplier >= LAMP_PREHEAT_TIME_MULTIPLIER LAMP_OFF gv_pfc_state == PFC_CONTROL_LOOP gv_lamp_preset_current == 0 during control_task in control_FBKIT.c g_inverter_comparison_values.ontime1 < INVERTER_XXX_LAMP_IGNITION_HALF_PERIOD IGNITION Get_v_lamp() < IGNITION_MAXIMUM_IGNITION_VOLTAGE RESTART_PREHEAT gs_lamp_ignition_tries < LAMP_IGNITION_MAX_TRIES START_RUN_MODE g_inverter_comparison_values.ontime1 >= INVERTER_RUN_HALF_PERIOD RUN_MODE TOO_MANY_LAMP_IGNITION_TRIES gv_lamp_preset_current == 0 during control_task in control_FBKIT.c

ATPWMX Demonstrator Software 6-23 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 CONFIGURE_LAMP_PREHEAT This is the first time the lamp is attempted to be started once the user has requested to switch it on. Configure the amplifier0, which is used to measure the current, then configure the PSC2 according to the definitions in the config.h file, and initialize all the lamp control variables. Then jump to the LAMP_PREHEAT state. LAMP_PREHEAT Starts the preheat sequence for LAMP_PREHEAT_TIME. (PWM set up at 80KHz) Then jump to the START_IGNITION state. START_IGNITION Decrease the frequency from the init frequency down to INVERTER_IGNITION_HALF_ PERIOD. Then jump to the IGNITION state. IGNITION The ignition sequence consists of maintaining the i gnition frequency determined by INVERTER_IGNITION_HALF_PERIOD for 10ms, and then ch ecking if ignition occurs by measuring lamp current and voltage. In case it has... START_RUN_MODE. In case it hasn’t... RESTART_PREHEAT. RESTART_PREHEAT Reconfigure the Inverter with the Restart parameters, then go to LAMP_PREHEAT. If Ignition fails too many times... Go to TOO_MANY_LAMP_IGNITION_TRIES. START_RUN_MODE Increase the frequency from the init frequency, INVERTER_IGNITION_HALF_PERIOD. Then jump to the RUN_MODE state. RUN_MODE Normal control loop to have the light in accordance with the gv_lamp_preset_current variable that is permanently updated in the command control state machine in the Main_pwmx_fluo_demo.c file. The transition from the RUN_MODE state to the LAMP_OFF state is done in the control state machine (control_FBKIT.c file) when the gv_lamp_preset_current variable is set to

ATPWMX Demonstrator Software ATAVRFBKIT / EVLB001 User Guide 6-24 7597B–AVR–10/07 TOO_MANY_LAMP_IGNITION_TRIES If the ignition has failed LAMP_IGNITION_MAX_TRIES, g_too_many_ignition_tries vari- able will be set, and the lamp will be switched off thanks to control_FBKIT.c file which will switch off the ballast.

6.3.2 Lamp state machine

6.3.2.1 Input variables

The transition from LAMP_OFF to CONFIGURE_LAMP_PREH EAT is done when the gv_pfc_state is set to PFC_CONTROL_LOOP in PFC_FBKIT.c file.

• The transition from the RUN_MODE state to the LAMP _OFF state is done in the Control state machine in the case gv_lamp_preset_current is equal to 0.

6.3.2.2 Output variables

g_too_many_ignition_tries == 1 makes the ballast switch off in the control state machine in control_FBKIT.c file.

ATAVRFBKIT / EVLB001 User Guide 7-25 7597B–AVR–10/07 Section 7 Conclusion The ballast demonstrator shows that the AT90PWM2B/2 16 microcontroller can control and regulate fluorescent lamps from any of the two (DALI and switch) methods of dim- ming. It can automatically sense the control method used thereby providing lamp controller manufacturers with maximum flexibility in their design. One or more lamps can be controlled with flexibility and precision. Universal input and power factor control adds to the flexibility of the design with a minimal add ition of more expensive active components. Additionally, the programmability of the microcontroller offers the lamp manufacturer the flexibility to add more design features than are sh own here to enhance their market position. The ballast demonstrator, although it has many features, does not address all the possibilities available to the lamp controller designer.

7.1 Appendix 1:

The switch DIM allows dimming control using a simpl e switch connected to the mains phase. Switch DIM operation The Switch DIM operation is as follows: With the lamp switched on: A short push switches the luminary off and stores the current light level. A long push gradually dims the light level. (Change direction by briefly taking your finger off the button and pressing down again). With the lamp switched off: A short push switches the lamp on to the last light level used. (Optional: Use a soft start from minimum level to last level used). A longer push starts on the last light level used and gradually raises the light level to the required brightness. The lamps are dimmed for as long as the switch is pressed or until the minimum or max- imum dimmer setting is reached .

ATAVRFBKIT / EVLB001 User Guide 7-26 7597B–AVR–10/07

7.2 Appendix 2:

Small currents for the low voltage supply can be ob tained from the AC line at low loss by means of capacitor coupling as shown in the figures below. To esti- mate the required size of the coupling capacitor, u se the following relationships for current, charge, voltage and capacitance . 1.dQ/dt = I DC Figure 7-1. Negative Line Half Cycle Figure 7-2. Positive Line Half Cycle 1.dV = 2Vpk-Vo-2V D 2.dQ = CdV or C = dQ/dV For example, to obtain 15 mA at 20 VDC from a 220 Vrms 50 Hz line: 1.dQ/dt = (15 millijoules/sec)/(50 cycles/sec) or 0 .3 millijoules / cycle. 2.Over 1 cycle, the coupling capacitor (C1) will ch arge from –220V x 1.4 to +220V x 1.4 – 20V- V D. dV = 2*Vpk-Vo-2V D. dV ~= 600V. 3. The required C1 ~ 0.3 millijoules/600V or 0.5 uF AC VD VD “Negative” line half -cycle: C1 charges to Vpk - V D with polarity shown. Vo Ich1 IDC -VPK - VC1 + AC VD VD “Positive” line half-cycle: C1 charges to Vpk - V D - Vo with polarity shown. Vo Ich2 IDC +VPK + VC1 -

7-27 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 In practice, C1 may have to be larger depending on the amount of ripple allowed by C2 and to account for component tolerances, minimum voltage, and current in the regulator diode. C1 must be a non-polarized type with a volta ge rating to withstand the peak line voltage including transients. A high quality film capacitor is recommended.

7.3 Appendix 3: PFC

The function of the PFC boost regulator is to produ ce a regulated DC supply voltage from a full wave rectified AC line voltage while ma intaining a unity power factor load. This means that the current drawn from the line mus t be sinusoidal and in phase with the line voltage. The ballast PFC circuit accomplishes this by means of a boost converter operating (See Figure 7-3) at critical conduction so that the curr ent waveform is triangular (See Figure 7-4). Figure 7-3. PFC Boost Regulator The boost switch ON time is maintained constant ove r each half cycle of the input volt- age sinusoid. Therefore the peak current for each s witching cycle is proportional to the line voltage which is nearly constant during Ton. ( Ipeak = Vin x Ton/L). Since the aver- age value of a triangular waveform is half its peak value, the average current drawn is also proportional to the line voltage. Figure 7-4. Main voltage supply cutting PFC Inductor PFC BOOST REGULATOR POWER VOLTAGE Vin Vbus Ion = (Vin x t )/ L Ioff PFC Switch PFC DRIVING Main Supply Voltage Ipeak = Vin x Ton / L Imean = Ipeak/2 Ion Ioff Actual switching frequency is higher than shown

ATAVRFBKIT / EVLB001 User Guide 7-28 7597B–AVR–10/07

7.4 Appendix 4: Bill

Figure 7-5. Bill of Materials 1

7-29 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07 Figure 7-6. Bill of Materials 2

ATAVRFBKIT / EVLB001 User Guide 7-30 7597B–AVR–10/07 Figure 7-7. Bill of Materials 3

7-31 ATAVRFBKIT / EVLB001 User Guide 7597B–AVR–10/07

7.5 Appendix 5: Schematics

D C B A LAMP VOLT DET. END OF LIFE DC & AC DAC CONTROLLED WINDOW COMP. HAVERSINE TEST RESONANT CAP 400V BUS TEST HIGH FET CURRENT ALARM CURRENT SENSE FOR POWER CALC LAMP MISSING DET. LAMP CURRENT DET. 0.8 V RECT. LAMP VOLTAGE DET. IGNITION, RAMP, MISSING LAMP DET. ANALOG INPUT 1.25 TO 2.75 NORMAL 1.00 TO 3.00 END OF LIFE T8 OVERTEMP DET.

0.264 V @ 80C

1.1V @ 25C 250 uA MAX. OPEN FILAMENTS DETECTED BY 1/2 BRIDGE CURRENT, ONE LAMP JUMPER, & RECT LAMP VOLTAGE. OPTION IN CODE TO ACCEPT ONE LAMP W/DALI FLAG OR FAULT. PRELIMINARY 75-WYO222MCMBF0K DF10SDI-ND PLK1069-ND 75-F17724332000 P7186-ND 75-MKP1840410634 MURS160DICT-ND P5948-ND 22uF@450V PPC62KW-3JCT-ND 62K 3W 505-M100.01/2000/5 NOTES: Swiss Control VBUS TO-220 CLOSE PROXIMITY TP-6 TP-8 TP-7 REMOVE FOR SINGLE LAMP OP. REMOVE FOR SINGLE LAMP OP. CLOSE TO U2

3 AMPS PEAK

Flourescent Lamp Flourescent Lamp SINGLE LAMP OP VOLTAGE DOUBLER BOOSTVSUP BOOSTVSUP BOOSTVSUP PB7ADC4 PD7 ACMP0 PD6 ACD3 PB0 PB1 PD5 ACMP2 PD0 PB5 ADC6 PB4 AMP0+ PB2 ADC5 SWISS VDC 15V VCC VCC 15V VCC VCC VCC VCC VCC VCC VCC VCC NOTE NEW GND NOTE NEW GND NOTE NEW GND NOTE NEW GND NOTE NEW GND D18 LL4148-13 TP4 GND - + BR1 600V R30 460 K IXTP3N50P 1A-600V/FR TP6 GATEDR R20 400K R10 R15 22K T4B TRANSFORMER 2 11S F C11 .01uF 1500V FILM RV1 VARISTOR265VAC MBRS140CT R13 LPFC 10 8 R27 R34 10K TP9 GATELO D26 LL4148-13 1uF R11

200 OHM 3 W

.1uF 600V 15V Zener D16 LL4148-13 C13 .1uF 600V 1 nF 600 V D27 1A-600V/FR R24 400K IXTP02N50D 2 3 C17 5 nF IXTP3N50P 47 uF C19 .001uF T4A TRANSFORMER 1 12S F R22 C10 .02 uF LL4148-13 TP3 15V 18K LL4148-13 R31 200K

100 OHM

1.2K TP8 GATEHI 20K IXTP3N50P 1A-600V/FR 1nF D13 MBRS140CT t RT1 10K @ 25C 1 2 R12 R23 TP7 VCC 250VAC LL4148-13 CM CHOKE R19 50uF 475V C16 5 nF IXI859S1 VSUPVOUT VCC GATE NC IN GND VCAP R73

22 OHM

.1 uF 600V FILM C12 .1uF TP5 GND R26 10uF 25V C21 220nF 100V T4C TRANSFORMER 3 10S F CONNECTOR D12 LL4148-13 R28 1 /1% C46 .022uF R18 100K 1/4W R14 LL4148-13 C22 220nF 100V R33 1.8 K C20 220nF 100V C15 .1uF R32 200K IXD611S1 HOHIN VCC LO LIN COM VS VB FL1 CONNECTOR

ATAVRFBKIT / EVLB001 User Guide 7-32 7597B–AVR–10/07 D D C C B B A A DALI must recognize the difference in pulse rate between the DALI input, the VCO output range and the much longer Swiss control. PRELIMINARY BZX84C5V6SDICT-ND BC857BLT1OSCT-ND RH02DICT-ND 1. DALI 2. DALI HAVERSINE 400 V DET. CURRENT SENSE PFC ZERO

400 V DETECT

THROW AWAY JUMPER FOR DUAL LAMP SPARE IF CODE RECOGNIZES SINGLE LAMP PSCIN0 LOCATE IN CENTER OF BOARD RX TX C-2346-2 2 2Friday, May 25, 2007 WL Williamson & ASSOC Ballast Control Title Size Document Number Rev Date: Sheet of PD4 PD4 PD4 PD3 PD3 PE1(SWISS) PE1(SWISS) PD0 PB0 PB1 PB7ADC4 PD5 ACMP2 PD6 ACD3 PB5 ADC6 PB2 ADC5 PB4 AMP0+ SWISS PD7 ACMP0 VCC VCC VCC VCC VCC VCC + C29 10uF 25V R38 2.2K R50 100 C26 .1uF 8MHz - + BR2 0.5A 200V R40 10K C48 .01uF R47 10R HEADER6PIN PDO VCC SCK PDI RESET* GND JP3 JUMPER 1 2 C27 .1uF R42 100 K C24 .1uF CON4 BC846BCT C32 .1uF R45 100 K R43 4.7K R71 10K R68 4.7K CON2 BC846BCT C28 1nF TP1 TESTPT R49 470 AT90PWM2 12 13 24PDO (PSCOUT00/XCK/SS_A) PEO (RESET/OCD) PD1 (PSCIN0/CLK) PD2 (PSCIN2/OC1A/MISO_A) PD3 (TXD/DALI/OC0A/MOSI_A) VCC GND PBO (PSCOUT20) PB1 (PSCOUT21) PE1 (OC0B/XTAL1) PE2 (ADC0/XTAL2) PD4 (ADC1/RXD/DALI/CP1A/SCL_A) (ADC2/ACMP2) PD5 (ADC3/ACMPM/INT0) PD6 (ACMP0) PD7 (ADC5/INT1) PB2 AVCC AGND AREF (AMP-) PB3 (AMP0+) PB4 (ADC6/INT2) PB5 (ADC7/ICP1B) PB6 (ADC4/PSCOUT01) PB7 R44 100 K R37 .1uF CON2 R51 10K C23 .1uF D19 LL4148-13 C33 .1uF C31 100PF R46 10K C30 .1uF ISO1 LDA111S 1 2 5 4 R70

0 OHM

Printed on recycled paper. 7597B–AVR–10/07 © Atmel Corporation 2007 . All rights reserved. Atmel ®, logo and combinations thereof, Everywhere You Are ® are the are registered trade- marks or trademarks of Atmel Corporation or its sub sidiaries. IXYS ® logo and combinations thereof, are the are registe red trademarks or trade- marks of Atmel Corporation or its subsidiaries. Oth er terms and product names may be trademarks of oth ers. Disclaimer: The information in this document is provided in co nnection with Atmel products. No license, express o r implied, by estoppel or otherwise, to any intellectual property right is gran ted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCAT ED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVEN T SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUEN TIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCL UDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS I NTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS B EEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the ac curacy or completeness of the contents of this docu ment and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically providedother wise, Atmel products are not suitable for, and shal l not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. Atmel Corporation Atmel Operations

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