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Technical content

Features

W i d e VIN range of 6V to 40V  Adjustable output voltage from 2.5V to 12V  Guaranteed 50mA output current  Ultra low 18µA typical quiescent current  Low 1.8µA of typical shutdown current  ±1% accurate voltage reference  Low dropout voltage of 120mV at 50mA  40V tolerant logic level (TTL/CMOS) enable input  Stable operation with 10µF output capacitor  5kV ESD HBM rated  Thermal shutdown and current limit protection

Applications

 FPGA applications I n d u s t r i a l N e t w o r k i n g  Telecom TABLE 1. KEY DIFFERENCES IN FAMILY OF 40V LDO PARTS FIGURE 1. TYPICAL APPLICATION FIGURE 2. QUIESCENT CURRENT vs LOAD CURRENT (AT UNITY

09618 March 14, 2014 Rev A

EY1602 40V, Low Quiescent Current, 50mA Linear Regulator February 2014 Alte ra Corporation Pin Configuration EY1602SI-ADJ (8 LD EPSOIC) TOP VIEW

Ordering Information

TEMP . RANGE (°C) ENABLE PIN OUTPUT VOLTAGE (V) PACKAGE (Pb-Free) PKG. DWG. # EY1602SI-ADJ (Notes 1) 1602AS -40 to +125 Yes Adjustable 8 Ld EPSOIC M8.15B EVB-EY1602SI-ADJ Evaluation Platform NOTES: 1. Add “-T*” suffix for tape and reel. 2. These Altera Enpirion Pb-free plastic packaged products empl oy special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Altera Enpirion Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION 1 VIN Input voltage pin. A minimum 0.1µF X5R/X7R capacitor is required for proper operation. Range: 6V to 40V 2, 3, 6 NC Pins have internal termin ation and can be left not connected. Connection to ground is optional. 4 EN High on this pin enables the device. Range: 0V to V IN 5 GND Ground pin. 7 VFB This pin is connected to the extern al feedback resistor divider, which sets the LDO output voltage.Range: 0V to 3V 8 VOUT Regulated output voltage. A 10µF X5R/X7R output capacitor is required for stability. Range: 0V to 12V - PAD It is recommended to sold er the PAD to the ground plane. VIN NC NC EN VOUT VFB NC GND PAD (GND)

EY1602 40V, Low Quiescent Current, 50mA Linear RegulatorFebruary 2014 Altera Corporation Absolute Maximum Ratings Thermal Information ESD Rating Charge Device Model (Tested per JESD22-C101C) . . . 2.2kV Thermal Resistance (Typical)  JA (°C/W) JC (°C/W)

8 Ld EPSOIC Package (Notes 3, 4) 50 9

Recommended Operating Conditions CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. NOTES: 3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. 4. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1µF, COUT =1 0 µ F , TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +125°C. PARAMETER SYMBOL TEST CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT Input Voltage Range V IN 64 0 V Guaranteed Output Current IOUT VIN = VOUT + VDO 50 mA VFB Reference Voltage V REF EN = High, VIN = 14V, IOUT = 0.1mA 1.211 1.223 1.235 V Line Regulation VOUT/VIN 3V  VIN  40V, IOUT = 1mA 0.04 0.115 % Load Regulation VOUT/IOUT VIN = VOUT +VD, IOUT = 100µA to 50mA 0.25 0.5 % Dropout Voltage (Note 5) VDO IOUT = 1mA, VOUT = 3.3V 10 38 mV IOUT = 50mA, VOUT = 3.3V 130 340 mV IOUT = 1mA, VOUT = 5V 10 48 mV IOUT = 50mA, VOUT = 5V 120 350 mV Shutdown Current ISHDN EN = LOW 1.8 3.64 µA Quiescent Current IQ EN = HIGH, I OUT = 0mA 18 24 µA EN = HIGH, IOUT = 1mA 22 42 µA EN = HIGH, IOUT = 10mA 34 60 µA EN = HIGH, IOUT = 50mA 56 82 µA Power Supply Rejection Ratio PSR R f = 100Hz; Vin_ripple = 500mV P-P; Load = 50mA 58 dB EN FUNCTION EN Threshold Voltage VEN_H VOUT = Off to On 1.485 V VEN_L VOUT = On to Off 0.935 V EN Pin Current I EN VOUT = 0V 0.026 µA EN to Regulation Time (Note 6) t EN 1.65 1.93 ms PROTECTION FEATURES Output Current Limit ILIMIT VOUT = 0V 60 118 mA

EY1602 40V, Low Quiescent Current, 50mA Linear Regulator February 2014 Alte ra Corporation Thermal Shutdown TSHDN Junction Temperature Rising +165 °C Thermal Shutdown Hysteresis T HYST +20 °C NOTES: 5. Dropout voltage is defined as (V IN - VOUT) when VOUT is 2% below the value of VOUT when VIN = VOUT + 3V . 6. Enable to Regulation is the time the output takes to reach 95% of its final value with V IN = 14V and EN is taken from VIL to VIH in 5ns. The output voltage is set at 5V . 7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1µF, COUT =1 0 µ F , TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT

Typical Performance Curves VIN = 14V, IOUT = 1mA, VOUT = 5V, TJ = +25 °C unless otherwise specified. FIGURE 3. QUIESCENT CURRENT vs LOAD CURRENT FIGURE 4. QUIESCENT CURRENT vs INPUT VOLTAGE (NO LOAD) FIGURE 5. SHUTDOWN CURRENT vs TEMPERATURE (EN = 0) FIGU RE 6. OUTPUT VOLTAGE vs TE MPERATURE (LOAD = 50mA)

FIGURE 7. OUTPUT VOLTAGE vs LOAD CURRENT FIGURE 8. START-UP WAVEFORM FIGURE 9. POWER SUPPLY REJECTION RATIO (LOAD = 50mA) FIGURE 10. LOAD TRANSIENT RESPONSE

EY1602 40V, Low Quiescent Current, 50mA Linear RegulatorFebruary 2014 Altera Corporation Block Diagram REFERENCE SOFT-START CONTROL LOGIC THERMAL SENSOR EA VIN EN GND VOUT FET DRIVER WITH CURRENT LIMIT VFB

EY1602 40V, Low Quiescent Current, 50mA Linear Regulator February 2014 Alte ra Corporation Functional Description Functional Overview The EY1602 is a high performance, high voltage, low-dropout regulator (LDO) with 50mA sourcing capability. The part is rated to operate over the -40°C to +125°C temperature range. Featuring ultra-low quiescent current, it makes an ideal choice for “always-on” applications. It works well under a “load dump condition” where the input voltage could rise up to 40V . The device also features current limit and thermal shutdown protection. Enable Control The EY1602 features an Enable pin. When it is pulled low, the IC goes into shutdown mode. In this condition, the device draws less than 2µA. Driving the pin high turns the device on. For always on operation, the EN pin can be tied directly to VIN. Current Limit Protection The EY1602 has internal current limit functionality to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current largely independent of the output voltage. If the short or overload is removed from VOUT, the output returns to normal voltage regulation mode. Thermal Fault Protection In the event that the die temperature exceeds typically +165°C, the output of the LDO will shut down until the die temperature cools down to typically +145°C. The level of power dissipated, combined with the ambient temperature and the thermal impedance of the package, will determine if the junction temperature exceeds the thermal shutdown temperature. Also see the section on “Power Dissipation”.

Application Information

Input and Output Capacitors For the output, a ceramic capacitor (X5R or X7R) with a capacitance of 10µF is recommended for the EY1602 to maintain stability. The ground connection of the output capacitor should be routed directly to the GND pin of the device and also placed close to the IC. A minimum of 0.1µF (X5R or X7R) is recommended at the input.

The output voltage is programmed using an external resistor divider, as shown in Figure 11. The junction temperature must not exceed the range specified in “Recommended Operating Conditions” on page 3. heat dissipation. Thermal vias on the PAD increases heat dissipation. The table lists the revision history for this document. February 2014 1.0 Initial release. FIGURE 11. SETTING OUTPUT VOLTAGE

EY1602 40V, Low Quiescent Current, 50mA Linear Regulator February 2014 Alte ra Corporation Small Outline Exposed Pad Plastic Packages (EPSOIC) INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) h x 45o C H 0.25(0.010) BM M 123 P BOTTOM VIEW N TOP VIEW SIDE VIEW M8.15B

8 LEAD NARROW BODY SMALL OUTLINE EXPOSED PAD

A 0.056 0.066 1.43 1.68 - A1 0.001 0.005 0.03 0.13 - B 0.0138 0.0192 0.35 0.49 9 C 0.0075 0.0098 0.19 0.25 - D 0.189 0.196 4.80 4.98 3 E 0.150 0.157 3.81 3.99 4 e 0.050 BSC 1.27 BSC - H 0.230 0.244 5.84 6.20 - h 0.010 0.016 0.25 0.41 5 L 0.016 0.035 0.41 0.89 6 N8 8 7  0° 8° 0° 8° - P - 0.094 - 2.387 11 P1 - 0.094 - 2.387 11 Rev. 5 8/10 NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: INCH. C onverted millimeter dimensions are not necessarily exact. 11. Dimensions “P” and “P1” are thermal and/or electrical enhanced variations. Values shown are maximum size of exposed pad within lead count and body size.