ET2314

ET2314 ETEK | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 11

Technical content

Features

z Least External Components z Treble and Bass Control z Loudness Function z 4 Stereo Inputs with Selectable Input Gain z Input/Output for External Noise Reduction System/Equalizer z 2 Independent Speaker Controls for Balance Control z Independent Mute Function z Volume Control in 1.25 dB/step z Low Distortion z Low Noise and DC Stepping z Controlled by I2C Bus Micro-Processor Interface z Package: SOP28

Applications

z Car Stereo (Audio) z Hi-Fi Audio System

Rev 1.0 2009-12-07 Pin Configuration Pin Function Pin NO Pin Name I/O Description

1 VDD - Supply Input Voltage

2 AGND - Analog Ground

3 TREB_L I Left Channel Input for Treble Controller

4 TREB_R I Right Channel Input for Treble Control

5 RIN I Audio Processor Right Channel Input

6 ROUT O Gain Output and Input Selector for Right Channel

7 LOUD_R I Right Channel Loudness Input

8 RIN4 I Right Channel Input 4

9 RIN3 I Right Channel Input 3

10 RIN2 I Right Channel Input 2

11 RIN1 I Right Channel Input 1

12 LOUD_L I Left Channel Loudness Input

13 LIN4 I Left Channel Input 4

14 LIN3 I Left Channel Input 3

15 LIN2 I Left Channel Input 2

16 LIN1 I Left Channel Input 1

17 LIN I Audio Processor Left Channel Input

18 LOUT O Gain Output and Input Selector for Left Channel

19 BIN_L I Left Channel Input for Bass Controller

20 BOUT_L O Left Bass Controller Output Channel

21 BIN_R I Right Channel Input for Bass Controller

22 BOUT_R O Right Channel Output for Bass Controller

23 OUT_R O Right Speaker Output

24 OUT_L O Left Speaker Output

25 DGND - Digital Ground

26 DATA I Control Data Input

27 CLK I Clock Input for Serial Data Transmission

28 REF - Analog Reference Voltage (1/2 VDD)

Rev 1.0 2009-12-07 Block Diagram Functional Description Bus Interface Data are transmitted to and from the microprocessor to the ET2314 via the DATA and CLK. The DATA and CLK make up the BUS Interface. It should be noted that the pull-up resistors must be connected to the positive supply voltage. Data Validity A data on the DATA Line is considered valid and stable only when the CLK Signal is in HIGH State. The HIGH and LOW State of the DATA Line can only change when the CLK signal is LOW. Please refer to the figure below. Start and Stop Conditions A Start Condition is activated when 1) the CLK is set to HIGH and 2) DATA shifts from HIGH to LOW State. The Stop Condition is activated when 1) CLK is set to HIGH and 2) DATA shifts from LOW to HIGH State. Please refer to the timing diagram below.

Rev 1.0 2009-12-07 Byte Format Every byte transmitted to the DATA Line consist of 8 bits. Each byte must be followed by an Acknowledge Bit. The MSB is transmitted first. Acknowledge During the Acknowledge Clock Pulse, the master (μP) puts a resistive HIGH level on the DATA Line. The peripheral (audio processor) that acknowledges has to pull-down (LOW) the DATA line during the Acknowledge Clock Pulse so that the DATA Line is in a Stable Low State during this Clock Pulse. Please refer to the diagram below. The audio processor that has been addressed has to generate an acknowledge after receiving each byte, otherwise, the DATA Line will remain at the High Level during the ninth (9th) Clock Pulse. In this case, the master transmitter can generate the STOP Information in order to abort the transfer. Transmission without Acknowledge If you want to avoid the acknowledge detection of the audio processor, a simpler μP transmission may be used. Wait one clock and do not check the slave acknowledge of this same clock then send the new data. If you use this approach, there are greater chances of faulty operation as well as decrease in noise immunity. Interface Protocol The interface protocol consists of the following: z A Start Condition z A Chip Address Byte including the ET2314 address. The 8 th Bit of the Byte must be “0”. ET2314 must always acknowledge the end of each transmitted byte. z A Data Sequence (N-Bytes + Acknowledge) z A Stop Condition Please refer to the diagram below:

Rev 1.0 2009-12-07 Software Specification ET2314 Address ET2314 Address is shown below. MSB 0 0 0 1 0 0 0 LSB Data Bytes MSB LSB FUNCTION 0 0 B2 B1 B0 A2 A1 A0 Volume Control 1 1 0 B1 B0 A2 A1 A0 Speaker ATT L 1 1 1 B1 B0 A2 A1 A0 Speaker ATT R 0 1 0 G1 G0 S2 S1 S0 Audio Switch 0 1 1 0 C3 C2 C1 C0 Bass Control 0 1 1 1 C3 C2 C1 C0 Treble Control where Ax = 1.25 dB steps; Bx = 10 dB steps; Cx = 2 dB steps; Gx = 3.75 dB/steps Volume The table below gives a detailed description of the Volume Data Bytes. For example, a volume of -37.5 dB is given by 0 0 0 1 1 1 1 0. MSB LSB FUNCTION 0 0 B2 B1 B0 A2 A1 A0 Volume 1.25 dB steps 0 0 0 0 0 0 1 -1.25 0 1 0 -2.5 0 1 1 -3.75 1 0 0 -5 1 0 1 -6.25 1 1 0 -7.5 1 1 1 -8.75 0 0 B2 B1 B0 A2 A1 A0 Volume 10 dB steps 0 0 0 0 0 0 1 -10 0 1 0 -20 0 1 1 -30 1 0 0 -40 1 0 1 -50 1 1 0 -60 1 1 1 -70

Rev 1.0 2009-12-07 Speaker Attenuators The table below gives a detailed description of the speaker attenuators data bytes. For example, an attenuation of 30dB on the Speaker R (Right) is given by: 1 1 1 1 1 0 0 0. MSB LSB FUNCTION 1 1 0 B1 B0 A2 A1 A0 Speaker L 1 1 1 B1 B0 A2 A1 A0 Speaker R 0 0 0 0 0 0 1 -1.25 0 1 0 -2.5 0 1 1 -3.75 1 0 0 -5 1 0 1 -6.25 1 1 0 -7.5 1 1 1 -8.75 0 0 0 0 1 -10 1 0 -20 1 1 -30 1 1 1 1 1 Mute Audio Switch Data Byte The following table shows the detailed description of the Audio Switch Data Bytes. For example, a Stereo 1 Input with Gain of +11.25 dB Loudness ON is given by: 0 1 0 0 0 0 0 0. MSB LSB FUNCTION 0 1 0 G1 G0 S2 S1 S0 Audio Switch 0 0 Stereo 1 0 1 Stereo 2 1 0 Stereo 3 1 1 Stereo 4

0 Loudness ON

1 Loudness OFF

0 0 +11.25dB 0 1 +7.5dB 1 0 +3.75dB 1 1 0dB Bass and Treble Data Bytes The following table shows a detailed description of the Bass and Treble Data Byte. For example a Treble at 12dB is given by : 0 1 1 1 0 0 0 1. MSB LSB FUNCTION 0 1 1 0 C3 C2 C1 C0 Bass 0 1 1 1 C3 C2 C1 C0 Treble 0 0 0 0 -14

Rev 1.0 2009-12-07 0 0 0 1 -12 0 0 1 0 -10 0 0 1 1 -8 0 1 0 0 -6 0 1 0 1 -4 0 1 1 0 -2 0 1 1 1 0 1 1 1 1 0 1 1 1 0 2 1 1 0 1 4 1 1 0 0 6 1 0 1 1 8 1 0 1 0 10 1 0 0 1 12 1 0 0 0 14 Unit: dB Absolute Maximum Ratings Parameter Symbol Rating Unit Operating Supply Voltage Vs 10.5 V Operating Ambient Temperature Tamb -20 to 75 ℃ Storage Temperature Range Tstg -40 to +125 ℃ Quick Reference Data Parameter Symbol Min Typ Max Unit Supply Voltage Vs 6 9 10 V Max. Input Signal Handling VCL 2 2.5 Vrms Total Harmonic Distortion (V = 1Vrms, f = 1KHz) THD 0.07 0.15 % Signal to Noise ratio S/N 95 dB Channel Separation ( f = 1KHz) Sc 85 dB Volume Control 1.25dB step -75 0 dB Bass & Treble Control 2dB step -14 +14 dB Balance Control 1.25dB step -37.5 0 dB Input Gain 3.75 dB step 0 11.25 dB Mute Attenuation 85 dB

Rev 1.0 2009-12-07

Electrical Characteristics

(Unless specified: Tamb = 25℃, Vc=9V, RL=10KΩ, Rg = 600Ω, all controls flat (G=0), f=1KHz) Parameter Symbol Test Condition Min. Typ. Max. Unit Supply Supply Voltage Vcc 6 9 10 V Supply Current Is 30 40 mA Input Selectors Input Resistance RII Input 1,2,3 80 100 120 KOhms Clipping Level VCL Av=-8.75 dB ; d=0.3% 2 2.5 Vrms Input Separation (2) SIN 80 100 dB Min. Input Gain GINmin -1 0 1 dB Max. Input Gain GINmax 11.25 dB Volume Control Input Resistance RIV 30 40 50 KOhms Control Range CRANGE 65 70 75 dB Min. Attenuation AVMIN -1 0 1 dB Max. Attenuation AVMAX 65 70 75 dB Step Resolution ASTEP 0.5 1.25 1.75 dB -1.25 0 -1.25 dB Attenuation Set Error EA AV=0 to -20dB AV=-20 to –60dB -3.0 0 2 dB Speaker Attenuators Control Range CRANGE 35 37.5 40 dB Step Resolution SSTEP 0.5 1.25 1.75 dB Attenuation Set Error EA 1.5 dB Output Mute Attenuation A MUTE 75 85 dB Bass Control (1) Control Range Gb Max. Boost/Cut ± 12 ±14 ±16 dB Step Resolution BSTEP 1 2 3 dB Internal Feedback Resistance R B 34 44 58 KOhms Treble Control (1) Control Range Gt Max. Boost/Cut ±13 ±14 ±15 dB Step Resolution TSTEP 1 2 3 dB Audio Outputs Clipping Level VOCL d=0.3% 2 2.5 Vrms Output Resistance ROUT 1.7 1.9 2.1 Ohms DC Voltage Level VOUT 4.2 4.5 4.8 V General Output Noise eNO BW==20-20KHz, flat Output Muted All gains=0dB -97 -92 dB dB

Rev 1.0 2009-12-07 A Curve All Gains=0dB -100 dB Signal to Noise Ratio S/N All Gains=0dB Vo=1Vrms 95 dB Distortion d AV=0, VIN=1Vrms AV=-8.75dB,VIN=1Vrms, AV=-8.75dB,VIN=0.3Vrm 0.1 0.07 0.03 0.3 0.15 0.1 Channel Separation Left/Right Sc 80 90 dB Bus Inputs Input Low Voltage VIL 1 V Input High Voltage VIH 3 V Input Current IIN -5 +5 uA Output Voltage SDA Acknowledge Vo Io=1.6mA 0.4 V Note: (1) For the Bass and Treble Response, please, refer to the diagram below. The center frequency and quality of the resonance behavior can be selected by the external circuitry. A standard first order bass response can realized by a standard feedback network. (2) The selected input is grounded thru the 2.2uF capacitor. Typical Tone Response (with the ext. Components indicated in the test circuit) ET2314: Loudness vs Volume Attenuation Frequency Response (C10=C11=100nF)

Rev 1.0 2009-12-07 ET2314 : C10, C11 vs Loudness Frequency Response (Volume=-40dB, All other controls are flat) Application Circuits Note: 1. It is suggested that you use Mylar Capacitor for capacitors, C12 ~ C19. 2. Resistor ( R ) Range = 2.0 K Ohms to 3.6 K Ohms 3. Recommended Value of Resistor ( R ) = 2.4 K Ohms

Rev 1.0 2009-12-07 Package Dimension SOP28 18.00±0.10 0.406±0.10 1.27 0.16 2.34±0.10 Unit：mm 0.85±0.20 7.52±0.10 10.00±0.30 +0.10 -0 . 0 5 2°～8°