EP5382QI

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Enpirion® Power Datasheet EP5352QI/EP5362QI/EP5382QI 500/600/800mA PowerSoC Synchronous Buck Regulators With Integrated Inductor Voltage Select DAC Switch VREF (+) (-) Error Amp VSENSE VFB VOUT VS0 VS1 VS2 Package Boundry P-Drive N-Drive UVLO Thermal Limit Current Limit Soft Start Sawtooth Generator (+) (-) PWM Comp VIN ENABLE GND Logic Compensation Network Product Highlights

• Revolutionary integrated inductor
• Very small solution foot print*
• Fully RoHS compliant; MSL 3 260°C reflow
• Only two low cost components required
• 5mm x 4mm x1.1mm QFN package
• Wide 2.4V to 5.5V input range
• 500, 600, 800 mA output current versions
• Less than 1 µA standby current
• 4 MHz switching frequency
• Fast transient response
• Very low ripple voltage; 5mV p-p typical
• 3 Pin VID Output Voltage select
• External divider option
• Dynamically adjustable output
• Designed for Low noise/EMI
• Short circuit, UVLO, and thermal protection Product Overview The Ultra-Low -Profile EP53X 2QI product family is targeted to applications where board area and profile are critical. EP53X 2QI is a complete power conversion solution requiring only two low cost ceramic MLCC caps. Inductor, MOSFETS, PWM, and compensation are integrated into a tiny 5mm x 4mm x 1.1mm QFN package. The EP53x2QI family is engineered to simplify design and to minimize layout constraints. High switching frequency and internal type III compensation provides superior transient response. With a 1.1 mm profile, the EP53x2 is perfect for space and height limited applications. A 3-pin VID output voltage select scheme provides seven pre-programmed output voltages along with an option for external resistor divider. Output voltage can be programmed on-the-fly to provide fast, dynamic voltage scaling. Typical Application Circuit VIN VSense Vin VS1 VS2 VS0 10µF2.2uF VOUT Vout GND ENABLE VFB Voltage Select

Figure 1. Typical application circuit.

Applications

• Area constrained applications
• Mobile multimedia, smartphone & PDA
• Mobile and Cellular platforms
• VoIP and Video phones
• Personal Media Players
• FPGA, DSP, IO & Peripherals 1 www.altera.com/enpirion

03132 October 11, 2013 Rev H

EP5382QI/EP5362QI/EP5352QI Absolute Maximum Ratings CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond recommended operating conditions is not implied. Stress beyond absolute maximum ratings may cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. PARAMETER SYMBOL MIN MAX UNITS Input Supply Voltage VIN -0.3 7.0 V Voltages on: ENABLE, VSENSE, VS0-VS2 -0.3 VIN + 0.3 V Voltage on: VFB -0.3 2.7 V Storage Temperature Range TSTG -65 150 °C Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020A 260 °C ESD Rating (based on Human Body Model) 2000 V Recommended Operating Conditions PARAMETER SYMBOL MIN MAX UNITS Input Voltage Range VIN 2.4 5.5 V Output Voltage Range VOUT 0.6 VIN-0.45 V Operating Ambient Temperature TA -40 +85 °C Operating Junction Temperature TJ -40 +125 °C Thermal Characteristics PARAMETER SYMBOL TYP UNITS Thermal Resistance: Junction to Ambient (0 LFM) θJA 65 °C/W Thermal Resistance: Junction to Case (0 LFM) θJC 15 °C/W Thermal Shutdown TJ-TP +150 °C Thermal Shutdown Hysteresis 15 °C

Electrical Characteristics

NOTE: T A = 25°C unless otherwise noted. Typical values are at VIN = 3.6V. EP5352QI, EP5362QI: CIN = 2.2µF, COUT=10uF. EP5382QI: CIN = 4.7µF, COUT=10uF. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Operating Input Voltage VIN 2.4 5.5 V Under Voltage Lockout VUVLO VIN going low to high 2.2 2.3 V UVLO Hysteresis 0.145 V VOUT Initial Accuracy VOUT 2.4V ≤ VIN ≤ 5.5V, ILOAD = 100mA; VOUT Variation for all Causes VOUT 2.4V ≤ VIN ≤ 5.5V, ILOAD = 0 – 800mA, TA = -40°C to +85°C -3.0 +3.0 % Feedback Pin Voltage VFB 2.4V ≤ VIN ≤ 5.5V, ILOAD = 100mA VSO=VS1=VS2=1 0.591 0.603 0.615 V Feedback Pin Input Current IFB 1 nA 2 www.altera.com/enpirion

EP5382QI/EP5362QI/EP5352QI PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS TA = -40°C to +85°C VSO=VS1=VS2=1 Dynamic Voltage Slew Rate Vslew 3 V/mS Continuous Output Current EP5352QI IOUT EP5352QI 500 mA Continuous Output Current EP5362QI IOUT EP5362QI 600 mA Continuous Output Current EP5382QI IOUT EP5382QI 800 mA Shut-Down Current ISD Enable = Low 0.75 µA Quiescent Current No switching 800 µA PFET OCP Threshold ILIM 2.4V ≤ VIN ≤ 5.5V, 0.6V ≤ VOUT ≤ VIN – 0.6V 1.4 2 A VS0-VS1 Voltage Threshold Pin = Low Pin = High 0.0 1.4 0.4 VIN V VS0-VS2 Pin Input Current IVSX 1 nA Enable Voltage Threshold Logic Low Logic High 0.0 1.4 0.2 VIN V Enable Pin Input Current IEN VIN = 3.6V 2 µA Operating Frequency FOSC 4 MHz PFET On Resistance RDS(ON) 340 mΩ NFET On Resistance RDS(ON) 270 mΩ Internal Inductor DCR .110 Ω Soft-Start Operation Soft-Start Slew Rate VSS VID programming mode 1.95 3 4.05 V/mS VOUT Rise Time TSS VFB programming mode 1.56 2.4 3.24 mS 3 www.altera.com/enpirion

to the IC. VIN can range from 2.4V to 5.5V. Input GND : (Pin 3): Input power ground. Recommendations for further details. OUT (Pin 5,6,7): Regulated output voltage. output filter capacitor as possible. select. VS0=pin19, VS1=pin18, VS2=pin17. ≤ 0.4V. Logic high is defined as V HIGH ≥ 1.4V. voltage select for more detail). and PCB internal ground plane. Figure 2. Pin description, top view. Figure 3. Pin description, bottom view.

Figure 4. Functional block diagram.

EP5382QI/EP5362QI/EP5352QI Typical Performance Characteristics 50 150 250 350 450 550 Efficiency vs Output Current VOUT = 3.3V Load Current (mA) VIN = 5.0V VOUT = 3.0V VOUT = 2.7V VOUT = 2.5V VOUT = 1.8V Efficiency -% 50 150 250 350 450 550 Efficiency vs Output Current VOUT = 3.3V Load Current (mA) VIN = 5.0V VOUT = 3.0V VOUT = 2.7V VOUT = 2.5V VOUT = 1.8V Efficiency -% 100 50 150 250 350 450 550 Efficiency vs Output Current VOUT = 1.2V Load Current (mA) VIN = 3.3V VOUT = 3.0V VOUT = 2.7V VOUT = 2.5V VOUT = 1.8V Efficiency -% 100 50 150 250 350 450 550 Efficiency vs Output Current VOUT = 1.2V Load Current (mA) VIN = 3.3V VOUT = 3.0V VOUT = 2.7V VOUT = 2.5V VOUT = 1.8V Efficiency -% 100 50 150 250 350 450 550 Efficiency vs Output Current VOUT = 3.3V Load Current (mA) VIN = 3.6V VOUT = 3.0V VOUT = 2.7V VOUT = 2.5V VOUT = 1.8V Efficiency -% 100 50 150 250 350 450 550 Efficiency vs Output Current VOUT = 3.3V Load Current (mA) VIN = 3.6V VOUT = 3.0V VOUT = 2.7V VOUT = 2.5V VOUT = 1.8V Efficiency -% 6 www.altera.com/enpirion

EP5382QI/EP5362QI/EP5352QI Detailed Description Functional Overview The EP53x 2QI family is a complete DCDC converter solution requiring only two low cost MLCC capacitors. MOSFET switches, PWM controller, Gate-drive, compensation, and inductor are integrated into the tiny 5mm x 4mm x 1.1mm package to provide the smallest footprint possible while maintaining high efficiency and high performance. The converter uses voltage mode control to provide the simplest implementation and high noise immunity. The device operates at a 4 MHz switching frequency. The high switching frequency allows for a wide control loop bandwidth providing excellent transient performance. The 4 MHz switching frequency enables the use of very small components making possible this unprecedented level of integration. Altera Enpirion’s proprietary power MOSFET technology provides very low switching loss at frequencies of 4 MHz and higher, allowing for the use of very small internal components, and very w ide control loop bandwidth. Unique magnetic design allows for integration of the inductor into the very low profile 1.1mm package. Integration of the inductor virtually eliminates the design/layout issues normally associated with switch-mode DCDC converters. All of this enables much easier and faster integration into various applications to meet demanding EMI requirements. Output voltage is chosen from seven preset values via a three pin VID voltage select scheme. An external divider option enables the selection of any voltage in the 0.6 to V IN - Vdropout . This reduces the number of components that must be qualified and reduces inventory problems. The VID pins can be toggled on the fly to implement glitch free dynamic voltage scaling. Protection features include under -voltage lock- out (UVLO), over -current protection (OCP), short circuit protection, and thermal overload protection. Integrated Inductor Altera has introduced the world’s first product family featuring integrated inductors. The EP53x2QI family utilizes a low loss, planar construction inductor. The use of an internal inductor localizes the noises associated with the output loop currents. The inherent shielding 7 www.altera.com/enpirion

EP5382QI/EP5362QI/EP5352QI and compact construction of the integrated inductor reduces the radiated noise that couples into the traces of the circuit board. Further, the package layout is optimized to reduce the electrical path length for the AC ripple currents that are a major source of radiated emissions from DCDC converters. The integrated inductor signi ficantly reduces parasitic effects that can harm loop stability, and makes layout very simple. Soft Start Internal soft start circuits limit in-rush current when the device starts up from a power down condition or when the “ENABLE” pin is asserted “high”. Digital control circuitry limits the V OUT ramp rate to levels that are safe for the Power MOSFETS and the integrated inductor. The EP53x2 QI ha ve two soft start operating modes. When VOUT is programmed using a preset voltage in VID mode, the device has a constant slew rate. When the EP53x2 QI is configured in external resistor divider mode, the device has a constant VOUT ramp time. Output voltage slew rate and ramp time is given in the Electrical Characteristics Table. Excess bulk capacitance on the output of the device can cause an over -current condition at startup. When operating in VID mode, the maximum total capacitance on the output, including the output filter capacitor and bulk and decoupling capacitance, at the load, is given as: C OUT_TOTAL_MAX = COUT_Filter + COUT_BULK = 350uF When the EP53x2 QI output voltage is programmed using and external resistor divider the maximum total capacitance on the output is given as: C OUT_TOTAL_MAX = 6.253x10-4/VOUT Farads The above number and formula assume a no load condition at startup. Over Current/Short Circuit Protection The current limit function is achieved by sensing the current flowing through a sense P - MOSFET which is compared to a reference current. When this level is exceeded the P - FET is turned off and the N -FET is turned on, pulling V OUT low. This condition is maintained for a period of 1mS and then a normal soft start is initiated. If the over current condition still persists, this cycle will repeat in a “hiccup” mode. Under Voltage Lockout During initial power up an under voltage lockout circuit will hold -off the switching circuitry until the input voltage reaches a sufficient level to insure proper operation. If the voltage drops below the UVLO threshold the lockout circuitry will again dis able the switching. Hysteresis is included to prevent chattering between states. Enable The ENABLE pin provides a means to shut down the converter or enable normal operation. A logic low will disable the converter and cause it to shut down. A logic high will enable the converter into normal operation. In shutdown mode, the device quiescent current will be less than 1 uA. The ENABLE pin must not be left floating. Thermal Shutdown When excessive power is dissipated in the chip, the junction temperature rises. Once the junction temperature exceeds the thermal shutdown temperature the thermal shutdown circuit turns off the converter output voltage thus allowing the device to cool. When the junction temperature decreases by 15C °, the device will go through the normal startup process.

Application Information

8 www.altera.com/enpirion

Figure 5. External Divider. settings and the external divider is not allowed. Table 1. Voltage select settings.

EP5382QI/EP5362QI/EP5352QI during power -up or power -down meets this requirement. Pre-Bias Start-up The EP53x2QI does not support startup into a pre-biased condition. Be sure the output capacitors are not charged or the output of the EP53x2QI is not pre-biased when the EP53x2QI is first enabled. Input and Output Capacitors The input capacitance requirement is as follows: EP5352QI, EP5362QI = 2.2uF EP5382QI = 4.7uF Altera recommends that a low ESR MLCC capacitor be used. The input capacitor must use a X5R or X7R or equivalent dielectric formulation. Y5V or equivalent dielectric formulations lose capacitance with frequency, bias, and with temperature, and are not suitable for switch-mode DC -DC converter input and output filter applications. The output capacitance requirement is a minimum of 10uF. The control loop is designed to be stable with up to 60uF of total output capacitance without requiring modification of the control loop. Capacitance above the 10uF minimum should be added if the transient performance is not sufficient using the 10uF. Altera recommends a low ESR MLCC type capacitor be used. The output capacitor must use a X5R or X7R or equivalent dielectric formulation. Y5V or equivalent dielectric formulations lose capacitance with frequency, bias, and temperature and are not suitable for switch-mode DC -DC converter input and output filter applications. LAYOUT CONSIDERATIONS* *Optimized PCB Layout file downloadable from http://www.altera.com/enpirion to assure first pass design success. Recommendation 1: Input and output filter capacitors should be placed as close to the EP53x2QI package as possible to reduce EMI from input and output loop AC currents. This reduces the physical area of the Input and Output AC current loops. Recommendation 2: DO NOT co nnect GND pins 3 and 4 together. Pin 3 should be used for the Input capacitor local ground and pin 4 should be used for the output capacitor ground. The ground pad for the input and output filter capacitors should be isolated ground islands and should be connected to system ground as indicated in recommendation 3 and recommendation 5. Cin Manufacturer Part # Value WVDC Case Size Murata GRM219R61A475KE19D 4.7uF 10V 0805 GRM319R61A475KA01D 1206 GRM219R60J475KE01D 6.3V 0805 GRM31MR60J475KA01L 1206 Panasonic ECJ-2FB1A475K 10V 0805 ECJ-3YB1A475K 1206 ECJ-2FB0J475K 6.3V 0805 ECJ-3YB0J475K 1206 Taiyo Yuden LMK212BJ475KG-T 10V 0805 LMK316BJ475KD-T 1206 JMK212BJ475KD-T 6.3V 0805 Cin Manufacturer Part # Value WVDC Case Size Murata GRM21BR71A225KA01L 2.2uF 10V 0805 GRM31MR71A225KA01L 1206 GRM21BR70J225KA01L 6.3V 0805 Panasonic ECJ-2FB1A225K 10V 0805 ECJ-3YB1A225K 1206 ECJ-2YB0J225K 6.3V 0805 Taiyo Yuden LMK107BJ225KA-T 10V 0603 LMK212BJ225KG-T 0805 Cout Manufacturer Part # Value WVDC Case Size Murata GRM219R60J106KE19D 10uF 6.3V 0805 GRM319R60J106KE01D 1206 Panasonic ECJ-2FB0J106K 6.3V 0805 ECJ-3YB0J106K 1206 Taiyo Yuden JMK212BJ106KD-T 6.3V 0805 JMK316BJ106KF-T 1206 10 www.altera.com/enpirion

suppressing EMI (see Fig. 5, Fig. 6, and Fig. 7). heat dissipation from the converter. control lines underneath the converter package. Figure 6. Example application, Vout=1.2V. resistor values are chosen to give an output voltage of 2.6V.

Figure 7. Schematic showing the use of external divider option, Vout = 2.6V. Figure 8 shows two example board layouts. Note the placement of the input and output capacitors. placement of the vias per recommendation 3. Figure 8. Example layout showing PCB top layer, as well as demonstrating use of vias from input, output filter capacitor local grounds, and thermal pad, to PCB system ground.

EP5382QI/EP5362QI/EP5352QI

Ordering Information

Part Number Temp Range Package EP5352QI -40°C to +85°C 20-pin QFN T&R EP5362QI -40°C to +85°C 20-pin QFN T&R EP5382QI -40°C to +85°C 20-pin QFN T&R EVB-EP5352QI EP5352QI Evaluation Board EVB-EP5362QI EP5362QI Evaluation Board EVB-EP5382QI EP5382QI Evaluation Board 13 www.altera.com/enpirion

are attached. This results in several small pads being exposed on the bottom of the package. metal (traces, vias, or planes), on the top layer of the PCB. adjacent metal pad or pin is a minimum of 0.20mm, including tolerances. This is shown in Figure 10. Figure 9. Exposed metal and mechanical dimensions of the package . The gray area represents the bottom metal no-connect area. This area should be clear of any traces, planes, or vias, on the top layer of the PCB.

Figure 10. Exposed pad clearances; the Altera Enpirion lead frame package complies with JEDEC requirements.

Figure 11. Recommended PCB Solder Mask Openings.

Figure 12. Package mechanical dimensions.

EP5382QI/EP5362QI/EP5352QI Contact Information Altera Corporation

101 Innovation Drive

San Jose, CA 95134 Phone: 408-544-7000 www.altera.com © 2013 Altera Corporation—Confidential. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademark s of Altera Corporation and regis tered in the U.S. Patent and Trademark Office and in other countries . All other words and logos identified as trademark s or s ervice mark s are the property of their res pective holders as des cribed at www.altera.com/common/legal.html. Altera warrants performance of its s emiconductor products to current s pecifications in accordance with Altera's s tandard warranty, but res erves the right to mak e changes to any products and s ervices at any time without notice. Altera as sumes no res pons ibility or liability aris ing out of the application or us e of any information, product, or s ervice des cribed herein except as expres s ly agreed to in writing by Altera. Altera cus tomers are advis ed to obtain the lates t vers ion of device s pecifications before relying on any publis hed information and before placing orders for products or s ervices . 18 www.altera.com/enpirion