DS4000N

DS4000 DALLAS | Alldatasheet

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Technical content

1 of 16 REV: 072403 Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. GENERAL DESCRIPTION The DS4000 digitally controlled temperature-compen- sated crystal oscillator (DC-TCXO) features a digital temperature sensor, one fixed-frequency temperature- compensated square-wave output (F 1), one programmable temperature-compensated square- wave output (F 2), and digital communication for frequency tuning (SDA, SCL).

APPLICATIONS

Reference Oscillators in PLL Circuits Global Positioning Systems SATCOM Telecom Wireless Base Stations

ORDERING INFORMATION

PART TEMP RANGE PIN-PACKAGE DS4000 0°C to +70°C 24 BGA DS4000N -40°C to +85°C 24 BGA Selector Guide appears end of data sheet.

FEATURES

/g167/g32Aging ≤1.0ppm (First Year) /g167/g32Frequency Stability ±1.0ppm from -40°C to +85°C /g167/g32Frequency Versus Supply Stability of ±1.0ppm per Volt Base Frequency is Digitally Tunable by ±10ppm One Fixed-Frequency Output and One (n + 1) or 2(n + 1) Division of the Base Frequency Output /g167/g32Temperature Measurements from -40C/g176 to +85/g176C with 10-Bit/+0.25°C Resolution and ±3°C Accuracy /g167/g322-Wire Serial Interface PIN CONFIGURATION DS4000 Digitally Controlled TCXO www.maxim-ic.com TOP VIEW BGA SCL SDA GNDOSC N.C. GND V CC V OSC GND GND A B C D

DS4000 Digitally Controlled TCXO 2 of 16 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground -0.3V to +6.0V Storage Temperature Range -55°C to +85°C Operating Voltage Range VCC = 5V ±5% Operating Temperature Range Commercial 0°C to +70°C Industrial -40°C to +85°C Soldering Temperature See IPC/JEDEC J-STD-020A (2x max) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect device reliability. RECOMMENDED DC OPERATING CONDITIONS (VCC = 5V ±5%, over the operating temperature range.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage V CC (Notes 1, 2) 4.75 5.0 5.25 V Oscillator Supply Voltage V OSC (Notes 1, 2) 4.75 5.0 5.25 V Input Logic High V IH (Note 1) 2.2 V CC + 0.3 V Input Logic Low V IL (Note 1) -0.3 +0.8 V DC ELECTRICAL CHARACTERISTICS (VCC = 5V ±5%, over the operating temperature range.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Active Supply Current I CC (Notes 3, 4) 1.5 2 mA Active Oscillator Supply Current I OSC (Notes 3, 4) 3.5 5.5 mA Output Logic High 2.4V I OH (Note 1) -1 mA Output Logic Low 0.4V I OL (Note 1) 4 mA Input Leakage I LI 1 /g109A I/O Leakage I LO 1 /g109A Temperature Conversion Time t CONVT (Note 3) 250 300 ms Note 1: All voltages are referenced to ground. Note 2: For ±10% operating range, contact factory. Note 3: Typical values are at +25/g176C and nominal supplies. Note 4: These parameters are measured with the outputs disabled.

DS4000 Digitally Controlled TCXO 3 of 16 AC ELECTRICAL CHARACTERISTICS: TCXO (VCC = 5V ±5%, over the operating temperature range.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS F1 Output Frequency F2 CMOS (Note 5) 10 20 MHz Frequency Stability vs. Temperature /g68F/TA -1.0 +1.0 ppm Frequency Stability vs. Voltage /g68F/V (Note 6) ±1.0 ppm/V Frequency Stability vs. Aging /g68F/Yr ±1.0 ppm/Yr F1, F2 Rise and Fall Time, 10% to 90% tR, tF 4 ns Max Output Capacitive Load C L 10 pF Duty Cycle t W / t 40 50 60 % 10Hz -85 100Hz -115 1kHz -129 10kHz -134 Phase Noise f1 Output (Note 7) /g102N 100kHz -139 dBc/Hz Note 5: F1 is the base frequency as defined by the package markings. F 2 is a programmable frequency output. The output frequency of F 2 is derived from the base frequency, F 1, by programming the F 2 frequency select register and duty cycle (DC) bit in the TCXO control register. The minimum output frequency is F1 / (28 + 1) with DC = 0 and f1 / [2 x (28 + 1)] with DC = 1. Note 6: First year typical. Note 7: 16.384MHz, 5V, +25°C with one of the two outputs enabled.

DS4000 Digitally Controlled TCXO 4 of 16 AC ELECTRICAL CHARACTERISTICS—2-WIRE SERIAL INTERFACE (VCC = 4.75 to 5.25V, TA = -40/g176C to +85/g176C) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS Fast mode 0 400 SCL Clock Frequency f SCL Standard mode 0 100 kHz Fast mode 1.3 Bus Free Time Between a STOP and START Condition tBUF Standard mode 4.7 /g109s Fast mode (Note 7) 0.6 Hold Time (Repeated) START Condition tHD:STA Standard mode (Note 7) 4.0 /g109s Fast mode 1.3 Low Period of SCL Clock tLOW Standard mode 4.7 /g109s Fast mode 0.6 High Period of SCL Clock tHIGH Standard mode 4.0 /g109s Fast mode 0.6 Setup Time for a Repeated START Condition t SU:STA Standard mode 4.7 /g109s Fast mode (Note 8) 0 0.9 Data Hold Time t HD:DAT Standard mode (Note 8) 0 0.9 /g109s Fast mode (Note 9) 100 Data Setup Time t SU:DAT Standard mode (Note 9) 250 ns Fast mode (Note 9) 20 + 0.1C B 300 Rise Time of Both SDA and SCL tR Standard mode (Note 9) 20 + 0.1C B 1000 ns Fast mode (Note 10) 20 + 0.1C B 300 Fall Time of Both SDA and SCL tF Standard mode (Note 10) 20 + 0.1C B 1000 ns Fast mode 0.6 Setup Time for STOP Condition tSU:STO Standard mode 4.0 /g109s Capacitive Load for Each Bus Line CB (Note 10) 400 pF Input Capacitance CI 5 pF Note 7: After this period, the first clock pulse is generated. Note 8: The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal. Note 9: A fast-mode device can be used in a standard mode system, but the requirement tSU:DAT >250ns must then be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the S CL signal, it must output the next data bit to the SDA line tRMAX + tSU:DAT (1000 + 250 = 1250ns) before the SCL line is released. Note 10: CB: Total capacitance of one bus line in pF.

Figure 1. Timing Diagram 1D, 2C, 2D GND Ground. DC power is provided to the device on these pins. 3A, 3B GND OSC Oscillator Ground. DC power is provided to the oscillator on these pins. 3C, 3D V OSC Oscillator Power Supply. DC power is provided to the oscillator on these pins. 4A, 4B A 0 2-Wire Slave Address Input. This pin is used to configure the slave address. interface. The SDA pin is open drain and requires an external pullup resistor. 5C, 5D V CC Power Supply. DC power is provided to the device on these pins. interface. The SCL pin is open drain and requires an external pullup resistor.

temperature-compensated square-wave output (F2), and digital communication for frequency tuning (SDA, SCL). Figure 2. Block Diagram

DS4000 Digitally Controlled TCXO 7 of 16 TEMPERATURE-COMPENSATED CRYSTAL OSCILLATOR The DS4000 can either function as a standalone TCXO or as a digitally controlled TCXO. When used as a standalone TCXO, the only requirements needed to function properly are power, ground, and an output. However, the 2-wire interface must be used to tune (push and pull) the crystal. The DS4000 is capable of supplying two different outputs, F1 and F2. 1) F 1 is the base frequency of the crystal unit inside of the device. The output type is a CMOS square wave. 2) F 2 is a programmable frequency output. The frequency select register can program this output to an integer division of the base (F 1) frequency. The duty cycle (DC) bit determines if the output is an n + 1 or a 2(n + 1) division of F1. F2 FREQUENCY SELECT REGISTER (FSR) (5Dh) Bit 7 6 5 4 3 2 1 0 Name D7 D6 D5 D4 D3 D2 D1 D0 Default 0 0 0 0 0 0 0 0 F2 = F1 / (FSR value + 1); with DC = 0 F2 = F1 / [2 x (FSR value + 1)]; with DC = 1 TCXO CONTROL REGISTER (60h) Bit 7 6 5 4 3 2 1 0 Name X X X X F 2OE F 1OE F T DC Default 0 0 0 0 0 0 0 0 DC, Duty Cycle Bit: If 50% duty cycle is desired, then this bit must be set to logic 1. The default condition at power-up is logic 0. FT: This bit must be programmed by the user to 0. F1OE, F1 Output Enable Bit: This bit allows the user to disable/enable the F1 output. F2OE, F2 Output Enable Bit: This bit allows the user to disable/enable the F2 output.

frequency by a microcontroller using the 2-wire protocol. Table 1. Frequency Tuning Relationship

The digital temperature sensor provides 10-bit temperature readings that indicate the temperature of the device. background, reading the temperature register does not affect the conversion in progress. Table 2. Temperature/Data Relationship power consumption, PC board layout, and airflow.

Table 3. Command Set resolution is required, both bytes must be read.

DS4000 Digitally Controlled TCXO 11 of 16 2-WIRE SERIAL INTERFACE The DS4000 supports a bidirectional 2-wire serial bus and data transmission protocol. The bus must be controlled by a master device, which generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions. The DS4000 operates as a slave on the 2-wire bus. The DS4000 works in a regular mode (100kHz clock rate) and a fast mode (400kHz clock rate), which are defined within the bus specifications. Connections to the bus are made by the open-drain I/O signals SDA and SCL. The following bus protocol has been defined (Figure 3): /g167/g32Data transfer can be initiated only when the bus is not busy. /g167/g32During data transfer, the data signal must remain stable whenever the clock signal is HIGH. Changes in the data signal while the clock signal is HIGH are interpreted as control signals. Accordingly, the following bus conditions have been defined: Bus Not Busy: Both data and clock signals remain HIGH. Start Data Transfer: A change in the state of the data signal, from HIGH to LOW, while the clock line is HIGH, defines the START condition. Stop Data Transfer: A change in the state of the data signal, from LOW to HIGH, while the clock line is HIGH, defines the STOP condition. Data Valid: The state of the data signal represents valid data when, after a START condition, the data signal is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of data bytes transferred between START and STOP conditions is not limited and is determined by the master device. The information is transferred byte-wise and each receiver acknowledges with a ninth bit. Acknowledge: Each receiving device, when addressed, is required to generate an acknowledge after reception of each byte. The master device must generate an extra clock pulse that is associated with this acknowledge bit. A device that acknowledges must pull down the serial data (SDA) signal during the acknowledge clock pulse in such a way that the SDA signal is stable LOW during the HIGH period of the acknowledge-related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an end-of-data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data signal HIGH to enable the master to generate the STOP condition.

Figure 3. Data Transfer On 2-Wire Serial Bus Figures 4 and 5 detail how data transfer is accomplished on the 2-wire bus. byte. Data is transferred with the most significant bit (MSB) first.

DS4000 Digitally Controlled TCXO 14 of 16 SELECTOR GUIDE PART TEMP RANGE PIN-PACKAGE TOP MARK FREQUENCY DESIGNATOR (MHz) DS4000A0/WBGA 0°C to +70°C 24 BGA DS4000A0 10.00000 DS4000A0N/WBGA -40°C to +85°C 24 BGA DS4000A0 ###XX N 10.00000 DS4000CW/WBGA 0°C to +70°C 24 BGA DS4000CW 12.80000 DS4000CWN/WBGA -40°C to +85°C 24 BGA DS4000CW ###XX N 12.80000 DS4000D0/WBGA 0°C to +70°C 24 BGA DS4000D0 13.00000 DS4000D0N/WBGA -40°C to +85°C 24 BGA DS4000D0 ###XX N 13.00000 DS4000EC/WBGA 0°C to +70°C 24 BGA DS4000EC 14.31818 DS4000ECN/WBGA -40°C to +85°C 24 BGA DS4000EC ###XX N 14.31818 DS4000G0/WBGA 0°C to +70°C 24 BGA DS4000G0 16.00000 DS4000G0N/WBGA -40°C to +85°C 24 BGA DS4000G0 ###XX N 16.00000 DS4000GF/WBGA 0°C to +70°C 24 BGA DS4000GF 16.38400 DS4000GFN/WBGA -40°C to +85°C 24 BGA DS4000GF ###XX N 16.38400 DS4000GW/WBGA 0°C to +70°C 24 BGA DS4000GW 16.80000 DS4000GWN/WBGA -40°C to +85°C 24 BGA DS4000GW ###XX N 16.80000 DS4000KI/WBGA 0°C to +70°C 24 BGA DS4000KI 19.44000 DS4000KIN/WBGA -40°C to +85°C 24 BGA DS4000KI ###XX N 19.44000

DS4000 Digitally Controlled TCXO 15 of 16

PACKAGE INFORMATION

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) NOTE: THE BGA IS SOLDER-MASKED DEFINED.

DS4000 Digitally Controlled TCXO Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Ma xim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specification s without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products /g183 Printed USA 16 of 16 PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) PAD: 0.85mm SOLDERMASK: 0.60mm 1.27 1.27 8.89 DIMENSIONS IN MILLIMETERS