DS2740U/R

DS2740 DALLAS | Alldatasheet

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Technical content

FEATURES

/g167 15-Bit Bidirectional Current Measurement (DS2740) /g167 1.56/g109V LSB and ±51.2mV Dynamic Range /g167 78/g109A LSB and ±2.56A Dynamic Range with External 20m/g87 Sense Resistor (RSNS) /g167 156/g109A LSB and ±5.12A Dynamic Range with External 10m/g87 Sense Resistor (RSNS) /g167 13-Bit Bidirectional Current Measurement (DS2740B) /g167 6.25/g109V LSB and ±51.2mV Dynamic Range /g167 312/g109A LSB and ±2.56A Dynamic Range with External 20m/g87 Sense Resistor (RSNS) /g167 625/g109A LSB and ±5.12A Dynamic Range with External 10m/g87 Sense Resistor (RSNS) /g167 Analog Input Filter (IS1, IS2) Extends Dynamic Range for Pulse-Load

Applications

/g167 Current Accumulation Register Resolution /g167 6.25/g109Vhr (Both DS2740 and DS2740B) /g167 0.3125mAhr with External 20m/g87 R SNS /g167 0.6250mAhr with External 10m/g87 RSNS /g167 Dallas 1-Wire® Interface /g167 Unique 64-Bit Device Address /g167 Standard and Overdrive Timings (OVD) /g167 Low Power Consumption: /g167 Active Current: 65/g109A max /g167 Sleep Current: 1/g109A max PIN CONFIGURATION PIN DESCRIPTION OVD- 1-Wire Bus Speed Select PIO - Programmable I/O Pin SNS - Sense Resistor Input IS2 - Current-Sense Input IS1 - Current-Sense Input V SS - Device Ground, Current-Sense Resistor Return DQ - Data Input/Output V DD - Power-Supply Input (2.7V to 5.5V) DS2740 High-Precision Coulomb Counter www.maxim-ic.com /g109MAX (DS2740U, DS2740BU) PIO VDD DQ VSS IS1IS2 SNS OVD See Table 1 for Ordering Information. See Table 2 for Detailed Pin Descriptions. 1-Wire is a registered trademark of Dallas Semiconductor.

Table 1. ORDERING INFORMATION

DESCRIPTION

The DS2740 provides high-precision current-flow measurement data to support battery-capacity monitoring in cost-sensitive applications. Current is measured bidirectionally over a dynamic range of 15 bits (DS2740U) or 13 bits (DS2740UB), with the net flow accumulated in a separate 16-bit register. Through its 1-Wire interface, the DS2740 allows the hos t system read/write access to status and current measurement registers. Each device has a unique fa ctory-programmed 64-bit net address that allows it to be individually addressed by the host system, suppor ting multibattery slot operation. The interface can be operated with standard or overdrive timing. Although the DS2740 is primarily intended for location on the host system, it is also suited for mounting in the battery pack. The DS2740 and FuelPack™ algorithms, along with host measurements of temperature and voltage, form a complete and accurate solution for estimating remaining capacity. Figure 1. BLOCK DIAGRAM FuelPack is a trademark of Dallas Semiconductor.

Table 2. DETAILED PIN DESCRIPTION registers. Open-drain output sufficient for LED or vibrator activation. allow filtering of the current waveform by an external capacitor. filtering of the current waveform through an external capacitor. the negative terminal of the battery cell. Data I/O Pin. Operates bidirectionally with open-drain output driver. Figure 2. APPLICATION EXAMPLE

correction occurs approximately once per hour in the DS2740 and four times per hour in the DS2740B. the ACR. Figure 4 describes the ACR address, format, and resolution. Figure 4. CURRENT ACCUMULATOR FORMAT

command to prevent updates during the read and ensure synchronization between the two register bytes. Table 3. MEMORY MAP

00 Reserved —

01 Status Register R

08 Special Feature Register R/W

10 Accumulated Current Register MSB R/W

11 Accumulated Current Register LSB R/W

Figure 5. STATUS REGISTER FORMAT 2s. A value of 0 disables DQ related transitions to sleep mode. The power-up default of SMOD = 0. command to 33h, while a 1 sets the opcode to 39h. The power-up default of RNAOP = 0.

register contains the CRC value. Figure 8. 1-WIRE CRC GENERATION BLOCK DIAGRAM separate output and input pins can be connected together. the bus begin to interpret the low period as a reset pulse, effectively terminating the transaction. listed in the Electrical Characteristics: 1-Wire Interface tables.

Figure 9. 1-WIRE BUS INTERFACE CIRCUITRY The sections that follow describe each of these steps in detail. the bus and ready to operate. For more details, see the 1-Wire Signaling section. RNAOP = 0 indicating 33h, and RNAOP = 1 indicating 39h. one or more slave devices on the bus.

when all slaves transmit data at the same time. simultaneously responding to the Resume command function. Table 4. The name of each function is followed by the 8-bit opcode for that command in square brackets. of the data at address XX + 1 is available to be read immediately after the MSb of the data at address XX. If the bus master continues to read beyond ad dress FFh, the DS2740 starts over at address 00h. terminated by the bus master with a reset pulse at any bit boundary. the bus master continues to wr ite beyond address FFh, the DS2740 st arts over writing at address 00h. the Memory section for more details. iButton is a registered trademark of Dallas Semiconductor.

Figure 10. NET ADDRESS COMMAND FLOW CHART

1 BYTE

6 BYTES

recovery time, tREC, between cycles. See Figure 12 for more information. Figure 12. 1-WIRE WRITE- AND READ-TIME SLOTS

ABSOLUTE MAXIMUM RATINGS* Voltage on VDD, DQ, IS1, IS2, PIO, Relative to VSS -0.3V to +6V Voltage on SNS, Relative to VSS -0.3V to +6V Operating Temperature Range -40°C to +85°C Storage Temperature Range -55°C to +125°C Soldering Temperature See IPC/JEDECJ-STD-020A * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (2.7V /g163 VDD /g163 5.5V; TA = 0/g176C to +70/g176C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage V DD (Note 1) 2.7 5.5 V Data Pin DQ (Note 1) -0.3 +5.5 V DC ELECTRICAL CHARACTERISTICS (2.7V /g163 VDD /g163 4.2V; TA = 0/g176C to +70/g176C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 50 65Active Current I ACTIVE VDD = 5.5V 85 /g109A VDD = 2.0V, DQ = PIO = VSS 0.6 1.0 Sleep-Mode Current I SLEEP VDD = 4.2V, DQ = PIO = VSS 0.9 1.25 /g109A Undervoltage Sleep Threshold VUV 2.3 2.5 2.7 V DS2740 1.56Current Resolution I LSB DS27640B 6.25 /g109V Current Full-Scale Magnitude IFS 51.2 mV DS2740 (Note 2) -3 +1 +5Current Measurement Offset (Auto Calibrated) I OERR DS2740B (Note 2) -2 0 +2 LSb Current Gain Error I GERR -1 +1 % of reading Accumulated Current Resolution q CA 6.25 /g109Vh Current Sample Clock Frequency fSAMP 18.6 kHz VDD = 3.5V at +25°C -1 +1Timebase Accuracy t ERR -4 +4 % Input Logic High: OVD VIH (Note 1) VDD - 0.2V V Input Logic High: DQ, PIO VIH (Note 1) 1.5 V Input Logic Low: OVD VIL (Note 1) VSS + 0.2 V

Input Logic Low: DQ, PIO VIL (Note 1) 0.6 V Output Logic Low: DQ, PIO VOL IOL = 4mA (Note 1) 0.4 V DQ, PIO Input Pulldown Current IPD VDD = 4.2V, VDQ = 0.4V 0.5 /g109A OVD Input Leakage IL OVD PIO bit = 1 -1 1 /g109A DQ Capacitance C DQ 50 pF DQ Low to Sleep Time t SLEEP (Note 3) 2.0 2.4 s ELECTRICAL CHARACTERISTICS: 1-WIRE INTERFACE—STANDARD SPEED (2.7V /g163 VDD /g163 5.5V; TA = -20/g176C to +70/g176C.) PARAMETER SYMBOL MIN TYP MAX UNITS Time Slot t SLOT 60 120 /g109s Recovery Time t REC 1 /g109s Write 0 Low Time t LOW0 60 120 /g109s Write 1 Low Time t LOW1 11 5 /g109s Read Data Valid t RDV 15 /g109s Reset Time High t RSTH 480 /g109s Reset Time Low t RSTL 480 960 /g109s Presence Detect High t PDH 15 60 /g109s Presence Detect Low t PDL 60 240 /g109s ELECTRICAL CHARACTERISTICS: 1-WIRE INTERFACE—OVERDRIVE SPEED (2.7V /g163 VDD /g163 5.5V; TA = -20/g176C to +70/g176C.) PARAMETER SYMBOL MIN TYP MAX UNITS Time Slot t SLOT 61 6 /g109s Recovery Time t REC 1 /g109s Write 0 Low Time t LOW0 61 6 /g109s Write 1 Low Time t LOW1 12 /g109s Read Data Valid t RDV 2 /g109s Reset Time High t RSTH 48 /g109s Reset Time Low t RSTL 48 80 /g109s Presence Detect High t PDH 26 /g109s Presence Detect Low t PDL 82 4 /g109s Note 1: All voltages are referenced to VSS. Note 2: Offset performance requires proper circuit layout design free of surface contaminants. Note 3: The DS2740 enters the sleep mode 2.0s to 2.4s after DQ goes low.