DS2016 DALLAS | Alldatasheet

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Technical content

FEATURES

§ Low-power CMOS design § Standby current − 50 nA max at tA = 25°C VCC = 3.0V − 100 nA max at tA = 25°C VCC = 5.5V − 1 µA max at tA = 60°C VCC = 5.5V § Full operation for VCC = 5.5V to 2.7V § Data retention voltage = 5.5V to 2.0V § Fast 5V access time − DS2016 - 100 100 ns − DS2016 - 150 150 ns § Reduced-speed 3V access time − DS2016 - 100 250 ns − DS2016 - 150 250 ns § Operating temperature range of -40°C to +85°C § Full static operation § TTL compatible inputs and outputs over voltage range of 5.5V to 2.7 volts. § Available in 24-pin DIP and 24-pin SOIC packages § Suitable for both battery operated and battery backup applications PIN ASSIGNMENT PIN DESCRIPTION A0 - A10 - Address Inputs DQ0 - DQ7 - Data Input/Output CE - Chip Enable Input WE - Write Enable Input OE - Output Enable Input VCC - Power Supply Input 2.7V - 5.5V GND - Ground

DESCRIPTION

The DS2016 2k x 8 3V/5V Operation Static RAM is a 16,384-bit, low-power, fully static random access memory organized as 2048 words by 8 bits using CMOS technology. The device operates from a single power supply with a voltage input between 2.7 and 5.5 volts. The chip enable input ( CE ) is used for device selection and can be used in order to achieve the minimum standby current mode, which facilitates both battery operated and battery backup applications. The device provides access times as fast as 100 ns when operated from a 5-volt power supply input and also provides relatively good performance of 250 ns access while operating from a 3-volt input. The device maintains TTL-level inputs and outputs over the input voltage range of 2.7 to 5.5 volts. The DS2016 is most suitable for low-power applications where battery operation or battery backup for nonvolatility is required. The DS2016 is a JEDEC-standard 2k x 8 SRAM and is pin-compatible with ROM and EPROM of similar density. DS2016 2k x 8 3V/5V Operation Static RAM www.dalsemi.com 12 13 VCC WE OE A10 CE DQ7 DQ6 DQ5 DQ4 DQ3 DQ0 DQ1 DQ2 GND DS2016 24-Pin DIP (600-mil) DS2016R 24-Pin SOIC (300-mil)

MODE CE OE WE A0-A10 DQ-DQ7 POWER READ L L H STABLE DATA OUT ICCO WRITE L X L STABLE DATA IN ICCO DESELECT L H H X HIGH-Z ICCO STANDBY H X X X HIGH-Z ICCS ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING VCC Power Supply Voltage -0.3V to +7.0V VIN , VI/O Input, Input/Output Voltage -0.3 to VCC +0.3V TSTG Storage Temperature -55°C to +125°C TOPR Operating Temperature -40°C to +85°C TSOLDER Soldering Temperature/Time 260 °C for 10 seconds CAPACITANCE (TA= 25°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Capacitance CIN 5 10 pF Input/Output Capacitance CI/O 5 12 pF +5-VOLT OPERATION RECOMMENDED DC OPERATING CONDITIONS (TA= -40°C to +85°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Power Supply Voltage VCC 4.5 5.0 5.5 V Input High Voltage VIH 2.0 VCC+0.3 V Input Low Voltage VIL -0.3 0.8 V Data Retention Voltage VDR 2.0 5.5 V DC CHARACTERISTICS (TA= -40°C to +85°C; VCC = 5V ± 10%) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Leakage Current IIL 0V ≤ VIN ≤ VCC ± 0.1 µA I/O Leakage Current ILO CE = VIH, 0V ≤ VIO ≤ VCC ± 0.5 µA Output High Current IOH VOH = 2.4V -1.0 mA Output Low Current IOL VOL = 0.4V 4.0 mA Standby Current ICCS1 CE = 2.0V 0.3 mA Standby Current ICCS2 CE ³ VCC -0.5V tA =60°C 1 µA Standby Current ICCS2 CE ³ VCC -0.5V tA =25°C 100 nA Operating Current ICCO CE = 0.8V, 200 ns cycle 55 mA

AC CHARACTERISTICS READ CYCLE (TA= -40°C to +85°C; VCC = 5V ± 10%) DS2016-100 DS2016-150PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX UNITS NOTES Read Cycle Time tRC 100 150 ns Access Time tACC 100 150 ns OE to Output Valid tOE 50 70 ns CE to Output Valid tCO 100 150 ns CE or OE to Output Active tCOE 5 5 ns Output High-Z from Deselection tOD 5 35 10 60 ns Output Hold from Address Change tOH 5 10 ns AC CHARACTERISTICS WRITE CYCLE (TA= -40°C to +85°C; VCC = 5V± 10%) DS2016-100 DS2016-150PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX UNITS NOTES Write Cycle Time tWC 100 150 ns Write Pulse Width tWP 75 120 ns Address Setup Time tAW 0 0 ns Write Recovery Time tWR 10 10 ns Output High-Z from WE tODW 35 70 ns Output Active from WE tOEW 5 5 ns Data Setup Time tDS 40 60 ns Data Hold Time tDH 0 0 ns DATA RETENTION CHARACTERISTICS (TA = -40°C to +85°C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Data Retention Supply Voltage VDR CE ³ VCC - 0.5V 2.0 5.5 V Data Retention Current at 5.5V ICCR1 CE ³ VCC - 0.5V 0.1* 1 µA Data Retention Current at 2.0V ICCR2 CE ³ VCC - 0.5V 50* 750 nA Chip Deselect to Data Retention tCDR 0 µs Recovery Time tR 2 ms * Typical values are at 25°C

+3-VOLT OPERATION RECOMMENDED DC OPERATING CONDITIONS (TA = -40°C to +85°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Power Supply Voltage VCC 2.7 3.0 3.5 V Input High Voltage VIH 2.0 VCC + 0.3 V Input Low Voltage VIL -0.3 0.6 V Data Retention Voltage VDR 2.0 3.5 V DC CHARACTERISTICS (TA = -40°C to +85°C; VCC = 2.7V to 3.5V) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Leakage Current IIL 0V ≤ VIN ≤ VCC ±0.1 µA I/O Leakage Current ILO CE =VIH, 0V≤ VIO≤ VCC ±0.5 µA Output High Current IOH VOH = 2.2V -0.5 mA Output Low Current IOL VOL = 0.4V 4.0 mA Standby Current ICCS1 CE = 2.0V 0.1 mA Standby Current ICCS2 CE ≥ VCC-0.3V TA=60°C 500 nA Standby Current ICCS2 CE ≥ VCC-0.3V TA=25°C 50 nA Operating Current ICCO CE =0.6V min cycle 25 mA AC CHARACTERISTICS READ CYCLE (TA = -40°C to +85°C; VCC = 2.7V to 3.5V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Read Cycle Time tRC 250 ns Access Time tACC 250 ns OE to Output Valid tOE 120 ns CE to Output Valid tCO 250 ns CE or OE to Output Active tCOE 15 ns Output High-Z from Deselection tOD 5 100 ns Output Hold from Address Change tOH 15 ns

AC CHARACTERISTICS WRITE CYCLE (TA = -40°C to +85°C; VCC = 2.7V to 3.5V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Write Cycle Time tWC 250 ns Write Pulse Width tWP 190 ns Address Setup Time tAW 0 ns Write Recovery Time tWR 25 ns Output High-Z from WE tODW 90 ns Output Active from WE tOEW 5 ns Data Setup Time tDS 100 ns Data Hold Time tDH 0 ns DATA RETENTION CHARACTERISTICS (TA = -40°C to +85°C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Data Retention Supply Voltage VDR CE ≥ VCC - 0.3V 2.0 3.5 V Data Retention Current at 3.5V ICCR1 CE ≥ VCC - 0.3V 50* 1000 nA Data Retention Current at 2.0V ICCR2 CE ≥ VCC - 0.3V 50* 750 nA Chip Deselect to Data Retention tCDR 0 µs Recovery Time tR 2 ms * Typical values are at 25°C TIMING DIAGRAM: READ CYCLE SEE NOTE 1

TIMING DIAGRAM: WRITE CYCLE 1 SEE NOTES 2, 3, 4, 5, 6 AND 7 TIMING DIAGRAM: WRITE CYCLE 2 SEE NOTES 2, 3, 4, 5, 6 AND 7

TIMING DIAGRAM: DATA RETENTION - POWER-UP, POWER-DOWN Figure 1 SEE NOTE 8 NOTES: 1. WE is high for read cycles. 2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high impedance state. 3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE going low to the earlier of CE or WE going high. 4. tDH and tDS are measured from the earlier of CE or WE going high. 5. If the CE low transition occurs simultaneously with or later than the WE low transition, the output buffers remain in a high impedance state. 6. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output buffers remain in a high impedance state. 7. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high impedance state. 8. If the V IH level of CE is 2.0V during the period that V CC voltage is going down from 4.5V to 2.7V, ICCS1 current flows. 9. The DS2016 maintains full operation from 5.5V to 2.7V. The electrical characteristics tables show two tested and guaranteed points of operation. For operation between 4.5V and 3.5 volts, use the composite worst case characteristics from both 5V and 3V operation for design purposes. DC TEST CONDITIONS Outputs Open All voltages are referenced to ground. AC TEST CONDITIONS Output Load: 100 pF + 1TTL Gate Input Pulse Levels: 0V - 3.0V Timing Measurement Reference Levels Input: 1.5V Output: 1.5V Input Pulse Rise and Fall Times: 5 ns

A IN. MM 1.245 31.62 1.270 32.25 B IN. MM 0.530 13.46 0.550 13.97 C IN. MM 0.140 3.56 0.160 4.06 D IN. MM 0.600 15.24 0.625 15.88 E IN. MM 0.015 0.380 0.050 1.27 F IN. MM 0.120 3.05 0.145 3.68 G IN. MM 0.090 2.29 0.110 2.79 H IN. MM 0.625 15.88 0.675 17.15 J IN. MM 0.008 0.20 0.012 0.30 K IN. MM 0.015 0.38 0.022 0.56

A IN. MM 0.094 2.38 0.105 2.68 A1 IN. MM 0.004 0.102 0.012 0.30 b IN. MM 0.013 0.33 0.020 0.51 C IN. MM 0.009 0.229 0.013 0.33 D IN. MM 0.598 15.19 0.612 15.54 e IN. MM

0.050 BSC

1.27 BSC

E1 IN. MM 0.290 7.37 0.300 7.62 H IN. MM 0.398 10.11 0.416 10.57 L IN. MM 0.016 0.40 0.040 1.02 a 0° 8° The chamfer on the body is optional. If it is not present, a terminal 1 identifier must be positioned so that ½ or more of its area is contained in the hatched zone.