DS1556WP-120IND

DS1556 DALLAS | Alldatasheet

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Technical content

1 of 20 REV: 101804 Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.

FEATURES

/g167/g32Integrated NV SRAM, Real-Time Clock (RTC), Crystal, Power-Fail Control Circuit, and Lithium Energy Source /g167/g32Clock Registers are Accessed Identically to the Static RAM; These Registers Reside in the 16 Top RAM Locations /g167/g32Century Byte Register (i.e., Y2K Compliant) /g167/g32Totally Nonvolatile with Over 10 Years of Operation in the Absence of Power /g167/g32Precision Power-On Reset /g167/g32Programmable Watchdog Timer and RTC Alarm /g167/g32BCD-Coded Year, Month, Date, Day, Hours, Minutes, and seconds with Automatic Leap- Year Compensation Valid Up to the Year 2100 /g167/g32Battery Voltage-Level Indicator Flag /g167/g32Power-Fail Write Protection Allows for /g17710% V CC Power-Supply Tolerance /g167/g32Lithium Energy Source is Electrically Disconnected to Retain Freshness Until Power is Applied for the First Time /g167/g32Also Available in Industrial Temperature Range: -40°C to +85°C PIN CONFIGURATIONS DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM www.maxim-ic.com RST VCC A15 IRQ/FT WE A13 A11 OE A10 CE DQ7 DQ5 DQ6 DQ4 DQ3 A14 DQ1 DQ0 A16 A12 DQ2 GND Encapsulated DIP Dallas Semiconductor DS1556 TOP VIEW IRQ/FT 1 A15 A16 RST VCC OE CE DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 GND N.C. A14 A13 A12 A11 A10 34 N.C. X1 GND VBAT X2 PowerCap® Module Board (Uses DS9034PCX PowerCap) WE Dallas Semiconductor DS1556 PowerCap is a registered trademark of Dallas Semiconductor.

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 2 of 20 PIN DESCRIPTION A0–A16 - Address Input DQ0–DQ7 - Data Input/Outputs IRQ/FT - Interrupt, Frequency Test Output (Open Drain) RST - Power-On Reset Output (Open Drain) CE - Chip Enable OE - Output Enable WE - Write Enable V CC - Power Supply Input GND - Ground N.C. - No Connection X1, X2 - Crystal Connection V BAT - Battery Connection

ORDERING INFORMATION

(V) PIN-PACKAGE TOP MARK DS1556-70 0°C to +70°C 5 32 EDIP (0.740a) DS1556-070 DS1556-70IND -40°C to +85°C 5 32 EDIP (0.740a) DS1556-070 IND DS1556P-70 0°C to +70°C 5 34 PowerCap DS1556P-070 DS1556P-70IND -40°C to +85°C 5 34 PowerCap DS1556P-070 IND DS1556W-120 0°C to +70°C 3.3 32 EDIP (0.740a) DS1556W-120 DS1556W-120IND -40°C to +85°C 3.3 32 EDIP (0.740a) DS1556W-120 IND DS1556WP-120 0°C to +70°C 3.3 34 PowerCap DS1556WP-120 DS1556WP-120IND -40°C to +85°C 3.3 34 PowerCap DS1556WP-120 IND

DESCRIPTION

The DS1556 is a full-function, year-2000-compliant (Y 2KC), real-time clock/cal endar (RTC) with an RTC alarm, watchdog timer, power-on reset, battery monitor, and 128k x 8 nonvolatile static RAM. User access to all registers within the DS1556 is accomplished with a byte-wide interface as shown in Figure 1. The RTC registers contain century, year, month, date , day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for day of month and leap year are made automatically. The RTC registers are double-buffered into an internal an d external set. The user has direct access to the external set. Clock/calendar updates to the external set of registers can be disabled and enabled to allow the user to access static data. Assuming the internal oscillator is turned on, the internal set of registers is continuously updated, which occurs regardless of extern al registers settings to guarantee that accurate RTC information is always maintained.

during unpredictable system operation brought on by low VCC levels. Figure 1. Block Diagram

Table 1. Operating Modes transition on WE will then disable the outputs tWEZ after WE goes active. The 5V device is fully accessible and data can be written and read only when V CC is greater than V PF.

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 5 of 20 BATTERY LONGEVITY The DS1556 has a lithium power source that is designed to provide energy for the clock activity, and clock and RAM data retention when the V CC supply is not present. The capability of this internal power supply is sufficient to power the DS1556 continuously for the life of the equipment in which it is installed. For specification purposes, th e life expectancy is 10 years at 25 /g176C with the internal clock oscillator running in the absence of V CC. Each DS1556 is shipped from Dallas Semiconductor with its lithium energy source disconnected, guaranteeing full energy capacity. When V CC is first applied at a level greater than V PF, the lithium energy source is enabled for battery backup ope ration. Actual life expectancy of the DS1556 will be much longer than 10 years since no internal battery energy is consumed when VCC is present. INTERNAL BATTERY MONITOR The DS1556 constantly monitors the ba ttery voltage of the internal ba ttery. The Battery Low Flag (BLF) bit of the Flags Register (B4 of 1FFF0h) is not writable and should always be a 0 when read. If a 1 is ever present, an exhausted lithium energy source is indicated and both the contents of the RTC and RAM are questionable. POWER-ON RESET A temperature compensated comparator circuit monitors the level of V CC. When V CC falls to the power fail trip point, the RST signal (open drain) is pulled low. When V CC returns to nominal levels, the RST signal continues to be pulled low for a period of 40 ms to 200 ms. The power-on reset function is independent of the RTC oscillator and thus is operational whether or not the oscillator is enabled. CLOCK OPERATIONS Table 2 and the following paragraphs describe the operation of RTC, alarm, and watchdog functions.

Table 2. Register Map ensure the external registers will be updated.

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 7 of 20 SETTING THE CLOCK The MSB bit, B7, of the Control Register is the write bit. Setting the write bit to a 1, like the read bit, halts updates to the DS1556 (1FFF8h to 1FFFFh) regi sters. After setting the write bit to a 1, RTC Registers can be loaded with the desired RTC count (day, date, and time) in 24-hour BCD format. Setting the write bit to a 0 then transfers the values written to the internal RTC Registers and allows normal operation to resume. CLOCK ACCURACY (DIP MODULE) The DS1556 is guaranteed to keep time accuracy to within /g1771 minute per month at 25 /g176C. The RTC is calibrated at the factory by Dallas Semiconductor using nonvolatile tuning elements, and does not require additional calibration. For this r eason, methods of field clock calib ration are not available and not necessary. The electrical environment also affects clock accuracy, and caution should be taken to place the RTC in the lowest-level EMI section of the PC board layout. For additional information, please refer to Application Note 58. CLOCK ACCURACY (PowerCap MODULE) The DS1556 and DS9034PCX are each i ndividually tested for accuracy. Once mounted together, the module will typically keep time accuracy to within /g1771.53 minutes per month (35 ppm) at 25°C. The electrical environment also affects clock accuracy, and caution should be taken to place the RTC in the lowest-level EMI section of the PC board layout . For additional information, please refer to Application Note 58. FREQUENCY TEST MODE The DS1556 frequency test mode uses the open drain IRQ/FT output. With the oscillator running, the IRQ/FT output will toggle at 512 Hz when the FT bit is a 1, the Alarm Flag Enable bit (AE) is a 0, and the Watchdog Steering bit (WDS) is a 1 or the Watchdo g Register is reset (Register 1FFF7h = 00h). The IRQ/FT output and the frequency test mode can be used as a measure of the actual frequency of the 32.768 kHz RTC oscillator. The IRQ/FT pin is an open-drain output that requires a pullup resistor for proper operation. The FT bit is cleared to a 0 on power-up. USING THE CLOCK ALARM The alarm settings and control for the DS1556 resi de within Registers 1F FF2h to 1FFF5h. Register 1FFF6h contains two alarm enable bits: Alarm Enable (AE) and Alarm in Backup Enable (ABE). The AE and ABE bits must be set as described below for the IRQ/FT output to be activated for a matched alarm condition. The alarm can be programmed to activate on a specific day of the month or repeat every day, hour, minute, or second. It can also be programmed to go off while the DS1556 is in the battery-backed state of operation to serve as a system wake-up. Alarm mask bits AM1 to AM4 control the alarm mode. Table 3 shows the possible settings. Configura tions not listed in the table defau lt to the once per second mode to notify the user of an incorrect alarm setting.

timing during the battery-backup mode and power-up states. Figure 4. Backup Mode Alarm Waveforms or the Watchdog Register (1FFF7h) is read or written. the watchdog will activate the IRQ/FT output when the watchdog times out. watchdog timeout when the WDS bit is set to a 1. function is activated, the watchdog function prevails and the frequency test function is denied.

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 10 of 20 ABSOLUTE MAXIMUM RATINGS for Surface-Mount Devices This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. OPERATING RANGE RANGE TEMP RANGE V CC Commercial 0°C to +70°C 3.3V /g17710% or 5V /g17710% Industrial -40°C to +85°C 3.3V /g17710% or 5V /g17710% RECOMMENDED DC OPERATING CONDITIONS (Over the Operating Range) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VIH VCC = 5V /g17710% 2.2 VCC + 0.3V V Logic 1 Voltage All Inputs (Note 1) VIH VCC = 3.3V /g17710% 2.0 VCC + 0.3V V VIL VCC = 5V /g17710% -0.3 +0.8 Logic 0 Voltage All Inputs (Note 1) VIL VCC = 3.3V /g17710% -0.3 +0.6 DC ELECTRICAL CHARACTERISTICS (VCC = 5.0V /g17710%, Over the Operating Range.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Active Supply Current I CC (Notes 2, 3) 30 85 mA TTL Standby Current (CE = VIH) ICC1 (Notes 2, 3) 4 6 mA CMOS Standby Current (CE /g179/g32VCC - 0.2V) ICC2 (Notes 2, 3) 2 6 mA Input Leakage Current (Any Input) IIL -1 +1 /g109A Output Leakage Current (Any Output) IOL -1 +1 /g109A Output Logic 1 Voltage (IOUT = -1.0 mA) VOH (Note 1) 2.4 V VOL1 IOUT = 2.1 mA, DQ0–7 Outputs (Note 1) 0.4 V Output Logic 0 Voltage VOL2 IOUT = 7.0 mA, IRQ/FT, and RST Outputs (Notes 1, 5) 0.4 V Write Protection Voltage V PF (Note 1) 4.20 4.50 V Battery Switchover Voltage V SO (Notes 1,4) V BAT V

Figure 5. Read Cycle Timing Diagram

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 12 of 20 AC CHARACTERISTICS—READ CYCLE (Over the Operating Range) VCC = 5.0V /g17710% V CC = 3.3V /g17710% PARAMETER SYMBOL MIN MAX MIN MAX UNITS Read Cycle Time t RC 70 120 ns Address Access Time t AA 70 120 ns CE to DQ Low-Z t CEL 5 5 ns CE Access Time t CEA 70 120 ns CE Data Off Time t CEZ 25 40 ns OE to DQ Low-Z t OEL 5 5 ns OE Access Time t OEA 35 100 ns OE Data Off Time t OEZ 25 35 ns Output Hold from Address t OH 5 5 ns AC CHARACTERISTICS—WRITE CYCLE (Over the Operating Range) VCC = 5.0V /g17710% V CC = 3.3V /g17710% PARAMETER SYMBOL MIN MAX MIN MAX UNITS Write Cycle Time t WC 70 120 ns Address Access Time t AS 0 0 ns WE Pulse Width t WEW 50 100 ns CE Pulse Width t CEW 60 110 ns Data Setup Time t DS 30 80 ns Data Hold Time (Note 9) t DH1 5 5 ns Data Hold Time (Note 10) t DH2 5 5 ns Address Hold Time (Note 9) t AH1 5 0 ns Address Hold Time (Note 10) tAH2 5 5 ns WE Data Off Time t WEZ 25 40 ns Write Recovery Time t WR 5 10 ns

Figure 8. Power-Up/Down Waveform Timing (5V Device)

Figure 9. Power-Up/Down Waveform Timing (3.3V Device)

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 16 of 20 AC TEST CONDITIONS Output Load: 50 pF + 1TTL Gate Input Pulse Levels: 0.0 to 3.0V Timing Measurement Reference Levels: Input: 1.5V Output: 1.5V Input Pulse Rise and Fall Times: 5 ns NOTES: 1. Voltage referenced to ground. 2. Typical values are at +25 /g176C and nominal supplies. 3. Outputs are open. 4. Battery switchover occurs at the lower of either the battery voltage or V PF. 5. The IRQ/FT and RST outputs are open drain. 6. Data-retention time is at +25 /g176C. 7. Each DS1556 has a built-in switch that disconnects the lithium source until V CC is first applied by the user. The expected tDR is defined for DIP modules and PowerCap modules as a cumulative time in the absence of VCC starting from the time power is first applied by the user. 8. RTC modules (DIP) can be successfully processe d through conventional wave-soldering techniques as long as temperature exposure to the lithium en ergy source contained within does not exceed +85/g176C. Post-solder cleaning with water-washing techniques is accept able, provided that ultrasonic vibration is not used. In addition, for the PowerCap: a. Dallas Semiconductor recommends that PowerCap Module bases experience one pass through solder reflow oriented with the label side up (“live-bug”). b. Hand soldering and touch-up: Do not touch or a pply the soldering iron to leads for more than 3 seconds. To solder, apply flux to the pad, heat the lead frame pad and apply solder. To remove the part, apply flux, heat the lead frame pad until the solder reflow and use a solder wick to remove solder. 9. t AH1, tDH1 are measured from WE going high. 10. tAH2, tDH2 are measured from CE going high.

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 17 of 20

PACKAGE INFORMATION

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) PKG 32-PIN DIM MIN MAX A IN. MM 1.670 38.42 1.690 38.93 B IN. MM 0.715 18.16 0.740 18.80 C IN. MM 0.335 8.51 0.365 9.27 D IN. MM 0.075 1.91 0.105 0.67 E IN. MM 0.015 0.38 0.030 0.76 F IN. MM 0.140 3.56 0.180 4.57 G IN. MM 0.090 2.29 0.110 2.79 H IN. MM 0.590 14.99 0.630 16.00 J IN. MM 0.010 0.25 0.018 0.45 K IN. MM 0.015 0.38 0.025 0.64

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 18 of 20 PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) PKG INCHES DIM MIN NOM MAX A 0.920 0.925 0.930 B 0.980 0.985 0.990 C — — 0.080 D 0.052 0.055 0.058 E 0.048 0.050 0.052 F 0.015 0.020 0.025 G 0.025 0.027 0.030 NOTE: DALLAS SEMICONDUCTOR RECOMMENDS THAT POWERCAP MODULE BASES EXPERIENCE ONE PASS THROUGH SOLDER REFLO W ORIENTED WITH THE LABEL SIDE UP (“LIVE-BUG”). HAND SOLDERING AND TOUCH-UP: DO NOT TOUCH OR APPLY THE SOLDERING IRON TO LEADS FOR MORE THAN 3 SECONDS. TO SOLDER, APPLY FLUX TO THE PAD, HEAT THE LEAD FRAME PAD, AND APPL Y SOLDER. TO REMOVE THE PART, APPLY FLUX, HEAT THE LEAD FRAME PAD UNTIL THE SOLDER REFLOWS, AND USE A SOLDER WICK TO REMOVE SOLDER. DS1556P

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM 19 of 20 PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) DS1556P WITH DS9034PCX ATTACHED

DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Ma xim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specification s without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2004 Maxim Integrated Products /g183 Printed USA 20 of 20 PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) RECOMMENDED PowerCap MODULE LAND PATTERN