DM7490A FAIRCHILD | Alldatasheet

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■ Typical power dissipation 145 mW ■ Count frequency 42 MHz Ordering Code: Connection Diagram Order Number Package Number Package Description DM7490AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

www.fairchildsemi.com 2 DM7490A Function Tables BCD Count Sequence (Note 1) BCD Bi-Quinary (5-2) (Note 2) Reset/Count Function Table H = HIGH Level L = LOW Level X = Don't Care Note 1: Output QA is connected to input B for BCD count. Note 2: Output QD is connected to input A for bi-quinary count Logic Diagram The J and K inputs shown without connection are for reference only and are functionally at a HIGH level. Count Outputs Q D Q C Q B Q A

0 LLLL

8 HLLL

Q A Q D Q C Q B

5 HLLL

3 www.fairchildsemi.com DM7490A Absolute Maximum Ratings(Note 3) Note 3: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Note 4: TA = 25°C and VCC = 5V. over recommended operating free air temperature range (unless otherwise noted) Note 5: All typicals are at VCC = 5V, TA = 25°C. Note 6: Q A outputs are tested at IOL = Max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability. Note 7: Not more than one output should be shorted at a time. Note 8: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V, and all other inputs grounded. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Symbol Parameter Min Nom Max Units V CC Supply Voltage 4.75 5 5.25 V VIH HIGH Level Input Voltage 2 V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −0.8 mA IOL LOW Level Output Current 16 mA fCLK Clock Frequency A 0 32 MHz(Note 4) B 0 16 tW Pulse Width A 15 (Note 4) B 30 ns Reset 15 tREL Reset Release Time (Note 4) 25 ns TA Free Air Operating Temperature 0 70 °C Symbol Parameter Conditions Min Typ Max Units (Note 5) VI Input Clamp Voltage V CC = Min, II = −12 mA −1.5 V VOH HIGH Level V CC = Min, IOH = Max 2.4 3.4 V Output Voltage V IL = Max, VIH = Min VOL LOW Level V CC = Min, IOL = Max 0.2 0.4 V Output Voltage V IH = Min, VIL = Max (Note 6) II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA IIH HIGH Level V CC = Max A 80 Input Current V I = 2.7V Reset 40 µA B 120 IIL LOW Level V CC = Max A −3.2 Input Current V I = 0.4V Reset −1.6 mA B −4.8 IOS Short Circuit Output Current VCC = Max (Note 7) −18 −57 mA ICC Supply Current V CC = Max (Note 8) 29 42 mA

www.fairchildsemi.com 4 DM7490A AC Switching Characteristics at VCC = 5V and TA = 25°C Symbol Parameter From (Input) R L = 400Ω , CL = 15 pF Units To (Output) Min Max fMAX Maximum Clock A to Q A 32 MHz Frequency B to Q B 16 tPLH Propagation Delay Time A to QA 16 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time A to QA 18 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time A to QD 48 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time A to QD 50 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time B to QB 16 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time B to QB 21 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time B to QC 32 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time B to QC 35 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time B to QD 32 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time B to QD 35 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time SET-9 to QA, QD 30 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time SET-9 to QB, QC 40 ns HIGH-to-LOW Level Output tPHL Propagation Delay Time SET-0 40 ns HIGH-to-LOW Level Output Any Q

5 www.fairchildsemi.com DM7490A Decade and Binary Counters Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com