DG301AAA

DG300A TEMIC | Alldatasheet

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Technical content

V+ (Substrate and Case) IN1 NC GND NC V+ D 1 D 2 NC NC S1 S2 NC IN2IN1 NC GND V– Dual-In-Line 8Top View DG300A DG300A DG300A/301A/302A/303A Siliconix S-52880—Rev. C, 28-Apr-97 CMOS Analog Switches Features Benefits Applications Analog Signal Range: 15 V Fast Switching—tON : 150 ns Low On-Resistance—rDS(on): 30 Single Supply Operation Latch-up Proof CMOS Compatible Full Rail-to-Rail Analog Signal Range Low Signal Error Low Power Dissipation Low Level Switching Circuits Programmable Gain Amplifiers Portable and Battery Powered Systems

Description

The DG300A-DG303A family of monolithic CMOS switches feature three switch configuration options (SPST, SPDT, and DPST) for precision applications in communications, instrumentation and process control, where low leakage switching combined with low power consumption are required. Designed on the Siliconix PLUS-40 CMOS process, these switches are latch-up proof, and are designed to block up to 30 V peak-to-peak when off. An epitaxial layer prevents latchup. In the on condition the switches conduct equally well in both directions (with no offset voltage) and minimize error conditions with their low on-resistance. Featuring low power consumption (3.5 mW typ) these switches are ideal for battery powered applications, without sacrificing switching speed. Designed for break-before-make switching action, these devices are CMOS and quasi TTL compatible. Single supply operation is allowed by connecting the V– rail to 0 V . Functional Block Diagram and Pin Configuration Truth Table Logic Switch

0 OFF

Logic“0” 08VLogic “0” 0.8 VLogic 0 0.8 V Logic“1” 4VLogic “1” 4 VLogic 1 4 V Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70044.

GND V– Dual-In-Line NC V+ D 1 D 2 NC NC S1 S2 NC NCIN NC Top View Metal Can NC Top View D 2D 1 V+ (Substrate and Case) IN NC GND DG302A NC V+ S3 S4 D 3 D 4 D 1 D 2 S1 S2 IN1 IN2 GND V– Dual-In-Line Top View DG301A DG303A D 2 NC Dual-In-Line IN1 D 4 D 1 GND IN2 D 3 Top View DG300A/301A/302A/303A

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S-52880—Rev. C, 28-Apr-97 Functional Block Diagram and Pin Configuration (Cont’d) Truth Table Logic SW 1 SW 2

0 OFF ON

1 ON OFF

Logic “0” /C0118 0.8 V Logic “1” /C0119 4 VLogic 1 /C0119 4 V /C0104 /C0111/C0103 /C0104 Logic “0” /C0118 0.8 V Logic “1” /C0119 4 V Truth Table Logic SW 1, SW2 SW 3, SW4 Logic “0” /C0118 0.8 V Logic “1” /C0119 4 V

S-52880—Rev. C, 28-Apr-97

Ordering Information

Temp Range Package Part Number DG300A 0 to 70/C0095C 14-Pin Plastic DIP DG300ACJ –25 to 85/C0095C 14-Pin CerDIP DG300ABK –25 to 85/C0095C 10-Pin Metal Can DG300ABA DG300AAK 14-Pin CerDIP DG300AAK/883 –55 to 125/C0095C JM38510/11601BCA –55 to 125/C0095C 14-Pin Sidebraze JM38510/11601BCC 10-Pin Metal Can DG300AAA/883 10-Pin M etal C an JM38510/11601BIA DG301A 0 to 70/C0095C 14-Pin Plastic DIP DG301ACJ –25 to 85/C0095C 14-Pin CerDIP DG301ABK –25 to 85/C0095C 10-Pin Metal Can DG301ABA 14-Pin CerDIP DG301AAK/883 14-Pin C erDIP JM38510/11602BCA –55 to 125/C0095C 14-Pin Sidebraze JM38510/11602BCC –55 to 125/C0095C DG301AAA 10-Pin Metal Can DG301AAA/883 JM38510/11602BIA DG302A 0 to 70/C0095C 14-Pin Plastic DIP DG302ACJ DG302AAK –55 to 125/C0095C 14-Pin CerDIP DG302AAK/883 –55 to 125/C0095C JM38510/11603BCA 14-Pin Sidebraze JM38510/11603BCC DG303A 0 to 70/C0095C 14-Pin Plastic DIP DG303ACJ –25 to 85/C0095C 14-Pin CerDIP DG303ABK –45 to 85/C0095C 14-SOIC DG303ADY DG303AAK –55 to 125/C0095C 14-Pin CerDIP DG303AAK/883 –55 to 125/C0095C JM38510/11604BCA 14-Pin Sidebraze JM38510/11604BCC

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S-52880—Rev. C, 28-Apr-97 Absolute Maximum Ratings V oltages Referenced to V– 30 mA, whichever occurs first Continuous Current, S or D Power Dissipationb Notes: a. Signals on SX , DX , or INX exceeding V+ or V– will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 6.5 mW//C0095C above 25/C0095C d. Derate 11 mW//C0095C above 75/C0095C e. Derate 6 mW//C0095C above 75/C0095C Schematic Diagram (Typical Channel) Figure 1. Level Shift/ Drive V IN S GND D

S-52880—Rev. C, 28-Apr-97 Specificationsa Conditions Unless Other- wise Specified V1 5 V V 1 5 V A Suffix –55 to 125/C0095C B/C Suffix Parameter Symbol V IN = 0.8 V or VIN = 4 Vf Temp b Typ c Min d Max d Min d Max d Unit Analog Switch Analog Signal Rangee VANALOG Full –15 15 –15 15 V Drain-Source On-Resistance rDS(on) V D = 10 V , IS = –10 mA Room Full 30 50 /C0087 Source Off Leakage Current IS(off) V S = 14 V VD = /C003514 V Room Hot 0.1 –1 –100 100 –100 100 Drain Off Leakage Current ID(off) V S = 14 V, V D = /C003514 V Room Hot 0.1 –1 –100 100 –100 100 nA Drain On Leakage Current ID(on) V D = VS = 14 V Room Hot 0.1 –1 –100 100 –100 100 Digital Control Input Current with IV lH i h IINH V IN = 5 V Room Full –0.001 –1 p Input V oltage High IINH V IN = 15 V Room Full 0.001 1 1 /C0109A Input Current with Input V oltage Low IINL V IN = 0 V Room Full –0.001 –1 Dynamic Characteristics Turn-On Time tON See Figure 2 Room 150 300 Turn-Off Time tOFF See Figure 2 Room 130 250 ns Break-Before-Make Time tOPEN DG301A/303A Only Figure 3 Room 50 ns Charge Injection Q C L = 1 nF, Rgen = 0 /C0087 V gen = 0 V , Figure 4 Room 8 pC Source-Off Capacitance C S(off) Room 14 Drain-Off Capacitance C D(off) V S, VD = 0 V , f = 1 MHz Room 14 Channel-On Capacitance C D(on) Room 40 pF Input Capacitance C in f=1M H z V IN = 0 V Room 6 Input C apacitance C in f = 1 MH z V IN = 15 V Room 7 Off-Isolation OIRR V IN = 0 V , RL = 1 k/C0087 V 1 V f 500 kH Room 62 dBCrosstalk (Channel-to-Channel) X TALK IN , L V S = 1 Vrms, f = 500 kHz Room 74 dB Power Supplies Positive Supply Current I+ V IN = 4 V (One Input) All O h 0 V Room Full 0.23 0.5 1 mA Negative Supply Current I– IN (p ) All Others = 0 V Room Full –0.001 –10 –100 –100 Positive Supply Current I+ V IN = 0 8 V (All Inputs) Room Full 0.001 10 100 100 /C0109A Negative Supply Current I– V IN = 0.8 V (All Inputs) Room Full –0.001 –10 –100 –100 Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 /C0095C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY , not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. V IN = input voltage to perform proper function.

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S-52880—Rev. C, 28-Apr-97 Typical Characteristics rDS(on) vs. VD and Power Supply Charge Injection vs. Analog Voltage Switching Time and Break-Before-Make Time vs. Positive Supply Voltage rDS(on) vs. VD and Temperature rDS(on) vs. VD and Power Supply Voltage rDS(on) – Drain-Source On-Resistance ( ) DS(on) – Drain-Source On-Resistance ( ) rDS(on) – Drain-Source On-Resistance ( )Q (pC) (ns)tON ,tOFF V D – Drain V oltage (V) V D – Drain V oltage (V) V D – Drain V oltage (V) V S – Source V oltage (V) V+ – Positive Supply (V) –25 –15 –5 5 15 25 5 V TA = 25C –15 –10 –5 0 5 10 15 V+ = 15 V V– = –15 V 0 5 10 15 20 V– = 0 V TA = 25C –15 –10 –5 0 5 10 15 V+ = 15 V V– = –15 V C L = 1 nF 500 0 5 10 15 400 300 200 100 DG301/303 Only tOPEN tOFF tON V– = –15 V TA = 25/C0095C V INH = 4 V V INL = 0 V TA = 125/C0095C TA = 25/C0095C TA = –55/C0095C 8 V 10 V 12 V 15 V 20 V 100 7.5 V 10 V 15 V 20 V Input Switching Threshold vs. Positive Supply Voltage V+ – Positive Supply (V) (V)TV 51 01 5 V– = –15 V TA = 25/C0095C

S-52880—Rev. C, 28-Apr-97 Typical Characteristics (Cont’d) Supply Current vs. Temperature Leakage vs. Temperature Switching Time vs. Power Supply Voltage Off Isolation and Crosstalk vs. Frequency Supply Curents vs. Switching Frequency Temperature (/C0095C) f – Frequency (Hz) f – Frequency (Hz) Temperature (/C0095C) Supply V oltage (V) I+, I– (/C0109A) (dB) I+, I– (mA) IS Time (ns) –55 –35 –15 5 25 45 65 85 105 125 500 400 300 200 100 –100 –55 –35 –15 5 25 45 65 85 105 125 V+ = 15 V V– = –15 V V S, VD = 14 V 10 pA ID(on) ID(off) or IS(off)100 pA 1 nA 10 nA 100 nA –120 –20 10 k 100 k 1 M 10 M V+ = +15 V V– = –15 V R L= 50 Crosstalk Off Isolation –100 –80 –60 –40 V+ = 15 V V– = –15 V 1 k 10 k 100 k 1 M 400 350 300 250 200 150 100 V+ = 15 V V– = –15 V tOFF tON , ID 12 14 16 18 20 22 Switching Time vs. Temperature Temperature (/C0095C) –55 400 350 300 250 200 150 100 –35 –15 5 25 45 65 85 105 125 tOFF tON V+ = 15 V V– = –15 V V S = 3 V Time (ns) V+ = 15 V V– = –15 V V IN = 4 V (One Input) (All Other = 0 V)

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Figure 2. Switching Time Figure 3. Break-Before-Make SPDT (DG301A, DG303A) Figure 4. Charge Injection

S-52880—Rev. C, 28-Apr-97 Application Hintsa Positive Supply Voltage (V) Negative Supply Voltage (V) GND Voltage (V) V IN Logic Input Voltage V INH(min) /VINL(max) (V) V S or VD Analog Voltage Range (V) –15 –20 4/0.8 4/0.8 4/0.8 –15 to 15 –20 to 20 0 to 15 /C0078/C0111/C0116/C0101/C0058 a. Application Hints are for DESIGN AID ONLY , not guaranteed and not subject to production testing.

Applications

The DG300A series of analog switches will switch positive analog signals while using a single positive supply. This facilitates their use in applications where only one supply is available. The trade-offs of using single supplies are: 1) Increased rDS(on); 2) slower switching speed. The analog voltage should not go above or below the supply voltages which in single operation are V+ and 0 V . (See Input Switching Threshold vs. Positive Supply V oltage Curve.) +15 V +15 V +15 V DG301A TTL Input +5 V 10 k 10 k 5 k 5 k 100 k 10 /C0109F 50 k V OUT Figure 5. Single Supply Op Amp Switching

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Figure 6. Low Power Instrumentation Amplifier with Digitally Selectable Inputs and Gain