R1260S-Y NISSHINBO | Alldatasheet

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60V Input / 80V Absolute Maximum Rating Synchronous Step-down DC/DC Controller for Industrial Applications No.EY-511-220222 The R1260S is a step-down DC/DC controller which can generate an output voltage of 1.0 V to 16.0 V by driving external high- / low-side NMOSFETs. By the adoption of a unique current mode PWM architecture without an external current sense resistor, this device can make up a stable DC/DC converter with high- efficiency even if adding low Ron MOSFETs and a low DCR inductor externally. This is a high-reliability semiconductor device for industrial application (-Y) that has passed both the screening at high temperature and the reliability test with extended hours.

  • 48 V power can be provided by a wide-ranging input voltage of 5 V to 60 V.
  • High-accuracy feedback voltage: 0.8 V ±1.5% (−40°C ≤ Ta ≤ 125°C)
  • H igh efficiency at light load (IOUT=1mA) by VFM control (80% @VIN=24V, 70% @VIN=48V)
  • Input Voltage Range: 5 V to 60 V
  • Maximum Rating: 80 V
  • Output Voltage Range: 1.0 V to 16.0 V
  • Feedback Voltage: 0.8 V ±1.5%
  • Consumption Current at No Load: Typ.15µA (at VFM mode)
  • Oscillator Frequency: 150kHz to 600kHz
  • Adjustable Soft-start with an external capacitor : 600µs (without external capacitor)
  • Minimum ON Time: Typ. 130 ns
  • Minimum OFF Time: Typ.120 ns
  • Selectable Output Voltage Controls: PWM/VFM Auto-switching mode / Forced PWM / PLL_PWM mode
  • Operating Temperature Range: -40°C to 125°C
  • Spread Spectrum Clock Generator (SSCG)*Option
  • Power Good Output
  • Undervoltage Detection (UVD), Overvoltage Detection (OVD)
  • Undervoltage Lockout (UVLO)
  • Thermal Shutdown: Tj = 160°C (Typ.)
  • Overcurrent Protection: Hiccup-type, Latch-type
  • Short-circuit Protection: LX to VIN or GND HSOP-18 (5.2 mm x 6.2 mm x 1.45 mm)
  • Power source for systems that require step-down from high voltages such as 24V or 48V. ・PLC ・PoE Drive Equipment ・FA Equipment ・5G Base Station ・Industrial Equipment etc. OVERVIEW KEY BENEFITS TYPICAL CHARACTERISTICS KEY SPECIFICATIONS

APPLICATIONS

0.1 1 10 100 1000 10000 Efficiency [%] IOUT [mA] VOUT = 5.0V, FOSC = 250kHz VIN=12V VIN=24V VIN=48V MODE=H MODE=L PACKAGE

No. EY-511-220222 SELECTION GUIDE Product Name Package Quantity per Reel Pb Free Halogen Free R1260Sxxyz-E2-YE HSOP-18 1,000 Yes Yes xx：Select the set output voltage range. xx Set Output Voltage Range 01 1 V ≤ V OUT ≤ 3.15 V 02 3.15V < VOUT ≤ 8 V 03 8 V < VOUT ≤ 16 V y：Select the current limit threshold voltage. y Current limit threshold voltage (Typ.) Reverse current limit threshold voltage (Typ.) 1 50mV －25mV 2 70mV －35mV 3 100mV －50mV z：Select the combination of overcurrent protection and SSCG. z Overcurrent Protection SSCG A Hiccup mode Disable B Hiccup mode Enable C Latch mode Disable D Latch mode Enable

No. EY-511-220222 BLOCK DIAGRAM R1260S Block Diagram INT Regulator S PGOOD BST LX Q R VCO Hiccup/Latch Slope Limit Circuit FB RT CSS/TRK Soft Start Circuit Reference PFCMODE Under Voltage Detection UVD Thermal Shutdown CE 1.2V SHDN OVD UVD VOUT SHDN Mode Select Filter Mode Mode ILIM Drive Circuit VCC Regulator VCC Int_Reg HGATE LGATE VIN OVD VCC VFM ControlMode Rev Set_Pulse Set_Pulse VOUT AVIN Reverse Detection Mode PGND AGND Rev SHDN OVD SENSE VIN VOUT COMP Over Voltage Detection OVD OFF_PulseSoft_Start OFF_Pulse 0.6V EN Int_Reg Soft_Start 2μA Freq Detection Freq_NG UVLO VCC Hiccup /Latch SHDN OVD SHDN Hiccup /Latch Soft_Start CLK SSCG_EN ＜Enable/ Disable＞ Freq_NG Peak Limit Circuit VOUT

No. EY-511-220222 PIN DESCRIPTIONS TOP VIEW SENSE LGATE VCC BST HGATE LX CE RT COMP PGND FB 18VIN VOUT MODE AGND PGOOD CSS /TRK PAD (NC) R1260S Pin Configuration ∗1 The tab on the bottom of the package must be electrically connected to GND (substrate level) when mounted on the board.

No. EY-511-220222 Pin Description Pin No. I/O Pin Name Description

1 I VIN

Power Supply Input Pin. Apply input voltage between VIN pin and GND. Connect the input capacitor between the VIN pin and GND.

2 I CSS/TRK

Soft-start and Tracking Control input pin. A capacitor to ground from this pin sets the ramp time to full output voltage. Without the capacitor, soft start time is Typ. 600us. Controlling this pin externally from 0V to 0.8V with a certain slope, the output voltage tracks the slope.

3 I VOUT

Power Supply for Internal Circuit/Output Voltage Sense pin. Connect this pin to Output Voltage node. Connect a capacitor between this pin and GND.

4 I SENSE

Sense pin for inductor current. By connecting a sense resistor between the VOUT pin and SENSE pin, the current value of the current limit and reverse current limit can be set.

5 I CE

Chip enable pin. Forcing this pin above 1.3V enables the operation of the R1260. Forcing this pin below 1.1V stops switching operation of the R1260. Forcung this pin below 0.39V, all functions are disabled. 6 － AGND Analog ground of the internal circuit. Connect this pin to the GND of PCB.

7 I RT

Timing Resistor pin to Program the Oscillator Frequency. Connecting a resistor to ground from this pin sets the switching frequency. Switching frequency range is from 150kHz to 600kHz. RRT [kΩ] = 34064 x fOSC [kHz] ^ (-1.025) 8 O COMP Error amplifier phase compensation pin. Connect a resistor and a capacitor for phase compensation.

9 I FB

Feedback input pin to the error amplifier. Receives the feedback voltage from a restive divider connected across the output.

10 O PGOOD

Power-good output pin. NMOS open-drain logic output that is pulled to ground when the output voltage is not within the normal state. Refer to the “Power Good Function”. Pull-up voltage rating is 6V.

11 I MODE

Mode Select and External Clock Synchronization Input pin. To select forced PWM mode, connect this pin to above designated “High”. Connecting this pin to a voltage between 0V and designated “Low” selects PWM/VFM auto-switching mode. 12 － PGND Power ground. Connect this pin close to GND of PCB. 13 O LGATE Gate Drive pin for Bottom(low-side) Synchronous N-Channel MOSFET.

No. EY-511-220222

14 I LX

Switch Node Connection to Inductor. This pin connects to the switch node between source of the high-side MOSFET and the drain of the low-side MOSFET, and the inductor. 15 O HGATE Gate Drive pin for Top(high-side) N-Channel MOSFET.

16 O BST

Bootstrapped pin. A capacitor (CBST) between the LX pin and the BST pin, and Schottky diode are tied between the VCC pin and the BST pin. Voltage between BST pin and Lx pin is controlled to Typ.5V. 17 － NC No connection. It is recommended to be left open to reduce the risk of adjacent pins’ short.

18 O VCC

Output pin of Internal 5V linear Regulator The control circuits of drive external NMOSFETs are powered from this voltage source. Must be decoupled to power ground with an output capacitor (CVCC) .

No. EY-511-220222 Internal Equivalent Circuit for Each Pin VIN Int_Reg CE VIN Int_Reg < VIN Pin > < CE Pin > CSS/TRK 1kΩ VIN VOUT VIN VCCVIN Int_Reg < CSS/TRK Pin > < VOUT Pin > SENSE VIN VCC RT Int_Reg Int_Reg Int_Reg < SENSE Pin > < RT Pin >

No. EY-511-220222 COMP FB Int_Reg VCC < COMP Pin > < FB Pin > MODE VCC VCC PGOOD < MODE Pin > < PGOOD Pin > LGATE PGNDPGND PGND PGND VCC VCC < LGATE Pin >

No. EY-511-220222 LX VIN HGATE BST HGATE BST LX LX BSTBST LX < LX、BST Pin > < HGATE Pin > AGND PGND VCC < AGND-PGND Pins > < VCC Pin >

No. EY-511-220222 ABSOLUTE MAXIMUM RATINGS Symbol Item Ratings Unit VIN Input voltage -0.3 to 80 V VCE CE pin voltage -0.3 to VIN+0.3 ≤ 80 V VCSS/TRK CSS/TRK pin voltage -0.3 to 3 V VOUT VOUTpin voltage -0.3 to 20 V VSENSE SENSE pin voltage -0.3 to 20 V VRT RT pin voltage -0.3 to 3 V VCOMP COMP pin voltage -0.3 to VCC + 0.3 ≤ 6 V VFB FB pin voltage -0.3 to 2.85 V VSENSEOUT Voltage between VOUT and SENSEpins -0.3 to 0.3 V VCC VCC pin votlage -0.3 to 6 V Output current for VCC pin Internally limited mA VBST BST pin voltage LX-0.3 to LX+6 V VHGATE HGATE pin voltage LX-0.3 to BST V VLX LX pin voltage -0.3 to VIN +0.3 ≤ 80 V VLGATE LGATE pin voltage -0.3 to VCC + 0.3 ≤ 6 V VMODE MODE pin voltage -0.3 to 6 V VPGOOD PGOOD pin voltage -0.3 to 6 V PD Power Dissipation Refer to Appendix “POWER DISSIPATION” Tj Junction Temperature -40 to 150 °C Tstg Storage Temperature Range -55 to 150 °C ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause permanent damage and may degrade the lifetime and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings are not assured.

No. EY-511-220222 ELECTROSTATIC DISCHARGE(ESD) RATINGS Symbol Conditions Ratings Unit VHBM HBM C=100pF、R=1.5kΩ ±2000 V VCDM CDM ±1000 Electrostatic Discharge Ratings The electrostatic discharge test is done based on JESD47. In the HBM method, ESD is applied using the power supply pin and GND pin as reference pins. RECOMMENDED OPERATING CONDITIONS Symbol Item Ratings Unit VIN Input Voltage 5.0 to 60 V Ta Operating Temperature Range −40 to 125 °C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if they are used over such ratings by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions.

No. EY-511-220222

ELECTRICAL CHARACTERISTICS

VIN = 48 V, VCE = 5 V, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at -40°C ≤ Ta ≤ 125°C. R1260Sxxyz -Y Electrical Characteristics (Ta = 25°C) Symbol Item Conditions Min. Typ. Max. Unit VOUT Output Voltage 1 16 V VCC VCC Pin Voltage (VCC – AGND) VFB = 0.84 V 4.85 5.1 5.3 V ISTANDBY Standby Current VIN = 60 V, VCE = 0 V 3 8.5 µA IVIN1 VIN Consumption Current 1 at Switching Stop in PWM Mode R1260S01yz VFB = 0.84 V, VMODE = 5 V, VOUT = VSENSE = VLX = 5 V 1.37 1.77 mA R1260S02yz R1260S03yz VFB = 0.84 V, VMODE = 5 V, VOUT = VSENSE = VLX = 5 V 1.00 1.50 IVIN2 VIN Consumption Current 2 at Switching Stop in VFM mode R1260S01yz VFB = 0.84 V, VMODE = 0 V VOUT = VSENSE = VLX = 5 V 48 85 µA R1260S02yz R1260S03yz VFB = 0.84 V, VMODE = 0 V VOUT = VSENSE = VLX = 5 V 15 45 VUVLO2 UVLO Threshold Voltage VCC Rising 4.20 4.50 4.80 V VUVLO1 VCC Falling 3.68 3.80 3.97 V VFB FB Voltage Accuracy fOSC0 Oscillation Frequency 0 RT = 200 kΩ 135 150 165 kHz fOSC1 Oscillation Frequency 1 RT = 47 kΩ 540 600 660 kHz tOFF Minimum OFF Time VIN = 5 V, VOUT = 5 V 120 190 ns tON Minimum ON Time 130 170 ns fSYNC Synchronizing Frequency fOSC as reference fOSC x0.5 fOSC x1.5 kHz 150 600 tSS1 Soft-start Time 1 VCSS/TRK = OPEN 0.25 0.6 1.35 ms tSS2 Soft-start Time 2 CSS = 4.7 nF 1.6 2.1 2.8 ms ITSS Charge Current for Soft-start Pin VCSS/TRK = 0 V 1.8 2 2.2 µA VSSEND CSS/TRK pin Voltage at End of Soft-start VFB VFB +0.03 VFB+0.06 V RDIS_CSS Discharge Resistance for CSS/TRK Pin VIN = 4.5 V, VCE = 0 V, VCSS/TRK = 3 V 1.0 3.0 6.5 kΩ RUPHGATE On-resistance of Pull-up Transistor (HGATE Pin) (BST – LX) = 5 V, IHGATE = -100 mA 2.5 5.7 Ω RDOWNHGATE On-resistance of Pull-down Transistor (HGATE Pin) (BST – LX) = 5 V, IHGATE = 100 mA 1.5 5.0 Ω RUPLGATE On-resistance of Pull-up Transistor (LGATE Pin) (VCC – PGND) = 5V, ILGATE = -100mA 4.0 7.2 Ω RDOWNLGATE On-resistance of Pull-down Transistor (LGATE Pin) (VCC – PGND) = 5 V, ILGATE = 100 mA 1.5 4.7 Ω All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C).

No. EY-511-220222 VIN = 48 V, VCE = 5 V, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at -40°C ≤ Ta ≤ 125°C. R1260Sxxyz -Y Electrical Characteristics (Ta = 25°C) Symbol Item Conditions Min. Typ. Max. Unit VILIMIT Current Limit Threshold Voltage (SENSE – VOUT) R1260Sxx1z 40 50 64 mV R1260Sxx2z 56 70 84 mV R1260Sxx3z 88 100 116 mV VIREVLIMIT Reverse Current Sense Threshold (SENSE – VOUT) R1260Sxx1z MODE = “High” or “CLK Input” -39 -25 -14 mV R1260Sxx2z MODE = “High” or “CLK Input” -49 -35 -22 mV R1260Sxx3z MODE = “High” or “CLK Input” -64 -50 -39 mV VLXSHORTL LX Short to GND Detector Threshold Voltage (VIN – LX) 0.80 1.0 1.2 V VLXSHORTH LX Short to VCC Detector Threshold Voltage (LX – PGND) 0.32 0.40 0.44 V VCEH CE Pin Input Voltage, high 1.3 V VCEL CE Pin Input Voltage, low 1.1 V ICEH CE Pin Input Current, high VCE = 60 V -0.10 2.45 µA ICEL CE Pin Input Current, low VCE = 0 V -1.00 0 1.00 µA IFBH FB Pin Input Current, high VFB = 2.85 V -0.10 0.10 µA IFBL FB Pin Input Current, low VFB = 0 V -0.10 0.10 µA VMODEH MODE Pin Input Voltage, high 1.33 V VMODEL MODE Pin Input Voltage, low 0.74 V IMODEH MODE Pin Input Voltage, high R1260S01yz R1260S02yz VMODE = 5 V 7.0 10.7 18.6 µA R1260S03yz 3.0 5.3 9.6 IMODEL MODE Pin Input Voltage, low VMODE = 0 V -1.00 0 1.00 µA VPGOODOFF PGOOD Pin Output Voltage, low VIN = 5.0 V, IPGOOD = 1 mA 0.26 0.64 V IPGOODOFF PGOOD Pin Leakage Current VIN = 60 V, VCE = 0 V, VPGOOD = 6 V -0.10 0 0.10 µA VFBOVD1 FB Pin OVD Threshold Voltage VFB Rising VFB x1.070 VFB x1.100 VFB x1.135 V VFBOVD2 VFB Falling VFB x1.044 VFB x 1.070 VFB x1.110 V VFBUVD1 FB Pin UVD Threshold Voltage VFB Falling VFB x0.865 VFB x 0.900 VFB x0.936 V VFBUVD2 VFB Rising VFB x0.890 VFB x 0.930 VFB x0.970 V gm (EA) Trans Conductance Amplifier VCOMP = 1.5 V 0.55 1.00 1.45 mS All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C).

No. EY-511-220222 TYPICAL APPLICATION CIRCUIT R1260Sxxyz V CC HGA TE B ST LGA TE LX MO DE PGND PGOOD AGND V IN VOUT CS S/ TRK FB CE RT COMP SE NSE VIN 5V to 60V L 10uH VOUT 3 . 3V HS/LS NCH-FET SQJ40 2EP NC CC2 470pF CC 10nF RC 3.3kΩ RRT 117k Ω (160k //430k) RBO T 22kΩ RTO P 68.8k Ω CSP D 220pF CSS 33nF CIN 30uF RSE N 3mΩ CO UT 300uF CVC C 2.2uF CBS T 0.22uF Diode DFLS1100 Q-7 R1260S Typical Application Circuit at 250 kHz / 3.3V R1260Sxxyz V CC HGA TE B ST LGA TE LX MO DE PGND PGOOD AGND V IN VOUT CS S/ TRK FB CE RT COMP SE NSE VIN 5V to 60V L 15uH VOUT HS/LS NCH-FET SQJ40 2EP NC CC2 330pF CC 10nF RC 5.6kΩ RRT 117k Ω (160k //430k) RBO T 22kΩ RTO P 115k Ω CSP D 150pF CSS 33nF CIN 30uF RSE N 3mΩ CO UT 222uF CVC C 2.2uF CBS T 0.22uF Diode DFLS1100 Q-7 R1260S Typical Application Circuit at 250kHz / 5.0V

No. EY-511-220222 OPERATION Operation of Step-down Converter A basic step-down DC/DC converter circuit is illustrated in the following figures. This DC/DC converter charges energy in the inductor when the high-side MOSFET turns on, and discharges the energy from the inductor when the high-side MOSFET turns off and controls with less energy loss, so that a lower output voltage than the input voltage is obtained. High-side FET L Low-side FET VIN VOUT COUT GND Basic Circuit Current Through Inductor Step1. The high-side MOSFET turns on and current IL (= i1) flows, and energy is charged into COUT. At this moment, IL increases from ILMIN (= 0) to reach ILMAX in proportion to the on-time period (ton) of the high-side MOSFET turns on and current IL (= i1) flows, and energy is charged into COUT. At this moment, IL increases from ILMIN (= 0) to reach ILMAX in proportion to the on-time period (tON) of the high-side MOSFET. Step2. When the high-side MOSFET turns off, the low-side MOSFET turns on in order to maintain IL at ILMAX, and current IL (= i2) flows. Step3. When MODE = "Low" (VFM/PWM Auto-switching mode), If the output current is small, I L (= i2) decreases gradually and reaches IL = ILMIN = 0 after a time period of tOPEN, and the low-side MOSFET turns off. This case is called as discontinuous mode. The VFM mode is switched if go to the discontinuous mode. If the output current is increased, a time period of tOFF runs out prior to reach of IL = ILMIN = 0. The result is that the high-side MOSFET turns on and the low-side MOSFET turns off in the next cycle. This case is called continuous mode. Upon entering this continuous mode, R1260S will transition to the PWM mode. When MODE = "High" (Forced PWM mode), MODE = External Clock (PLL_PWM mode), Since the continuous mode works at all time, the low-side MOSFET turns on until going to the next cycle. That is, the low-side MOSFET must keep “On” to meet IL = ILMIN < 0, when reaches IL = ILMIN = 0 after a time period of tOPEN. In the PWM mode, the output voltage is maintained constant by controlling tON with the constant switching frequency (fOSC). In VFM mode, tON is constant and the output voltage is kept constant by controlling fOSC. t=1/ fOSC tOFF tOPEN ILMIN ILMAX tON IL

No. EY-511-220222 Chip Enable Function Standby state by entering the "Low" to the CE pin, can be set to the active state by entering the "High". When the CE pin voltage drops below the CE “Low” input voltage (VCEL) of 1.1V, the switching is turned off state. When the CE pin voltage rises above the CE “High” input voltage (VCEH) of 1.3 V, the R1260S boots and begins a soft start. In order for the current flowing through the VIN pin to be the standby current (ISTANDBY), the CE pin voltage must be 0.39V or less. If the chip enable function is not required, connect the CE pin to the VIN pin, etc. so that "High" is input at startup. However, please note that if the VIN pin and CE pin are turned on at the same time at Ta> 125°C, the thermal shutdown detection state may occur. MODE Switching Function The R1260S operating mode is switched among the forced PWM mode, PWM/VFM auto- switching mode and PLL_PWM mode, by a voltage or a pulse applied to MODE pin. The forced PWM mode is selected when the voltage of the MODE pin is more than 1.33 V, and the PWM works regardless of a load current. The PWM/VFM auto-switching mode is selected when it is less than 0.74 V, and control is switched between a PWM mode and a VFM mode depending on the load current. See Forced PWM mode and VFM mode for details. And see Frequency Synchronization Function for the operation on connecting an external clock.

No. EY-511-220222 Forced PWM Mode and VFM Mode The output voltage control methods are selectable between the PWM / VFM Auto-switching mode and the forced PWM mode by using the MODE pin. Forced PWM Mode Forced PWM mode is selected when setting the MODE pin to “High”. This mode can reduce the output noise, since the frequency is fixed during light load conditions. Thus, ILMIN becomes less than "0" when IOUT is less than ∆IL/2. That is, the electric charge, which is charged to COUT, is discharged via MOSFET for the durations – when IL reaches “0” from ILMIN during the tON periods and when IL reaches ILMIN from “0” during tOFF periods. But, pulses are skipped to prevent the overvoltage when high-side MOSFET is set to ON under the condition that the output voltage being more than the set output voltage. VFM Mode PWM / VFM Auto-switching mode is selected when setting the MODE pin to “Low”. This mode can automatically switch from PWM to VFM to achieve a high-efficiency during light load conditions. By the VFM mode architecture, the high-side MOSFET is turned on for tON x 1.54 (Typ.) at the PWM mode under the same condition as the VFM mode when the VFB pin voltage drops below the internal reference voltage (Typ. 0.8 V). After the On-time, the high-side MOSFET is turned off and the low-side MOSFET is turned on. When the inductor current of 0 A is detected, the low-side MOSFET is turned off and the switching operation is stopped (Both of hi- and low-side MOSFETs are OFF). The switching operation restarts when the VFB pin voltage becomes less than 0.8 V. The On-time at the PWM mode is determined by a resistance, input and output voltages, which are connected to the RT pin. Refer to “Calculation of VFM Ripple” for detailed description on the On-time at the VFM mode. ILMAX ILMIN tON tOFF T=1/fOSC IL IOUT t ΔIL ILMAX ILMIN tON tOFF IL t Forced PWM Mode VFM Mode

No. EY-511-220222 Calculation of VFM Ripple Calculation example of output ripple voltage (VOUT_VFM) is described. VOUT_VFM can be calculated by Equation 1. And, the maximum value of inductor current (IL_VFM) can be calculated by Equation 2. VOUT_VFM : Output ripple RCOUT_ESR : ESR of output capacitor IL_VFM : Maximum current of inductor COEF_TON_VFM : Scaling factor of On-time - Typ.1.54X (Design value) (VIN-VOUT) / L : Slope of inductor current COEF_TON_VFM × VOUT / VIN / fOSC : On-time Inductor Current Waveform at VFM Mode IL (A) Time(s) Slope ⊿IL=(VIN-VOUT)/L Slope ⊿IL= VOUT/L Inductor Current (Max.) IL_VFM Average Area of I L (A) x Time (s) High-side MOSFET Low-side MOSFET

No. EY-511-220222 Output voltage can be calculated by the following simple equation. VOUT = I × T/C I : Current, C : Capacitance, T : Time Since I is represented by 1/2 x IL_VFM as the average current, the time of current passing at the VFM mode can be expressed by the following equation. T = COEF_TON_VFM / fOSC And, the output ripple voltage (V OUT_VFM) is superimposed a voltage for ESR × I, and Equation 1 is determined. But, ESR is so small that it may be ignored if ceramic capacitors are connected in parallel. The amount of charge to the output capacitor can be calculated by Equation 3. (High-side MOSFET On-time (T1) + Low-side MOSFET On-time (T2)) × Average amount of current Then, T1 and T2 can be calculated by the following equations, and the time of current passing can be determined. T1 = C OEF_TON_VFM / fOSC × VOUT / VIN ····· (On-time at VFM) T2 = (VIN/VOUT-1) × T1 (0 = IL_VFM – VOUT/L × T2) T = T1 + T2 = VIN /VOUT × T1 = COEF_TON_VFM / fOSC And then, the amount of charge can be determined as Equation 4. With using above equations, the output ripple voltage (VOUT_VFM) can be calculated by Equation 5.

No. EY-511-220222 UVLO (Undervoltage Lockout) Function The UVLO function is a function that prevents malfunction by turning off switching when the VCC pin voltage becomes lower than the UVLO detection voltage (VUVLOF) due to a drop in the input voltage. Since switching stops, the output voltage drops depending on the load and COUT. When the VCC pin voltage rises above the UVLO release voltage (VUVLOR), the R1260S restarts and begins a soft start. OVLO (Overvoltage Lockout) Function The OVLO function is a function to prevent malfunction by turning off switching when the input voltage exceeds the OVLO detection voltage (VOVLOR), 85V (Typ.), and to prevent overvoltage destruction of the high-side MOSFET and low-side MOSFET. Since switching stops, the output voltage drops depending on the load and COUT. If the input voltage drops below the OVLO release voltage (VOVLOF), 82.8V (Typ.), the R1260S will restart and start a soft start. This function does not guarantee operation above the absolute maximum rating. Output Voltage (VOUT) Input Voltage (VIN) UVLO Release Voltage (VUVLOR) UVLO Detection Voltage (VUVLOF) LX Voltage (VLX) Soft-start Time (tSS) Internal Regulator Voltage (VCC) Output Voltage (VOUT) Input Voltage (VIN) OVLO Detection Voltage (VOVLOR) OVLO Release Voltage (VOVLOF) LX Voltage (VLX) Soft-start Time (tSS)

No. EY-511-220222 Frequency Synchronization Function The R1260S can synchronize to the external clock being inputted via the MODE pin, with using a PLL (Phase-locked loop). The forced PWM mode is selected during synchronization. The external clock with a pulse-width of 100 ns or more is required. The allowable range of oscillation frequency is 0.5 to 1.5 times of the set frequency(1), and the operating guaranteed frequency is in the 150 kHz to 600 kHz range. The R1260S can synchronize to the external clock even if the soft-start works. That is, the R1260S executes the soft-start and the synchronization functions at a time if having started up while inputting an external clock to the MODE pin. When the maxduty or the duty_over state is caused by reduction in differential between input and output voltages, the device runs at asynchronous to the MODE pin, and it operates in the frequency reduced until one-fourth of the external clock frequency. Likewise, the CLKOUT pin becomes asynchronous to the MODE pin. If making synchronization to the MODE pin, take notice in use under a reduced input voltage. PGOOD (Power Good) Output Function The power good function with using a NMOS open drain output pin can detect the following states of the R1260S. The NMOS turns on and the PGOOD pin becomes “Low” when detecting them. After the R1260S returns to their original state, the NMOS turns off and the PGOOD pin outputs “High” (PGOOD Input Voltage: VUP). ・CE = “Low” (Shut down) ・UVLO (Shut down) ・Thermal Shutdown ・Soft-start time ・at UVD Threshold Voltage Detection ・at OVD Threshold Voltage Detection ・at hiccup-type Protection (when hiccup mode is selected) ・at latch-type Protection (when latch mode is selected) The PGOOD pin is designed to become 0.64 V or less in “Low” level when the current floating to the PGOOD pin is 1 mA. The use of the PGOOD input voltage (VUP) of 5.5 V or less and the pull-up resistor (RPG) of 10 kΩ to 100 kΩ are recommended. If not using the PGOOD pin, connect it to “Open” or “GND”. PGOOD “H” is detected under abnormal condition. VUP RPG VPGOOD R1260 NMOS FET PGOOD Voltage (VPGOOD) Output Voltage (VOUT) Typ. 120μs CE Input Voltage (VCE) VUP VSET VCEH VCEL Power Good Circuit Diagram Power Good Circuit Rise / Fall Sequence (1) See Oscillation Frequency Setting for details of the set frequency.

No. EY-511-220222 Under Voltage Detection (UVD) The UVD function indirectly monitors the output voltage with using the FB pin. The PGOOD pin outputs “Low” when the UVD detector threshold is 90% (Typ.) of VFB and VFB is less than the UVD detector threshold for more than 30 µs (Typ.). When VFB is over 93% (Typ.) of 0.8V, the PGOOD pin outputs “High” after delay time (Typ.120 µs.). And, the hiccup- / latch-type overcurrent protection works when detecting a current limit, an LX power supply protection, or an over voltage protection during the UVD detection. Over Voltage Detection (OVD) The OVD function indirectly monitors the output voltage with using the FB pin. Switching stops even if the internal circuit is active state, when detecting the over voltage of VFB. The PGOOD pin outputs “Low” when the OVD detector threshold is 110% (Typ.) of VFB and VFB is over the OVD detector threshold for more than 30 µs (Typ.). When VFB is under 107% (Typ.) of VFB, which is the OVD released voltage, the PGOOD pin outputs “High” after delay time (Typ.120 µs.). Then, switching is controlled by normal operation. The over voltage protection works when an error is caused by a feedback resistor in peripheral circuits for the FB pin. Typ. 30μs PGOOD Voltage (VPGOOD) Output Voltage (VOUT) LX Voltage (VLX) Typ. 120μs VUP VLX VSET VOVDR VUVDR VOVDF VUVDF Typ. 120μs Typ. 30μs Over Voltage Detection / Under Voltage Detection Sequence

No. EY-511-220222 LX Power Supply (VIN Short) / GND (GND Short) Protection In addition to normal current limit, the R1260S provides the LX power supply / GND short protection to monitor the voltage between the MOSFET’s drain and source. Since the current limit function is controlled with an external inductor’s DCR or a sense resistance, the current limit function cannot work when a through- current is flowed through the MOSFET and when an overcurrent is generated by shorting the LX pin to VIN/GND. LX power supply protection monitors the voltage between drain and source of the low -side MOSFET during its on period and turns off the MOSFET when the detection threshold is exceeded. LX ground protection monitors the voltage between drain and source of the high- side MOSFET during its on period and turns off the MOSFET when the detection threshold is exceeded. This function repeats with each switching. The detect threshold voltage at LX short to GND is 1V(Typ.) and the detect threshold voltage at LX short to VIN is Typ.0.4 V(Typ.). The detecting current is determined by the detect threshold voltage when LX short to VIN / GND (MOSFET_On-resistance x Current).

No. EY-511-220222 Hiccup-type / Latch-type Overcurrent Protection The hiccup-type / latch-type overcurrent protection can work under the operating conditions that is the UVD can function during the current limit or OVP and the LX GND short protection. The latch-type protection can release the circuit by setting the CE pin to “Low” or by reducing VIN to be less than the UVLO detector threshold, when the output is latched off. The hiccup type protection stops switching releases the circuit after the protection delay time 7ms (Typ.). The Hiccup type automatically recovers after the overcurrent protection is activated. And, damage due to the overheating might not be caused because the term to release is long. When the output is shorted to GND, switching of “ON” / “OFF” is repeated until the shorting is released. PGOOD Voltage (VPGOOD) Output Voltage (VOUT) LX Voltage (VLX) VUP VLX VSET Typ. 120μs Output Current (IOUT) SoftStart Hiccup Delay The load is removed Overload Hiccup-Type Overcurrent Protection Timing Chart

No. EY-511-220222 Current Limit Function The current limit function can be to limit the current by the peak current method to turn the high-side MOSFET off when the potential differences between voltage of SENSE pin and VOUT pin is over the current limit threshold voltage. The threshold voltage is selectable among 50 mV / 70 mV / 100 mV. And, the two following detection methods can be selected by external components connected. A. Detecting Method with RSENSE The current limit value is detected with the voltage across the inductor that a sense resistance is connected in series. By connecting a resistance with low level of variation, the current limit with high accuracy can achieve. As a result, be caution that the power loss is caused from the current and RSENSE. The peak current in the current limit inductor can be calculated by the following equation. Peak current in Current limit inductor (A) = Current limit threshold voltage (mV) / RSENSE (mΩ) CO UT Inducto r LX VOUT SE NSEHi gh-si de MOSFET Low-si de MOSFET RSE NSE Figure A Detection with Sense Resistance B. Detecting Method with DCR of Inductor The current limit value is detected with the DCR of the inductor. The reduction of the loss is minimized since the inductor is in no need of a resistance. But, the SENSE pin requires to connect a resistor and a capacitor to each end of the inductor. Because a constant slope is caused depending on the inductance and the capacitance. Factors causing the poor accuracy of current limit value include the variation in production of the inductor’s DCR and the temperature characteristics. R S and CS can be calculated by the following equation. Peak current in Current limit inductor (A) = Current limit threshold voltage (mV) / Inductor’s DCR (mΩ) CS = L / (DCR x RS) CO UT Inducto r RS CS LX VOUT SE NSE Hi gh-si de MOSFET Low-si de MOSFET DCR Figure B Detecting with Inductor’s DCR

No. EY-511-220222 Output Voltage Setting The output voltage (VOUT) can be set by adjustable values of RTOP and RBOT. The value of VOUT can be calculated by Equation 1 : For example, when setting VOUT = 3.3 V and setting RBOT = 22 kΩ, RTOP can be calculated by substituting them to Equation 1. As a result of the expanding Equation 2, RTOP can be set to 68.8 kΩ. To make 68.8 kΩ with E24 resistors, connect 62 kΩ and 6.8 kΩ in series. (If the tolerance level of the output voltage is permitted, 68 kΩ may be used.) RTOP = (3.3 V / 0.8 V - 1) × 22 kΩ Oscillation Frequency Setting Connecting the oscillation frequency setting resistor (RRT) between the RT pin and GND can control the oscillation frequency in the range of 150 kHz to 600 kHz. For example, using the resistor of 100 kΩ can set the frequency of about 300 kHz. The Electrical Characteristics guarantees the oscillation frequency under the conditions stated below for f OSC0 (at RRT = 200 kΩ) and fOSC1 (at RRT = 47 kΩ). RRT [kΩ] = 34064 x fOSC [kHz] ^ (-1.025) Oscillation Frequency Setting Resistor (RRT) vs. Oscillation Frequency (fOSC) 100 200 300 400 500 600 700 50 75 100 125 150 175 200 fosc[kHz] RRT[kΩ]

No. EY-511-220222 Soft-start Function The soft-start time is a time between a rising edge (“High” level) of the CE pin and the timing when the output voltage reaches the set output voltage. Connecting a capacitor (CSS) to the CSS / TRK pin can adjust the soft-start time (tSS) – provided the internal soft-start time of 600 µs (Typ.) as a lower limit. The adjustable soft-start time (tSS2) is 2.0 ms (Typ.) when connecting an external capacitor of 4.7 nF with the charging current of 2.0μA (Typ.). Soft start time(TSS) [ m s ] = CSS [nF] / 2.0 [μA] × 0.8 [V]+ 0.16 [ms] If CSS = 4.7 nF I f not required to adjust the soft-start time, set the CSS / TRK pin to “Open” to enable the internal soft-start time (tSS1) of 600 µs (Typ.). If connecting a large capacitor to an output signal, the overcurrent protection or the LX GND short protection might run. To avoid these protections caused by starting abruptly when reducing the amount of power current, soft-start time must be set as long as possible. Each of soft-start time (tss1/ tss2) is guaranteed under the conditions described in the chapter of “Electrical Characteristics”.

No. EY-511-220222 1nF 3.3nF 10nF 33nF CSS tSS 13.4ms 4.2ms 1.5ms 0.6ms 2.0ms 4.7nF Soft-start Time Adjustable Capacitor (CSS) vs. Soft-start Time (tSS) CE VOUT VSET tSS tVO_S PGOOD Typ. 120us VCEH time time time Soft-start Sequence CSS [nF] = (tss [ms] - tVO_S [ms]) / 0.8[V] × 2.0 [μA] tSS: Soft-start time (ms) tVO_S: Time period from CE = “High” to VOUT’s rising (Typ. 0.160 ms)

No. EY-511-220222 Tracking Function Applying an external tracking voltage to the CSS / TRK pin can control the soft-start sequence – provided that the lowest internal soft-start time is limited to 600 µs (Typ.). Since VFB becomes nearly equal to VCSS/TRK at tracking, start timing and soft-start can be easily designed. The available voltage at tracking is between 0 turning off slope can be set by forcing VCSS/TRK to from 0.8 V (Typ.) to 0V, since the R1260S supports both of up- and down- tracking. CSS/TRK VOUT 0.8V SS 通常動作 SS Tracking Sequence Min. ON-time The min. ON time (Max. 170 ns), which is determined in the R1260S internal circuit, is a minimum time to turn high-side MOSFET on. The R1260S cannot generate a pulse width less than the min. ON time. Therefore, settings of the output set voltage and the oscillator frequency are required so that the minimum step-down ratio [VOUT/VIN x (1 / fOSC)] does not stay below 170ns. If staying below 170 ns, the pulse skipping will operate to stabilize the output voltage. However, the ripple current and the output voltage ripple will be large. Min. OFF-time By the adoption of bootstrap method, the high-side MOSFET, which is used as the R1260S internal circuit for the min. OFF time, is used a NMOS. The voltage sufficient to drive the high-side MOSFET must be charged. Therefore, the min. OFF time is determined from the required time to charge the voltage. By the adoption of the frequency’s reduction method by one-quarter of a set value (Min.), if the input-output difference voltage becomes small or load transients are caused, the OFF period can be caused once in four -cycle period of normal cycle. As a result, the min. OFF time becomes 190 ns (Typ.) substantially, and the maximum duty cycle can be improved. Normal Operation

No. EY-511-220222 Through-current Protection The HGATE pin voltage (VHGATE) and the LGATE pin voltage (VLGATE) are monitored to protect a through- current caused by an external MOSFET. In the case of turning-on the low-side MOSFET, after a difference between VHGATE - LX pin voltage (VLX) becomes 1V or less, increasing VLGATE can prevent not to turn on both of the high-side and low-side MOSFETs at a time and thereby prevent the through-current. In the case of turning-on the high-side MOSFET, after a difference between VLGATE - GND (PGND pin voltage) becomes 1 V or less, increasing a difference between VHGATE - VLX can prevent the through-current. Reverse Current Limit Function The reverse current limit function can be to limit the current by the peak current method to turn t he low-side MOSFET off when the potential differences between voltage of VOUT and SENSE is over the reverse current limit threshold voltage. Reverse current limit inductor peak current is calculated by the following equation. Reverse current limit inductor peak current (A) = Reverse current limit threshold voltage (mV) / RSENSE (mΩ) This function mainly operates when the output is tied to a voltage higher than the set output voltage in some reasons.

No. EY-511-220222 SSCG (Spread Spectrum Clock Generator) In order to reduce the interference of conductive / radioactive noise, we have prepared an option of SSCG (Spread Spectrum Clock Generator) function. SSCG function is valid during PWM operation. SSCG suppresses the peak noise by spreading the switching frequency in a specific range. In this option, the switching frequency (fOSC) changes in between -7.2% (Typ.) and the original frequency. The modulation cycle is fOSC / 128. See the figure below. SSCG is valid only during PWM operation and disabled during VFM operation. Also note that the SSCG is invalid when an external clock is applied. At soft start, the switching frequency is not modulated and operates at the set frequency or the external clock frequency. Switching frequency modulation diagram by SSCG fOSC0 fOSC0-7.2% Switching Frequency Time T = 128 / fOSC0 Soft Start

No. EY-511-220222 Bad Frequency (BADFREQ) Protection If a resistor connected RT pin is open or short, the switching of the R1260S stops. In other words, when a current equivalent to 1000 kHz (Typ.) or more or 100 kHz (Typ.) or less flows to the RT pin, the R1260S stops switching and the internal state becomes before the soft-start condition. The R1260S will restart under the normal control with soft start when recovering from the abnormal condition. PGOOD time VFB 0.8V time BADFEQ Detection BADFEQ Release BADFREQ Detection / Release Sequence Thermal shutdown function When the junction temperature exceeds the thermal shutdown detection temperature (Typ.160°C), this IC cuts off the output and suppresses the self-heating. When the junction temperature falls below the thermal shutdown release temperature (Typ.140°C), this IC will restart with the soft start operation.

No. EY-511-220222 TECHNICAL NOTES The performance of power source circuits using this IC largely depends on peripheral circuits. When selecting the peripheral components, please consider the conditions of use. Do not allow each component, PCB pattern or the IC to exceed their respected rated values (voltage, current, and power) when designing the peripheral circuits.

  • It is recommended to mount all the external components on the same layer as the IC on board. External components must be connected as close as possible to the ICs and make wiring as short as possible. Especially, the capacitor connected in between VIN pin and GND pin must be wiring the shortest. If their impedance is high, internal voltage of the IC may shift by the switching current, and the operating may be unstable. Make the power supply and GND lines sufficient.
  • Since the current loop of a switching regulator changes with each switching, the current changes significantly and high-frequency noise may be generated due to parasitic capacitance and inductance. Design the board layout so that the current loop length is as short as possible. Also, make sure that the current loops do not overlap the line from C OUT to the subsequent load side to avoid the bad impact from the output voltage ripple.
  • AGND and PGND for the controller must be wired to the GND line at the low impedance point of the same layer with CIN and COUT. Reduce the impedance between the AGND and PGND of IC
  • It is recommended that the CIN, high-side, and low-side MOSFETs be placed on the same layer as the IC on PCB. If vias are used and placed on a different layer from the IC, the parasitic inductance of vias may affect the ringing of the LX pin voltage and increase noise.
  • R TOP, RBOT, and CSPD should be set close to the FB pin, but mount them away from the inductor, LX pin, and BST pin to avoid their noise.
  • Place a capacitor (CBST) as close as possible to the LX pin and the BST pin. If controlling slew rate for EMI, a resistor (RBST) should be in series between the BST pin and the capacitor (CBST), but not be in series to MOSFET for HGATE and LGATE pins. Because connecting the resistor in series to the MOSFET becomes a cause of a through-current.
  • The tab on the bottom of the HSOP-18 package must be connected to GND when mounted on the board. To improve thermal dissipation on the multilayer board, set via to release the heat to the other layer in the connecting part of the tab on the bottom. Likewise, thermal dissipation for MOSFET is required.
  • The MODE pin requires the "High" / "Low" voltages with the high stability when the forced PWM mode (MODE = “High”) or the VFM mode (MODE = “Low”) is enabled. If the voltage with the high stability cannot be applied, connection to the VCC pin as “High” level or the AGND pin as “Low” level is recommended. If connecting to the PGND pin as noisy, a malfunction may occur. Avoid the use of the MODE pin being “Open”.

No. EY-511-220222

  • If VOUT is a minus potential, the setup cannot occur.
  • The power for the controller and for the high-side MOSFET must be used on the same power supply, since the internal slope compensation is applied as the power supply voltage of the high- side MOSFET is equal to the controller’s. If applying the other power supply voltage, the controller will become unstable owing to the inappropriate slope compensation.
  • The thermal shutdown function prevents the IC from danger in smoke or burn, but not to ensure the reliability of the IC or to keep it below the absolute maximum rating. In addition, it is not effective against the heat generated by abnormal condition such as latch-up and overvoltage forcing.
  • Do not design with depending on the thermal shutdown function of this IC as the system protection. The thermal shutdown function is designed for this IC.

No. EY-511-220222

APPLICATION INFORMATION

Typical Application Circuit R1260Sxxyz V CC HGA TE B ST LGA TE LX MO DE PGND PGOOD AGND V IN VOUT CS S/ TRK FB CE RT COMP SE NSE VIN 5V to 60V L 10uH VOUT 3 . 3V HS/LS NCH-FET SQJ40 2EP NC CC2 470pF CC 10nF RC 3.3kΩ RRT 117k Ω (160k //430k) RBO T 22kΩ RTO P 68.8k Ω CSP D 220pF CSS 33nF CIN 30uF RSE N 3mΩ CO UT 300uF CVC C 2.2uF CBS T 0.22uF Diode DFLS1100 Q-7 R1260S Typical Application Circuit at 250 kHz / 3.3V Symbol Capacitor Parts Number Maker CIN 10µF*3(para) CGA9N3X7S2A106K TDK COUT 100µF*3(para) CKG57NX7S1C107M TDK CBST 0.22µF GCM188R71E224KA55D muRata CVCC 2.2µF GCM21BR71E225KA73L muRata Symbol Inductance Parts Number Maker L 10µH IHLP5050FDER100M5A VISHAY Symbol FET Parts Number Maker FET MOSFET N-CH SQJ402EP VISHAY Symbol Diode Parts Number Maker Diode Diode DFLS1100Q-7 DIODES

No. EY-511-220222 R1260Sxxyz V CC HGA TE B ST LGA TE LX MO DE PGND PGOOD AGND V IN VOUT CS S/ TRK FB CE RT COMP SE NSE VIN 5V to 60V L 15uH VOUT HS/LS NCH-FET SQJ40 2EP NC CC2 330pF CC 10nF RC 5.6kΩ RRT 117k Ω (160k //430k) RBO T 22kΩ RTO P 115k Ω CSP D 150pF CSS 33nF CIN 30uF RSE N 3mΩ CO UT 222uF CVC C 2.2uF CBS T 0.22uF Diode DFLS1100 Q-7 R1260S Typical Application Circuit at 250 kHz / 5.0V Symbol Capacitor Parts Number Maker CIN 10µF*3(para) CGA9N3X7S2A106K TDK COUT 100µF*2+22µF*1(para) CKG57NX7S1C107M TDK CGA6P1X7R1C226M TDK CBST 0.22µF GCM188R71E224KA55D muRata CVCC 2.2µF GCM21BR71E225KA73L muRata Symbol Inductance Parts Number Maker L 15µH IHLP5050FDER150M5A VISHAY Symbol FET Parts Number Maker FET MOSFET N-CH SQJ402EP VISHAY Symbol Diode Parts Number Maker Diode Diode DFLS1100Q-7 DIODES

No. EY-511-220222 Selection of External Components External components and its value required for R1260S are described. Each value is reference value at initial. Since inductor’s variations and output capacitor’s effective value may lead a drift of phase characteristics, adjustment to a unity-gain and phase characteristics may be required by evaluation on the actual unit. Inductor

  • Choose an inductor that has small DC resistance, has sufficient allowable current and is hard to cause magnetic saturation. The inductance value must be determined with consideration of load current under the actual condition. If the inductance value of an inductor is extremely small, the peak current of LX may increase along with the load current. As a result, the current limit circuit may start to operate when the peak current of LX reaches to “LX limit current”. Capacitor
  • Choose a capacitor that has a sufficient margin to the drive voltage ratings with consideration of the DC bias characteristics and the temperature characteristics.
  • Ceramic capacitors are recommended for CIN and COUT. If combined use of a ceramic and an electrolyte capacitors, the stable operation will improve since the margin becomes bigger. Choose the electrolyte capacitor with the lowest possible ESR with consideration of the allowable ripple current rating (I RMS). IRMS can be calculated by the following equation. IRMS ≒ I OUT/ VIN x √{ VOUT x (VIN – VOUT) } MOSFET
  • Gate – Source Voltage When considering variations in production and margin, a MOSFET with a withstand voltage of 10 V or more is recommended despite the 5 V high and low driver.
  • Gate Threshold Voltage Choose a MOSFET with the threshold voltage between 1.0 V (Min.) and 3.4 V (Max.) with consideration of variations in production and margin.
  • Drain Current Choose a MOSFET having a sufficient margin with consideration of peak current and limit current.
  • Input Capacitor (CISS) As an index of performance, CISS: 1000pF ～ 2000pF
  • On-resistance (RDS (on)) & All Gate Capacitance (Qg) Choose a MOSFET with the lowest possible characteristics because having an influence on efficiency. Generally, a high-performance MOSFET is rated that RDS x Qq (performance figure) is small.
  • Since test specifications vary with MOSFET makers, it is necessary to confirm the application with the R1260S implemented on a board system.

No. EY-511-220222 Diode

  • A Schottky barrier diode with a small forward voltage (VF) is recommended. If the VF is large, the BST pin voltage will drop, and the gate drive voltage of the MOSFET will drop, which may deterioration efficiency. Select a Schottky barrier diode based on VF = 0.5V (at IF = 100mA) or less.
  • If the reverse current (IR) becomes large at high temperature, it may cause thermal runaway, which may lead to IC destruction. Use a diode with as low an IR as possible.
  • At both ends of the diode is applied a voltage between the BST pin - VCC pin. Considering the ringing of the BST pin voltage and the drop of the VCC voltage, it is recommended to use a diode with "maximum input voltage (VIN) + 6V" or higher voltage rating. 1. Determination of Requirements Determine the frequency, the output capacitor, and the input voltage required. For reference values, parameters listed in the following table will be used to explain each equation. Parameter Value Output Voltage (VOUT) 3.3 V Output Current (IOUT) 5 A Input Voltage (VIN) 48 V Input Voltage Range 20 V to 60 V Frequency (fOSC) 250 kHz ESR of Output Capacitor (RCOUT_ESR) 3 mΩ 2. Selection of Unity-gain Frequency (f UNITY) The unity-gain frequency (fUNITY) is determined by the frequency that the loop gain becomes “1” (zero dB). It is recommended to select within the range of one-sixth to one-tenth of the oscillator frequency (fOSC). Since the fUNITY determines the transient response, the higher the fUNITY, the faster response is achieved, but the phase margin will be tight. Therefore, it is required that the fUNITY can secure the adequate stability. As for the reference, the fUNITY is set to 12.5 kHz.

No. EY-511-220222 3. Selection of Inductor After the input and the output voltages are determined, a ripple current (∆IL) for the inductor current is determined by an inductance (L) and an oscillator frequency (fOSC). The ripple current (∆IL) can be calculated by Equation 1. VIN_MAX : Maximum input voltage The core loss in the inductor and the ripple current of the output voltage become small when the ripple current (∆IL) is small. But, a large inductance is required as shown by Equation 1. The inductance can be calculated by Equation 2 when a reference value of ∆IL assumes 30% of IOUT is appropriate value. = (VOUT / (IOUT x 0.3) / fOSC) x (1-VOUT / VIN_MAX) The inductance can be calculated by substituting each parameter to Equation 2. L = (3.3 V / 5 A / 250 kHz) x (1-3.3 V / 60 V) = 8.32 µH When selecting the inductor of 6.8µH as an approximate value of the above calculated value, ∆I L can be shown as below. = 1.834 A when used in the automatic switching mode (MODE = "Low"), consider the maximum value of the offset voltage of the reverse current detection comparator for detecting a continuous current mode and discontinuous mode. Select L for which the calculation result of Equation 2 satisfies the following Equation 3. ΔI = 10 mV / 11.6 mΩ * 2 = 1.724 A RONL: ON resistance of low-side MOSFET Note that if Equation 3 is not met, PWM mode may not switch to VFM mode at light loads. In that case, reduce the inductance value and increase ΔIL, or reselect the low-side MOSFET with a large RONL.

No. EY-511-220222 4. Setting of Output Capacitance The output capacitance (COUT) must be set to meet the following conditions. ■ Calculation based on phase margin To secure the adequate stability, it is recommended that the pole frequency (fP_OUT) is set to become equal or below one-fourteenth of the unity-gain frequency. The pole frequency (fP_OUT) can be calculated by Equation fP_OUT = 1/(2 x π x COUT_EFF x ((ROUT_MIN x 2 x π x f OSC x L) / (ROUT_MIN + 2 x π x fOSC x L) + RCOUT_ESR)) COUT_EFF : Output capacitance (effective value) ROUT_MIN : Output resistance at maximum output current ROUT_MIN = VOUT/ IOUT = 3.3 V / 5 A = 0. 66 Ω Can be expressed by substituting fP_OUT = fUNITY / 14 to Equation 4. COUT_EFF = 14 / (2 ×π× fUNITY × ((ROUT_MIN × 2 ×π× fOSC × L) / (ROUT_MIN + 2 ×π× fOSC × L) + RCOUT_ESR)) Then, the output capacitance (effective value) can be calculated by substituting each parameter to Equation 5. C OUT_EFF = 285.4 µF ■ Calculation based on ripple at PWM mode With using the calculated value of C OUT, the amount of ripple at the PWM mode can be shown as Equation 6 and Equation 7. I IL_PWM: maximum inductor current at PWM VOUT_PWM : Maximum output ripple at PWM PWM ripple, must be set to be equal to or less than the about 10 ~ 15mV. If VOUT_PWM is over the target value, the output capacitance must be calculated by Equation 8.

No. EY-511-220222 Substituting each parameter into Equation 8, the output capacitance (effective value) is as follows. COUT_EFF = 1.724 A / 2 / 250 kHz / (15 mV – 3mΩ × 1.724 A) = 350.8 µF It is recommended that the output capacitance is set to become equal or over the effective value calculated by Equation 5 and 8. When using in the automatic switching mode (MODE = ”Low”), also consider and select “Calculation based on ripple at VFM mode” described later. The output capacitance (effective value), which is derated depending on the DC voltage applied, can be calculated by Equation 9. Refer to “Capacitor Manufacture’s Datasheet” for details about derating. C COUT_SET : Output capacitor’s spec VCO_AB : Capacitor’s voltage rating With using Equation 9, the effective value is calculated to become 350.8 µF or more. The output voltage (COUT) can be shown as below when VCO_AB is 16 V. COUT_SET > COUT_EFF / ((VCO_AB - VOUT) / VCO_AB) COUT > 441.9 µF As the calculated result, COUT selects a capacitor of 470 µF (the effective value is 373.1 µF). PWM ripple at this time is as follows from the formula 7. VOUT_PWM = 3 mΩ × 1.724 A + (1.724 A / 2) / 250 kHz / 373.1 µF = 14.41 mV

No. EY-511-220222 ■ Calculation based on ripple at VFM mode With using the calculated value of COUT, the amount of ripple at the VFM mode can be shown as Equation 10 and Equation 11. It is not necessary to consider this parameter when using forced PWM. IL_VFM : Maximum current of inductor COEF_TON_VFM : On-time scaling (multiples of PWM_ON time) VOUT_VFM : Maximum output ripple COEF_TON_VFM can be calculated by 1.54 times (Typ.) as the design value. The ripple value can be calculated by substituting each parameter to Equation 10 and Equation 11. IL_VFM = ((60 V - 3.3 V ) / 6.8 µH) × 1.54 × 3.3 V / 60 V / 250 kHz = 2.824 A VOUT_VFM = 3 mΩ ×2.824 A + 1.54 × (2.824 A / 2) / 250 kHz / 373.1 µF = 31.78 mV However, if VOUT_VFM is set too small, the inductor current may be superimposed by continuous switching during VFM mode operation. Thus, the VFM ripple voltage may increase, or the inductor current may become unstable, causing the phenomenon of fluctuating between PWM mode and VFM mode. Confirm that the VFM ripple voltage satisfies the following equation 12. = 14.41mV / 2 + 15.3mV = 22.51mV Equation 12 is a conditional expression for not switching in succession when switching from the PWM mode to the VFM mode. VFM ripple voltage in the calculation example satisfies Equation 12. If Equation 12 cannot be met, adjust the COUT value. The condition of the capacity value can be calculated as follows. C = 650.46 [ µF] The effective value C OUT_EFF of COUT in the calculation example satisfies the above equation 13. If there is no capacity value condition that satisfies the above, reduce the inductance value in order to increase the inductor current.

No. EY-511-220222 5. Designation of Phase Compensation Since the current amplifier for the voltage feedback is output via the COMP pin, the phase compensation is achieved with using external components. The phase compensation is able to secure stable operation with using an external ceramic capacitor and the phase compensation circuit. RBOT RTOP CC2CC RC CS PD VREF 0.8V VOUT COMP ERROR_AMP VFB Connection Example for External Phase Compensation Circuit ■ Calculation of RC The phase compensation resistance (RC) to set the calculated unity-gain frequency can be calculated by Equation 14. gm_ea : Error amplifier of gm VREF : Reference voltage (0.8 V) gm_pwr : power level of gm gm_pwr × ∆VS = ∆IL gm_ea / ∆VS = M × 10 ^ (-6) × fOSC / VOUT ∆VS : Output amplitude of the slope circuit M : Slope Coefficient M = 0.148 (R1260S01yz) , 0.298 (R1260S02yz) , 0.576 (R1260S03yz) RC can be calculated by substituting Equation 15 to Equation 14. RC = 2 ×π× fUNITY × VOUT × COUT_EFF / (VREF × M × 10 ^ (-6) × ∆IL × fOSC / VOUT) =3.105 kΩ ≒3.3 kΩ ※For R1260S02yz

No. EY-511-220222 ■ Calculation of CC CC must be calculated by Equation 4 so that the zero frequency of the error amplifier meets the highest pole frequency (fP_OUT). Then, fP_OUT = 0.683 kHz is determined by calculation of Equation 16. = 70.65 nF ≒ 68 nF ■ Calculation of CC2 CC2 can be calculated by two different calculation methods to vary from the zero frequency (f Z_ESR) depending on the ESR of a capacitor. f Z_ESR can be calculated by Equation 17. = 142.2 kHz [When the zero frequency is lower than fOSC / 2] CC2 sets the pole to fZ_ESR. [When the zero frequency is higher fOSC / 2] CC2 sets the pole to fOSC / 2 so as to be a noise filter for the COMP pin. f OSC / 2 = 1 / (2 ×π× RC × CC2） In the reference example, CC2 is used as the noise filter for the COMP pin because of being higher than fOSC/2. CC2 = 385.83 pF ≒ 330 pF

No. EY-511-220222 ■ Calculation of CSPD CSPD sets the zero frequency to meet the unity-gain frequency. RTOP = RBOT × (VOUT / VREF -1) When RBOT = 22 kΩ, RTOP = 22 k × (3.3 V / 0.8 V -1) = 68.8 kΩ CSPD = 1 / (2 ×π× 12.5 kHz × 68.8 kΩ) = 185.1 pF ≒ 2 20 pF MOSFET Losses The MOSFET total loss is calculated by the sum of the switching losses when the high-side and the low- side MOSFETs turning-on / off and the conduction losses by the MOSFET’s on-resistance. If the total loss become larger than expected, the external MOSFET must be selected with consideration of the on- resistance, the switching losses and the package’s power dissipation. The following figure shows the timing chart of the high side / low side MOSFETs at normal switching. The loss at each delay time can be calculated as follows. VF (Body Diode) LS-FET VDS (RONL × IOUT ) LX LS-FET VGS HS-FET VGS VTH VSP VCC VIN VTH VSP DC / DC Converter Basic Switching Timing Chart time t1 t2 t3 t4 t5 t6t6 VCC

No. EY-511-220222 t1 (t5): For the duration between the low-side MOSFET’s turn-off and the high-side MOSFET’s turn-on, the loss occurs to supply a current from the body diode on the low-side MOSFET. Likewise, for the duration between the high-side MOSFET’s turn-off and the low-side MOSFET’s turn-on, the loss occurs. The losses (PDEAD) for t1 and t5 can be calculated by the following equation. PDEAD = VF × IOUT × fOSC × (tDEAD1 + tDEAD5) V F: The forward voltage of a body-diode tDEAD1: The delay time from the instant when the gate-source voltage (VGS) falls below the threshold voltage (VTH) on the low-side MOSFET to the instant when VGS exceeds VTH on the high-side MOSFET. TDEAD5: The delay time from the instant when VGS falls below VTH on the high-side MOSFET to the instant when VGS exceeds VTH on the low-side MOSFET. t2 (t4): Since the drain-source voltage (VDS) is equal to VIN when the high-side MOSFET turns on/off after delay time (tDEAD1 / tDEAD5), the source current and the output current (IOUT) become equal. Therefore, a large loss occurs. The losses (PSW) at turn-on / off can be calculated by the following equation. P SW = 1/2 × VIN × IOUT × fOSC × (tRISE + tFALL) t RISE: A duration between the gate voltage rising start time from the threshold voltage and the end of stabilized voltage (VSP) on the high-side MOSFET. TFALL: A duration between the start time of the gate voltage stabilizing and the falling time below the threshold voltage on the high-side MOSFET. For the stabilized duration, V GS of the high-side MOSFET remains constant roughly since the gate charge current is used to charge CGD. And, the reverse recovery loss (PRR) occurs to recover the body diode of the low-side MOSFET when the high-side MOSFET turns on. Refer to the MOSFET datasheet for information about the electric charge (Qrr) required for recovery. PRR = VIN × Qrr × fOSC

No. EY-511-220222 The power (PGH, PGL) for electric charge of the MOSFET’ gate and the power (POSSH, POSSL) for electric charge of the MOSFET’s output capacity occur. Each power can be calculated by following equations. Refer to the MOSFET datasheet for detailed values. PGH = QGH × VCC × fOSC PGL = QGL × VCC × fOSC POSSH = 1/2 × COSSH × (VIN)2 × fOSC POSSL = 1/2 × COSSL × (VIN)2 × fOSC VCC: VCC pin voltage QGH, QGL: Gate electric charge quantity for High- /Low- side MOSFETs COSSH, COSSL: Drain-gate capacity + Drain-source capacity for High- /Low- side MOSFETs t3 (t6): For the duration of t3, the conduction loss of the high-side MOSFET (P HS(on)) occurs. For the duration of t6, the conduction loss of the low-side MOSFET (PLS(on)) occurs. Each loss can be calculated by the following equation. ON duty is closely analogous to VOUT / VIN. IRMS = √ (((IOUT)2 + (IP-P)2 / 12)) PHS (on) = (IRMS)2 × RONH × VOUT / VIN PLS (on) =(IRMS)2 × RONL × (1-VOUT / VIN) IRMS: MOSFET’s rms current IP-P: MOSFET’s peak current amplitude RONH, RONL: On-resistance for High- /Low- side MOSFETs Since the conduction loss depends on the duty, the loss varies with step-down ratio. When the step-down ratio is large and the ON duty is small, the loss of the low side MOSFET becomes larger, and when the ratio is small, the loss of the high-side MOSFET becomes larger. From above equations, each loss of the high-side and the low-side MOSFETs can be calculated by the following equations. PHS = PHS (on) + PSW + PRR + PGH + POSSH PLS = PLS (on) + PGL + POSSL + PDEAD As is evident from these equations, the switching loss becomes predominant when the input voltage and the frequency are high, and the conduction loss conversely becomes predominant when they are low.

No. EY-511-220222 PCB Layout R1260S (Package：HSOP-18) PCB Layout Top Layer Bottom Layer

No. EY-511-220222 TYPICAL CHARACTERISTICS Note: Typical Characteristics are intended to be used as reference data; they are not guaranteed. 1）FB Voltage VIN = 48 V , MODE = "High" 2）Oscillation Frequency VIN = 48 V , MODE = "High" 150 kHz (RT = 200 kΩ) 600 kHz (RT = 47 kΩ) 3）Soft-Start Time VIN = 48 V , Css = open VIN = 48 V , Css = 4.7 nF 0.784 0.788 0.792 0.796 0.800 0.804 0.808 0.812 0.816 -40 -20 0 20 40 60 80 100 120 VFB [V] Ta [degC] 135 140 145 150 155 160 165 -40 -20 0 20 40 60 80 100 120 fOSC0 [kHz] Ta [degC] 540 560 580 600 620 640 660 -40 -20 0 20 40 60 80 100 120 fOSC1 [kHz] Ta [degC] 250 350 450 550 650 750 850 950 1050 1150 -40 -20 0 20 40 60 80 100 120 tSS1 [µs] Ta [degC] 1600 1800 2000 2200 2400 2600 2800 -40 -20 0 20 40 60 80 100 120 tSS2 [µs] Ta [degC]

No. EY-511-220222 4）Current Limit Threshold Voltage R1260S023A , VIN = 48 V , MODE = "High" Current Limit Threshold Voltage Reverse Current Limit Threshold Voltage 5）LX Ground Short / VIN Short Detection Threshold Voltage VIN = 48 V , MODE = "High" LX Ground Short Detection Threshold Voltage LX VIN Short Detection Threshold Voltage 6）Current Consumption R1260S023A , VIN = 48 V , VOUT = 5 V MODE = "Low" MODE = "High" 100 104 108 112 116 -40 -20 0 20 40 60 80 100 120 VILIMIT [mV] Ta [degC] -62 -58 -54 -50 -46 -42 -38 -40 -20 0 20 40 60 80 100 120 VIREVLIMIT [mV] Ta [degC] 0.80 0.90 1.00 1.10 1.20 -40 -20 0 20 40 60 80 100 120 VLXSHORTL [V] Ta [degC] 0.36 0.38 0.40 0.42 0.44 -40 -20 0 20 40 60 80 100 120 VLXSHORTH [V] Ta [degC] -40 -20 0 20 40 60 80 100 120 IVIN2 [µA] Ta [degC] 0.6 0.8 1.0 1.2 1.4 -40 -20 0 20 40 60 80 100 120 IVIN1 [mA] Ta [degC]

No. EY-511-220222 7）UVLO Release / Detection Voltage UVLO Release Voltage UVLO Detection Voltage 8）CE Input Voltage VIN = 48 V , CE = "High" VIN = 48 V , CE = "Low" 9）Efficiency R1260S023A , VIN = 12 V / 24V / 48 V , MODE = "High / Low" , VOUT = 3.3 V fosc = 250 kHz fosc = 600 kHz 4.20 4.30 4.40 4.50 4.60 4.70 4.80 -40 -20 0 20 40 60 80 100 120 VUVLO2 [V] Ta [degC] 3.68 3.73 3.78 3.83 3.88 3.93 3.98 -40 -20 0 20 40 60 80 100 120 VUVLO1 [V] Ta [degC] 1.10 1.15 1.20 1.25 1.30 -40 -20 0 20 40 60 80 100 120 VCEH [V] Ta [degC] 1.10 1.15 1.20 1.25 1.30 -40 -20 0 20 40 60 80 100 120 VCEL [V] Ta [degC] 100 0.01 0.1 1 10 100 1000 10000 Efficiency [%] Output Current Iout [mA] Vin= 12 V Vin= 24 V Vin= 48 V VIN = 12 V VIN = 24 V VIN = 48 V MODE=L MODE=H 100 0.01 0.1 1 10 100 1000 10000 Efficiency [%] Output Current Iout [mA] Vin= 12 V Vin= 24 V Vin= 48 V VIN = 12 V VIN = 24 V VIN = 48 V MODE=L MODE=H

No. EY-511-220222 R1260S023A , VIN = 12 V / 24V / 48 V , MODE = "High / Low" , VOUT = 5.0 V fosc = 250 kHz fosc = 600 kHz R1260S032A , VIN = 24 V / 48 V , MODE = "High / Low" , VOUT = 12 V fosc = 250 kHz fosc = 600 kHz 10）Load Transient Response R1260S023A , VIN = 48 V, IOUT = 0 A ⇔ 1 A , fosc = 250 kHz VOUT = 3.3 V , MODE = "Low" 100 0.01 0.1 1 10 100 1000 10000 Efficiency [%] Output Current Iout [mA] Vin= 12 V Vin= 24 V Vin= 48 V VIN = 12 V VIN = 24 V VIN = 48 V MODE=HMODE=L 100 0.01 0.1 1 10 100 1000 10000 Efficiency [%] Output Current Iout [mA] Vin= 12 V Vin= 24 V Vin= 48 V MODE=H VIN = 12 V VIN = 24 V VIN = 48 V MODE=L 100 0.01 0.1 1 10 100 1000 10000 Efficiency [%] Output CurrentIout [mA] Vin= 24 V Vin= 48 V MODE=HMODE=L VIN = 24 V VIN = 48 V 100 0.01 0.1 1 10 100 1000 10000 Efficiency [%] Output Current Iout [mA] Vin= 24 V Vin= 48 V MODE=HMODE=L VIN = 24 V VIN = 48 V 0.0 0.5 1.0 1.53.1 3.2 3.3 3.4 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current 0.0 0.5 1.0 1.5 3.1 3.2 3.3 3.4 3.5 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current

No. EY-511-220222 R1260S023A , VIN = 48 V, IOUT = 0 A ⇔ 1 A , fosc = 250 kHz VOUT = 3.3 V , MODE = "High" R1260S023A , VIN = 48 V, IOUT = 0 A ⇔ 1 A , fosc = 250 kHz VOUT = 5.0 V , MODE = "Low" R1260S023A , VIN = 48 V, IOUT = 0 A ⇔ 1 A , fosc = 250 kHz VOUT = 5.0 V , MODE = "High" 0.0 0.5 1.0 1.53.1 3.2 3.3 3.4 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current Output Voltage Output Current 0.0 0.5 1.0 1.5 3.1 3.2 3.3 3.4 3.5 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current Output Voltage Output Current 0.0 0.5 1.0 1.54.6 4.8 5.0 5.2 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current Output Voltage Output Current 0.0 0.5 1.0 1.54.6 4.8 5.0 5.2 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current Output Voltage Output Current 0.0 0.5 1.0 1.54.6 4.8 5.0 5.2 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current 0.0 0.5 1.0 1.54.6 4.8 5.0 5.2 Output Current IOUT [A] Output Voltage VOUT [V] Time [ms] Output Voltage Output Current

No. EY-511-220222 11）Output Voltage vs Output Current R1260S023A , VIN = 48 V , MODE = "High / Low" VOUT = 3.3 V , fosc = 250 kHz VOUT = 5.0 V , fosc = 500 kHz 12）Input Transient Response R1260S023A , VIN = 24 V ⇔ 54 V , VOUT = 3.3 V , fosc = 250 kHz IOUT = 0.1 A , MODE = "Low" R1260S023A , VIN = 24 V ⇔ 54 V , VOUT = 3.3 V , fosc = 250 kHz IOUT = 5 A , MODE = "High" 3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50 0 1000 2000 3000 4000 5000 Output Voltage VOUT [V] Output Currnet IOUT [mA] MODE=H, VIN=48V MODE=L, VIN=48V 4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25 0 1000 2000 3000 4000 5000 Output Voltage VOUT [V] Output Currnet IOUT [mA] MODE=H, VIN=48V MODE=L, VIN=48V 723.1 3.2 3.3 3.4 3.5 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Output Voltage Input Voltage 723.1 3.2 3.3 3.4 3.5 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Input Voltage Output Voltage 723.1 3.2 3.3 3.4 3.5 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Output Voltage Input Voltage 723.1 3.2 3.3 3.4 3.5 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Output Voltage Input Voltage

No. EY-511-220222 R1260S023A , VIN = 24 V ⇔ 54 V , VOUT = 5.0 V , fosc = 250 kHz IOUT = 0.1 A , MODE = "Low" R1260S023A , VIN = 24 V ⇔ 54 V , VOUT = 5.0 V , fosc = 250 kHz IOUT = 5 A , MODE = "High" 13）Line Regulation R1260S023A , MODE = "High" , fosc = 250 kHz , IOUT = 0 A VOUT = 3.3 V VOUT = 5.0 V 724.8 4.9 5.0 5.1 5.2 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Output Voltage Input Voltage 724.8 4.9 5.0 5.1 5.2 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Output Voltage Input Voltage 724.8 4.9 5.0 5.1 5.2 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Output Voltage Input Voltage 724.8 4.9 5.0 5.1 5.2 Input Voltage VIN [V] Output Voltage VOUT [V] Time [ms] Output Voltage Input Voltage 3.20 3.25 3.30 3.35 3.40 0 20 40 60 Output Voltage VOUT [V] Input Voltage VIN [V] 0V → 54V 54V → 0V 4.70 4.80 4.90 5.00 5.10 5.20 5.30 0 20 40 60 Output Voltage VOUT [V] Input Voltage VIN [V] 0V → 54V 54V → 0V

No. EY-511-220222 14）Up-Down Tracking R1260S023A , VIN = 48 V , VOUT = 3.3 V , IOUT = 0 A fosc = 250 kHz , MODE = "High" 15）Dropout Voltage R1260S023A , VIN = 0 ⇔ 16 V , VOUT = 3.3 V , MODE = "High" , IOUT = 0 / 1 / 5 A fosc = 250 kHz UVLO Release Voltage Zoom-in View UVLO Detection Voltage Zoom-in View 0.0 0.5 1.0 1.5 -20 0 20 40 60 80 CSS/TRK Input Voltage [V] Output Voltage VOUT [V] Time [ms] Output Voltage CSS/TRK Voltage 0 10 20 30 VIN / VOUT Voltage [V] IOUT=0A Iout=1A Iout=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2 3 4 5 6 VIN / VOUT Voltage [V] IOUT=0A Iout=1A Iout=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 26 27 28 29 30 VIN / VOUT Voltage [V] IOUT=0A Iout=1A Iout=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage

No. EY-511-220222 R1260S023A , VIN = 0 ⇔ 16 V , VOUT = 3.3 V , MODE = "High" , IOUT = 0 / 1 / 5 A fosc =600 kHz UVLO Release Voltage Zoom-in View UVLO Detection Voltage Zoom-in View R1260S023A , VIN = 0 ⇔ 16 V , VOUT = 5.0 V , MODE = "High" , IOUT = 0 / 1 / 5 A fosc = 250 kHz 0 10 20 30 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2 3 4 5 6 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 26 27 28 29 30 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 0 10 20 30 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage

No. EY-511-220222 UVLO Release Voltage Zoom-in View UVLO Detection Voltage Zoom-in View R1260S023A , VIN = 0 ⇔ 16 V , VOUT = 5.0 V , MODE = "High" , IOUT = 0 / 1 / 5 A fosc =600 kHz UVLO Release Voltage Zoom-in View UVLO Detection Voltage Zoom-in View 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2 3 4 5 6 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 26 27 28 29 30 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 0 10 20 30 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2 3 4 5 6 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 26 27 28 29 30 VIN / VOUT Voltage [V] Vo,Io=0A Vo,Io=1A Vo,Io=5A IOUT = 0 A IOUT = 1 A IOUT = 5 A Input Voltage Output Voltage

PD-HSOP-18-(125150)-JE-B i The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD. 51-7. Measurement Conditions Item Measurement Conditions Environment Mounting on Board (Wind Velocity = 0 m/s) Board Material Glass Cloth Epoxy Plastic (Four-Layer Board) Board Dimensions 76.2 mm × 114.3 mm × 0.8 mm Copper Ratio Outer Layer (First Layer): Less than 95% of 50 mm Square Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square Through-holes  0.3 mm × 21 pcs Measurement Result (Ta = 25°C, Tjmax = 150°C) Item Measurement Result Power Dissipation 3900 mW Thermal Resistance (ja) ja = 32°C/W Thermal Characterization Parameter (ψjt) ψjt = 8°C/W ja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter Power Dissipation vs. Ambient Temperature Measurement Board Pattern 500 1000 1500 2000 2500 3000 3500 4000 0 25 50 75 100 125 150 Power Dissipation PD (mW) Ambient Temperature (°C) 3900

PACKAGE DIMENSIONS HSOP-18 i DM-HSOP-18-JE-B

MARKING SPECIFICATION R1260S MK-R1260S-JE-A i : Product Code … Refer to the following table : Lot Number … Alphanumeric Serial Number HSOP-18 Marking Specification NOTICE There can be variation in the marking when different AOI (Automated Optical Inspection) equipment is used. In the case of recognizing the marking characteristic with AOI, please contact our sales or our distributor before attempting to use AOI. R1260S M arking List R1260S011A RS140 A R1260S011D RS140 V R1260S012A RS140 B R1260S012D RS140 W R1260S013A RS140 C R1260S013D RS140 X R1260S021A RS140 D R1260S021D RS140 Y R1260S022A RS140 E R1260S022D RS140 Z R1260S023A RS140 F R1260S023D RS141 A R1260S011B RS140 G R1260S031A RS142 A R1260S012B RS140 H R1260S032A RS142 B R1260S013B RS140 J R1260S033A RS142 C R1260S021B RS140 K R1260S031B RS142 D R1260S022B RS140 L R1260S032B RS142 E R1260S023B RS140 M R1260S033B RS142 F R1260S011C RS140 N R1260S031C RS142 G R1260S012C RS140 P R1260S032C RS142 H R1260S013C RS140 R R1260S033C RS142 J R1260S021C RS140 S R1260S031D RS142 K R1260S022C RS140 T R1260S032D RS142 L R1260S023C RS140 U R1260S033D RS142 M 18 10 1 9 ⑦⑧⑨ ①②③④⑤⑥

  1. T he products and the product specifications described in this document are subject to change or discontinuation of production without notice for reasons such as improvement. Therefore, before deciding to use the products, please refer to our sales representatives for the latest information thereon. 2. The materials in this document may not be copied or otherwise reproduced in whole or in part without the prior written consent of us. 3. This product and any technical information relating thereto are subject to complementary export controls (so- called KNOW controls) under the Foreign Exchange and Foreign Trade Law, and related politics ministerial ordinance of the law. (Note that the complementary export controls are inapplicable to any application-specific products, except rockets and pilotless aircraft, that are insusceptible to design or program changes.) Accordingly, when exporting or carrying abroad this product, follow the Foreign Exchange and Foreign Trade Control Law and its related regulations with respect to the complementary export controls. 4. The technical information described in this document shows typical characteristics and example application circuits for the products. The release of such information is not to be construed as a warranty of or a grant of license under our or any third party's intellectual property rights or any other rights. 5. The products listed in this document are intended and designed for use as general electronic components in standard applications (office equipment, telecommunication equipment, measuring instruments, consumer electronic products, amusement equipment etc.). Those customers intending to use a product in an application requiring extreme quality and reliability, for example, in a highly specific application where the failure or misoperation of the product could result in human injury or death should first contact us.
  • Aerospace Equipment
  • Equipment Used in the Deep Sea
  • Power Generator Control Equipment (nuclear, steam, hydraulic, etc.)
  • Life Maintenance Medical Equipment
  • Fire Alarms / Intruder Detectors
  • Vehicle Control Equipment (automotive, airplane, railroad, ship, etc.)
  • Various Safety Devices
  • Traffic control system
  • Combustion equipment In case your company desires to use this product for any applications other than general electronic equipment mentioned above, make sure to contact our company in advance. Note that the important requirements mentioned in this section are not applicable to cases where operation requirements such as application conditions are confirmed by our company in writing after consultation with your company. 6. We are making our continuous effort to improve the quality and reliability of our products, but semiconductor products are likely to fail with certain probability. In order to prevent any injury to persons or damages to property resulting from such failure, customers should be careful enough to incorporate safety measures in their design, such as redundancy feature, fire containment feature and fail-safe feature. We do not assume any liability or responsibility for any loss or damage arising from misuse or inappropriate use of the products. 7. The products have been designed and tested to function within controlled environmental conditions. Do not use products under conditions that deviate from methods or applications specified in this datasheet. Failure to employ the products in the proper applications can lead to deterioration, destruction or failure of the products. We shall not be responsible for any bodily injury, fires or accident, property damage or any consequential damages resulting from misuse or misapplication of the products. 8. Quality Warranty 8-1. Quality Warranty Period In the case of a product purchased through an authorized distributor or directly from us, the warranty period for this product shall be one (1) year after delivery to your company. For defective products that occurred during this period, we will take the quality warranty measures described in section 8-2. However, if there is an agreement on the warranty period in the basic transaction agreement, quality assurance agreement, delivery specifications, etc., it shall be followed. 8-2. Quality Warranty Remedies When it has been proved defective due to manufacturing factors as a result of defect analysis by us, we will either deliver a substitute for the defective product or refund the purchase price of the defective product. Note that such delivery or refund is sole and exclusive remedies to your company for the defective product. 8-3. Remedies after Quality Warranty Period With respect to any defect of this product found after the quality warranty period, the defect will be analyzed by us. On the basis of the defect analysis results, the scope and amounts of damage shall be determined by mutual agreement of both parties. Then we will deal with upper limit in Section 8-2. This provision is not intended to limit any legal rights of your company. 9. Anti-radiation design is not implemented in the products described in this document. 10. The X-ray exposure can influence functions and characteristics of the products. Confirm the product functions and characteristics in the evaluation stage. 11. WLCSP products should be used in l ight shielded environments. The light exposure can influence functions and characteristics of the products under operation or storage. 12. Warning for handling Gallium and Arsenic (GaAs) products (Applying to GaAs MMIC, Photo Reflector). These products use Gallium (Ga) and Arsenic (As) which are specified as poisonous chemicals by law. For the prevention of a hazard, do not burn, destroy, or process chemically to make them as gas or power. When the product is disposed of, please follow the related regulation and do not mix this with general industrial waste or household waste. 13. Please contact our sales representatives should you have any questions or comments concerning the products or the technical information. Official website https://www.nisshinbo-microdevices.co.jp/en/ Purchase information https://www.nisshinbo-microdevices.co.jp/en/buy/