DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 2

Technical content

2111 Comprehensive Drive

Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630- 851- 5040 www.conwin.com 5x7mm Precision TCXO Model D75J Description: The Connor-Winfield’s D75J is a 5x7mm Surface Mount T emperature Compensated Crystal Controlled Oscillator (TCXO) with a Tri-State LVCMOS output. Through the use of Analog T emperature Compensation, the D75J is capable of holding sub 1-ppm stabilities over the 0 to 70°C temperature range. Operating Specifications Parameter Minimum Nominal Maximum Units Notes Nominal Frequency (Fo) - 38.88, 40.0 or 50.0 - MHz Frequency Calibration @ 25 °C -1.0 - 1.0 ppm 1 Frequency Stability vs. Temperature -1.0 - 1.0 ppm 2 Frequency vs. Load Stability -0.2 - 0.2 ppm ±5% Frequency vs. Voltage Stability -0.2 - 0.2 ppm ±5% Static Temperature Hysteresis - - 0.4 ppm 3 Aging -1.0 - 1.0 ppm/year Operating Temperature Range 0 - 70 °C Supply Voltage (Vcc) 3.135 3.3 3.465 Vdc ±5% Supply Current (Icc) - - 6 mA Period Jitter - 3 5 ps rms Integrated Phase Jitter - 0.5 1.0 ps rms 4 SSB Phase Noise (Fo = 38.88 MHz) @ 10Hz offset - -70 - dBc/Hz @ 100Hz offset - -100 - dBc/Hz @ 1KHz offset - -120 - dBc/Hz @ 10KHz offset - -140 - dBc/Hz @ 100KHz offset - -145 - dBc/Hz Start-up Time - - 10 ms Absolute Maximum Ratings Parameter Minimum Nominal Maximum Units Notes Storage Temperature -55 - 85 °C Supply Voltage (Vcc) -0.5 - 6.0 Vdc Input Voltage -0.5 - Vcc+0.5 Vdc Features:

  • 3.3 Vdc Operation
  • LVCMOS Output
  • Frequency Stability: ± 1.0 ppm
  • Temperature Range: 0 to 70°C
  • Low Jitter <1ps RMS
  • Tri-State Enable/Disable Function
  • 5x7mm Surface Mount Package
  • Tape and Reel Packaging
  • RoHS Compliant / Pb Free US Headquarters: 630-851-4722 European Headquarters: +353-61-472221 LVCMOS Output Characteristics Parameter Minimum Nominal Maximum Units Notes Load - 15 - pF 6 Voltage (High) (Voh) 90%Vcc - - Vdc (Low) (Vol) - - 10%Vcc Vdc Current (High) (Ioh) -4 - - mA (Low) (Iol) - - 4 mA Duty Cycle at 50% of Vcc 45 50 55 % Rise / Fall Time 10% to 90% - - 8 ns Package Characteristics Package Hermetically sealed crystal mounted on a ceramic package Notes: 1. Initial calibration @ 25°C. Specifications at time of shipment after 48 hours of operation. 2. Frequency stability vs. change in temperature. [±(Fmax - Fmin)/(2*Fo)]. 3. Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25°C. 4. BW = 12 KHz to 20 MHz. Environmental Characteristics Vibration: Vibration per Mil Std 883E Method 2007.3 Test Condition A Shock: Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B. Soldering Process: RoHS compliant lead free. See soldering profile on page 2.

Ordering Information

D75J-038.88M, D75J-040.0M or D75J-050.0M Enable / Disable Input Characteristics (Pad 8) Parameter Minimum Nominal Maximum Units Notes Enable Voltage (High) 70%Vcc - Vdc 5 Disable Voltage (Low) - - 30%Vcc Vdc 5 Bulletin Tx238 Page 1 of 2 Revision 05 Date 14 May 2015 Available at Digi-Key www.digikey.com 5. Output is enabled with no connection to Pad 8. Leave Pad 8 open if disable function is not required. When disabled, the output is off but the oscillator and compensation circuits are still powered (current consumption < 1.3 mA). 6. For best performance it is recommended that the circuit connected to this output should have an equivalent input capacitance of 15pF .

Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches. © Copyright 2015 The Connor-Winfield Corporation Not intended for life support applications. Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630- 851- 5040 www.conwin.com Suggested Pad Layout Design Recommendations Output Waveform Tape and Reel Dimensions 1: Do Not Connect 2: Do Not Connect 3: Do Not Connect 4: Ground 5: Output 6: Do Not Connect 7: Do Not Connect 8: Tri-State Enable / Disable 9: Supply Voltage Vcc 10: N/C Pad Connections Solder Profile 120°C 150°C 180°C 260°C 220°C Up to 120 s T ypical 10 s 60 to 90 s T ypical Temperature 260°C Meets IPC/JEDEC J-STD-020C 120°C 150°C 180°C 260°C 220°C Up to 120 s T ypical 10 s 60 to 90 s T ypical Temperature 260°C Meets IPC/JEDEC J-STD-020C Package Layout 1V/Div MEETS EIA-481A and EIAJ-1009B 2,000 PCS/REEL

8.46 DI A

(216mm DIA) .08 (2.0mm)

1.00 DI A

(25mm DIA)

9.84 DI A

(250mm DIA) .06 DI A (1.5mm DIA) .69 (17.5mm) .08 (2.0mm) 3.15 (80mm) .315 (8.0mm) .08 (2.0mm) .21 (5.4mm) .157 (4.0mm) .31 (7.9mm) .295 (7.5mm) .07 (1.75mm) .83 (16.0mm) PIN 1 Direction Of F eed (Customer ) 0.215 (5.46mm) 0.037 (0.94mm) 0.051 (1.28mm) 0.051 (1.28mm) 0.295 (7.49mm) 0.030 (0.76mm) Keep Out Area Top View 9 5 2 3 * Do not route any traces in the keep out area. It is recommended the next layer under the keep out area is to be ground plane. OSC TO P LA YER GROUND LA YER BO TT OM LA YER Output Buffer

50 Ohm T race

Vcc , should have a large copper area for reduced inductance . Connect a 0.01uF bypass capacito r <0.1”(2.54mm) from the pad . Ground , should have a large copper area for reduced inductance . 0.010”(0.254mm) R ecommended clearance inductance for internal copper flood . Top View 1 3 Buffer Ground

50 Ohm trace

<1”by design Vcc Ground Top View Test Circuit Attention: To achieve optimal frequency stability, and in some cases to meet the specification stated on this data sheet, it is required that the circuit connected to this TCXO output must have the equivalent input capacitance that is specified by the nominal load capacitance. Deviations from the nominal load capacitance will have a graduated effect on the stability of approximately 20 ppb per pF load difference. Bulletin Tx238 Page 2 of 2 Revision 05 Date 14 May 2015 1 2 3 678 N/C DNC DNC DNC DNC DNC Enable/ Disable Output 15 pF Ground Vcc Supply V oltage 10 nF Bypass 0.1 uF Bypass DN C = D o Not Connect