CXP83200A

CXP83200A SONY | Alldatasheet

Document overview

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• PDF pages: 8

Technical content

Features

• Wide-range instruction system (213 instructions) to cover various types of data – 16-bit operation/multiplication and division/Boolean bit operation instructions
• Minimum instruction cycle 400ns at 10MHz operation 8µs at 500kHz operation 122µs at 32kHz operation
• Applicable EPROM LCC type 27C512 (Maximum 40K bytes are available.)
• Incorporated RAM capacity 1120 bytes (Including LCD display data area)
• Peripheral functions – A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 32µs/10 MHz) – Serial interface Incorporated 8-bit, 8-stage FIFO (Auto transfer for 1 to 8 bytes), 1 channel 8-bit clock sync type, 1 channel – Timer 8-bit timer 8-bit timer/counter 19-bit time base timer 16-bit capture timer/counter 32kHz timer/counter – LCD controller/driver Maximum 160 segment display possible (for 1/4 duty) 4 lines for common output, 40 lines for segment output Display method static: 1/2, 1/3, 1/4 duty Bias method: 1/2, 1/3 bias – Remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO – PWM output 14 bits, 1 channel
• Interruption 15 factors, 15 vectors, multi-interruption possible
• Standby mode SLEEP/STOP
• Package 100-pin ceramic PQFP Note)Mask option depends on the type of the CXP83200A. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. 100 pin PQFP (Ceramic) Piggyback/ evaluator type QFP supported LQFP supported

– 2 – CXP83200A Pin Configuration in Piggyback Mode (QFP package) Note) 1. NC (Pin 90) is always connected to VDD . 2. Vss (Pins 41 and 91) are both connected to GND. PE2/INT2 PE3/INT3/NMI PE4/RMC PE5/PWM PE6/TO/ADJ PB0/CINT PB1/ CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 PA0/AN0 4039383736353431 32 33 41 42 43 44 45 46 47 48 49 50 81828384 88 87 86 85 899010 099 98 97 96 95 94 919293 PA1/AN1PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PA7/AN7 RST EXTAL1XTAL1 Vss XTAL2EXTAL2 AV REF AVss V L V LC3 V LC2 V LC1 COM0 SEG26/PF2 SEG25/PF1 SEG24/PF0 SEG23/PD7 SEG22/PD6 SEG21/PD5 SEG20/PD4 SEG19/PD3 SEG18/PD2 SEG17/PD1 SEG16/PD0 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COM3 COM2 COM1 PE1/INT1/EC1 PE0/INT0/EC0 SEG39/PG7 SEG38/PG6 SEG37/PG5 SEG36/PG4 SEG35/PG3 TEX TX Vss NC V DD SEG34/PG2 SEG33/PG1 SEG32/PG0 SEG31/PF7 SEG30/PF6 SEG29/PF5 SEG28/PF4 SEG27/PF3 234 1 14 15 16 17 18 19 20 303132 A11 NC OE A10 CE NC A7 A12 A15 NC V DD A14 A13 D1 D2 GND NC D3 D4 D5

– 3 – CXP83200A Pin Configuration in Piggyback Mode (LQFP package) Note) 1. NC (Pin 88) is always connected to VDD . 2. Vss (Pins 39 and 89) are both connected to GND. PE4/RMC PE5/PWM PE6/TO/ADJ PB0/CINT PB1/CSO PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 PA0/AN0 PA1/AN1 PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PA7/AN7 RST EXTAL1XTAL1 Vss XTAL2EXTAL2 AV REF AVss V L V LC3 V LC2 V LC1 COM0 COM1 COM2 PE3/INT3/NMIPE2/INT2 PE1/INT1/EC1 PE0/INT0/EC0 SEG39/PG7 SEG38/PG6 SEG37/PG5 SEG36/PG4 SEG35/PG3 TEX TX Vss NC V DD SEG34/PG2 SEG33/PG1 SEG32/PG0 SEG31/PF7 SEG30/PF6 SEG29/PF5 SEG28/PF4 SEG27/PF3 SEG26/PF2 SEG25/PF1 SEG24/PF0 SEG23/PD7 SEG22/PD6 SEG21/PD5 SEG20/PD4 SEG19/PD3 SEG18/PD2 SEG17/PD1 SEG16/PD0 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COM3 81828384 76777888 87 86 85 7980899010 099 98 97 96 95 94 919293 26 27 28 29 30 4039383736353431 32 33 41 42 43 44 45 46 47 48 49 50 28A15 A12 GND V DD A14 A13 A11 OE A10 CE

– 4 – CXP83200A Pin Configuration in Evaluator Mode (QFP package) Note) 1. NC (Pin 90) is always connected to VDD . 2. Vss (Pins 41 and 91) are both connected to GND. PE2/INT2 PE3/INT3/NMI PE4/RMC PE5/PWM PE6/TO/ADJ PB0/CINT PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 PA0/AN0 4039383736353431 32 33 41 42 43 44 45 46 47 48 49 50 81828384 88 87 86 85 899010 099 98 97 96 95 94 919293 PA1/AN1PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PA7/AN7 RST EXTAL1XTAL1 Vss XTAL2EXTAL2 AV REF AVss V L V LC3 V LC2 V LC1 COM0 SEG26/PF2 SEG25/PF1 SEG24/PF0 SEG23/PD7 SEG22/PD6 SEG21/PD5 SEG20/PD4 SEG19/PD3 SEG18/PD2 SEG17/PD1 SEG16/PD0 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COM3 COM2 COM1 PE1/INT1/EC1 PE0/INT0/EC0 SEG39/PG7 SEG38/PG6 SEG37/PG5 SEG36/PG4 SEG35/PG3 TEX TX Vss NC V DD SEG34/PG2 SEG33/PG1 SEG32/PG0 SEG31/PF7 SEG30/PF6 SEG29/PF5 SEG28/PF4 SEG27/PF3 234 1 14 15 16 17 18 19 20 303132 A11 NC HALT A10 E/P I/T MON A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 NC RD A7/D7 A12 A15 NC V DD A14 A13 WR SYNCGND NC C2 C1 RST 268

– 5 – CXP83200A Pin Configuration in Evaluator Mode (LQFP package) Note) 1. NC (Pin 88) is always connected to VDD . 2. Vss (Pins 39 and 89) are both connected to GND. PE4/RMC PE5/PWM PE6/TO/ADJ PB0/CINT PB1/CSO PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 PA0/AN0 PA1/AN1 PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PA7/AN7 RST EXTAL1XTAL1 Vss XTAL2EXTAL2 AV REF AVss V L V LC3 V LC2 V LC1 COM0 COM1 COM2 PE3/INT3/NMIPE2/INT2 PE1/INT1/EC1 PE0/INT0/EC0 SEG39/PG7 SEG38/PG6 SEG37/PG5 SEG36/PG4 SEG35/PG3 TEX TX Vss NC V DD SEG34/PG2 SEG33/PG1 SEG32/PG0 SEG31/PF7 SEG30/PF6 SEG29/PF5 SEG28/PF4 SEG27/PF3 SEG26/PF2 SEG25/PF1 SEG24/PF0 SEG23/PD7 SEG22/PD6 SEG21/PD5 SEG20/PD4 SEG19/PD3 SEG18/PD2 SEG17/PD1 SEG16/PD0 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 81828384 76777888 87 86 85 7980899010 099 98 97 96 95 94 919293 26 27 28 29 30 4039383736353431 32 33 41 42 43 44 45 46 47 48 49 50 28A15 A12 A7/D7 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 RD WR SYNC GND V DD A14 A13 A11 HALT A10 E/P I/T MON RST SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COM3

– 6 – CXP83200A EPROM Read Timing (Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference) Address fi Data Hold time Address fi Data input delay time Item Symbol Pins Min. Max. Unit tIH tACC A0 to A15 D0 to D7 A0 to A15 D0 to D7 120 ns ns tACC tIH 0.8VDD 0.8VDD 0.2VDD 0.2VDD Input data Address dataA0 to A15 D0 to D7 Products Package Rom capacitance RAM capacitance Pull-up resistance for reset Mask typeOption item 100-pin plastic QFP/LQFP Existent/Non-existent 644 bytes 1120bytes Piggyback/evaluator type CXP83200A-U01Q CXP83200A-U01R 100-pin ceramic PQFP EPROM 40K bytes 1120 bytes Existent CXP83120A CXP83124A CXP83232A CXP83240A 20K bytes 24K bytes 32K bytes 40K bytes Products List

– 7 – CXP83200A LCC type EPROM Pin 1 marking Pin 1 index Pin 1 marking Note) CPU Probe Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode (27C512 only) EPROM adaptor Pin 1 marking Evaluation cap should be connect to CPU probe. Pin 1 index CPU probe for LQFP Note)

– 8 – CXP83200A Package Outline Unit: mm SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING

42 ALLOY

10.44 MAX

0.50 ± 0.25 0.15 – 0.02 + 0.05 3.57 ± 0.36 18.7 16.3 ± 0.2 100 81 31 50 9.48 11.66 15.58 ± 0.2 24.7 22.3 ± 0.25 6.0 4.5 0.3 1.27 ± 0.13 12.02 14.22 18.12 ± 0.2 PIN NO. 1 INDEX INDEX PQFP-100C-L01 AQFP100-C-0000-A 100PIN PQFP (CERAMIC) 100 50 31 PIN No. 1 INDEX 0.7 1.01.3 ± 0.3 0.45 5.7g SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING 2.2g PQFP-100C-L02 AQFP100-C-1414-A 100PIN PQFP (CERAMIC) 16.0 ± 0.4 14.0 ± 0.2 12.8 ± 0.2 251 5175 100 INDEX 0.18 – 0.03 + 0.08 0.5 ± 0.05 12.0 ± 0.15 1.5 + 0.15 0.127 – 0.02 + 0.05 3.32 6.9 0.18 – 0.03 + 0.08 0.5 ± 0.05 12.0 ± 0.15 12.4 INDEX 0.8 ± 0.2