CXP740000

CXP740000 SONY | Alldatasheet

Document overview

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• PDF pages: 8

Technical content

Features

• A wide instruction set (211 instructions) which covers various types of data. —16-bit operation/multiplication and division/ Boolean bit operation instructions
• Minimum instruction cycle 167ns at 24MHz operation (4.5 to 5.5V) 333ns at 12MHz operation (2.7 to 5.5V) 122µs at 32kHz operation (2.7 to 5.5V)
• Applicable EPROM CXP27C702K (Maximum 120K bytes are available.)
• Incorporated RAM capacity 4096 bytes
• Peripheral functions — A/D converter 8 bits, 8 channels, successive approximation method (Conversion time of 10.3µs/24MHz) — Serial interface Start-stop sync type (UART), 1 channel Incorporated buffer RAM (Auto transfer for 1 to 32 bytes), 2 channels 8-bit clock sync type (MSB/LSB first selectable), 1 channel — Timer 8-bit timer, 2 channels 8-bit timer/counter, 2 chennels 19-bit time-base timer, 16-bit capture timer/counter 32kHz timer/counter — Remote control unit receive circuit Internal noise elimination circuit Internal 8-bit, 6-stage FIFO for measured data — PWM output 12 bits, 12 channels
• Interruption 24 factors, 15 vectors, multi-interruption possible
• Standby mode Sleep/stop
• Package 100-pin ceramic PQFP Note)Mask option depends on the type of the CXP740000. Refer to the Products List for details. Structure Silicon gate CMOS IC – 1 – E98429-PS Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. 100 pin PQFP (Ceramic) QFP supported LQFP supported Piggy/evaluation chip

– 2 – CXP740000 Pin Assignment in Piggyback Mode (QFP package) Note) 1. NC (Pin 90) is left open. 2. VSS (Pins 41 and 88) are both connected to GND. 234 14 15 16 17 18 19 20 3031321 4039383736353431 32 33 41 42 43 44 45 46 47 48 50 8182838488 87 86 858990100 99 98 97 96 95 94 919293 PI6/SO 1 PI7/SI1 PE0/IN T0 PE1/IN T2 PE2/PW M 0 PE3/PW M 1 PE4 PE5 PE6 PE7 PG 0/TxD PG 1/R xD PG 2/EC 0 PG 3/EC 1 PG 4/EC 2 PG 5/IN T3 PG 6/IN T4 PG 7/C IN T AN 0 AN 1 AN 2 AN 3 PF0/AN 4 PF1/AN 5 PF2/AN 6 PF3/AN 7 AVD D AVR EF AVSS PF4/AN 8 PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0 PK7/TO1 RST V SS XTAL EXTAL PK6/CS0 PK5/SI0 PK4/SO0 PK3/SCK0 PF7/AN11 PF6/AN10 PF5/AN9 PC 5 PC 4 PC 3 PC 2 PC 1 PC 0 PB7/SI2 PB6/SO 2 PB5/SC K2 PB4/TO 2 PB3 PB2 PB1 PB0 PJ7 PJ6 PJ5 PJ4 PJ3 PJ2 PJ1 PJ0 PD 7 PD 6 PD 5 PD 4 PD 3 PD 2 PD 1 PD 0 PC6 PC7 PA1 PA2 PA3 PA4 PA5 PA6 PA7 NC V DD V SS PK1/TX PK2/TEX PI1/RM C PI2/NM I PI3/TO0/ADJ PI4/INT1/CS1 PI5/SCK1 PA0 N C A11 N C O E A10 C E D 7 D 6 D1 D2 GND A16 D3 D4 D5 A7 A12 NC V DD A14 A15 A13 D 0

– 3 – CXP740000 Pin Assignment in Piggyback Mode (LQFP package) Note) 1. NC (Pin 88) is left open. 2. VSS (Pins 39 and 86) are both connected to GND. /LiteDiagLines2 76777879808182838488 87 86 858990100 99 98 97 96 95 94 919293 15 16 26 27 28 29 30 33 504039383736353431 32 41 42 43 44 45 46 47 48 49 PE1/IN T2 PE4 PE5 PE7 PE6 PG 1/R xD PG 2/EC 0 PG 3/EC 1 PG 5/IN T3 AN 0 PG 4/EC 2 PG 6/IN T4 PG 7/C IN T AN 1 AN 2 AN 3 PF0/AN 4 AVD D AVR EF PF3/AN 7 PG 0/TxD PF2/AN 6 PF1/AN 5 PE2/PW M 0 PE3/PW M 1 PC4 PA4 PA5 PA6 PA7 NC V DD V SS PK1/TX PK2/TEX PI1/RM C PI2/NM I PI3/TO0/ADJ PI4/INT1/CS1 PI5/SCK1 PC5 PC6 PA1 PA2 PA3 PC7 PA0 PI6/SO1 PI7/SI1 PE0/INT0 PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0 PK7/TO1 RST V SS XTAL EXTAL PK6/CS0 PK5/SI0 PK4/SO0 PK3/SCK0 PF7/AN11 PF6/AN10 PF5/AN9 AV SS PF4/AN8 PD0 PD1 PD2 PC 3 PC 2 PC 1 PC 0 PB7/SI2 PB6/SO 2 PB5/SC K2 PB4/TO 2 PB3 PB2 PB1 PB0 PJ7 PJ6 PJ5 PJ4 PJ3 PJ2 PJ1 PJ0 PD 7 PD 6 PD 5 PD 4 PD 3 A15 A12 N C D 0 D 1 G N D D 2 VD D A14 A13 A11 O E A10 C E D 7 D 6 D 5 D 4 A16 D 3

– 4 – CXP740000 Pin Assignment in Evaluator Mode (QFP package) Note) 1. NC (Pin 90) is left open. 2. VSS (Pins 41 and 88) are both connected to GND. 234 14 15 16 17 18 19 20 3031321 4039383736353431 32 33 41 42 43 44 45 46 47 48 50 8182838488 87 86 858990100 99 98 97 96 95 94 919293 PI6/SO 1 PI7/SI1 PE0/IN T0 PE1/IN T2 PE2/PW M 0 PE3/PW M 1 PE4 PE5 PE6 PE7 PG 0/TxD PG 1/R xD PG 2/EC 0 PG 3/EC 1 PG 4/EC 2 PG 5/IN T3 PG 6/IN T4 PG 7/C IN T AN 0 AN 1 AN 2 AN 3 PF0/AN 4 PF1/AN 5 PF2/AN 6 PF3/AN 7 AVD D AVR EF AVSS PF4/AN 8 PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0 PK7/TO1 RST V SS XTAL EXTAL PK6/CS0 PK5/SI0 PK4/SO0 PK3/SCK0 PF7/AN11 PF6/AN10 PF5/AN9 PC 5 PC 4 PC 3 PC 2 PC 1 PC 0 PB7/SI2 PB6/SO 2 PB5/SC K2 PB4/TO 2 PB3 PB2 PB1 PB0 PJ7 PJ6 PJ5 PJ4 PJ3 PJ2 PJ1 PJ0 PD 7 PD 6 PD 5 PD 4 PD 3 PD 2 PD 1 PD 0 PC6 PC7 PA1 PA2 PA3 PA4 PA5 PA6 PA7 NC V DD V SS PK1/TX PK2/TEX PI1/RM C PI2/NM I PI3/TO0/ADJ PI4/INT1/CS1 PI5/SCK1 PA0 A6/D 6 A5/D 5 A4/D 4 A3/D 3 A2/D 2 A1/D 1 A0/D 0 N C A11 N C H ALT A10 E/P I/T M O N W R SYNC GND A16 C2 RST A7/D7 A12 NC V DD A14 A15 A13 R D

– 5 – CXP740000 Pin Assignment in Evaluator Mode (LQFP package) Note) 1. NC (Pin 88) is left open. 2. VSS (Pins 39 and 86) are both connected to GND. /LiteDiagLines 76777879808182838488 87 86 858990100 99 98 97 96 95 94 919293 15 16 26 27 28 29 30 33 504039383736353431 32 41 42 43 44 45 46 47 48 49 PE1/IN T2 PE4 PE5 PE7 PE6 PG 1/R xD PG 2/EC 0 PG 3/EC 1 PG 5/IN T3 AN 0 PG 4/EC 2 PG 6/IN T4 PG 7/C IN T AN 1 AN 2 AN 3 PF0/AN 4 AVD D AVR EF PF3/AN 7 PG 0/TxD PF2/AN 6 PF1/AN 5 PE2/PW M 0 PE3/PW M 1 PC4 PA4 PA5 PA6 PA7 NC V DD V SS PK1/TX PK2/TEX PI1/RM C PI2/NM I PI3/TO0/ADJ PI4/INT1/CS1 PI5/SCK1 PC5 PC6 PA1 PA2 PA3 PC7 PA0 PI6/SO1 PI7/SI1 PE0/INT0 PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0 PK7/TO1 RST V SS XTAL EXTAL PK6/CS0 PK5/SI0 PK4/SO0 PK3/SCK0 PF7/AN11 PF6/AN10 PF5/AN9 AV SS PF4/AN8 PD0 PD1 PD2 PC 3 PC 2 PC 1 PC 0 PB7/SI2 PB6/SO 2 PB5/SC K2 PB4/TO 2 PB3 PB2 PB1 PB0 PJ7 PJ6 PJ5 PJ4 PJ3 PJ2 PJ1 PJ0 PD 7 PD 6 PD 5 PD 4 PD 3 A15 A12 A7/D 7 A5/D 5 A4/D 4 A6/D 6 A3/D 3 A2/D 2 A1/D 1 A0/D 0 N C R D W R G N D SYN C VD D A14 A13 A11 H ALT A10 E/P I/T M O N R ST C 1 A16 C 2

– 6 – CXP740000 EPROM Read Timing (Ta = –20 to +75°C, VDD = 2.7 to 5.5V, Vss = 0V reference) Address fi data hold time Address fi data input delay time Item Symbol Pin Min. Max. Unit tIH tACC A0 to A15 D0 to D7 A0 to A15 D0 to D7 100*1 50*2 ns ns tAC C tIH 0.8VD D 0.8VD D 0.2VD D 0.2VD D Input data Address dataA0 to A15 D 0 to D 7 Products List *1 At 12MHz operation (VDD = 4.5 to 5.5V) *2 At 12MHz operation (VDD = 2.7 to 5.5V), at 24MHz operation (VDD = 4.5 to 5.5V) Products Package Pull-up resistor for reset pin Mask ROM Piggy/evaluation chipOption item 100-pin plastic QFP/LQFP 100-pin ceramic PQFP CXP740096 CXP740010 CXP740000-U01Q CXP740000-U01R 56K bytes 96K bytes EPROM 120K bytes120K bytes CXP740056 ROM capacity Existent/Non-existent Existent

– 7 – CXP740000 Pin 1 index Pin 1 m arking LC C type EPR O M Pin 1 m arking Piggyback m ode Piggy/evaluation chip Evaluator m ode C PU probe N ote) N ote) Evaluation cap should be connected to C PU probe. EPR O M adaptor Pin 1 m arking Pin 1 index Piggyback mode/evaluator mode can be switched as shown below.

– 8 – CXP740000 Package Outline Unit: mm SO N Y C O D E EIAJ C O D E JED EC C O D E PAC KAG E STR U C TU R E PAC KAG E M ATER IAL LEAD TR EATM EN T LEAD M ATER IAL PAC KAG E W EIG H T C ER AM IC G O LD PLATIN G

42 ALLO Y

10.44 M AX

0.50 ± 0.25 0.15 – 0.02 + 0.05 3.57 ± 0.36 18.7 16.3 ± 0.2 100 81 31 50 9.48 11.66 15.58 ± 0.2 24.7 22.3 ± 0.25 6.0 4.5 0.3 1.27 ± 0.13 12.02 14.22 18.12 ± 0.2 PIN N O . 1 IN D EX IN D EX PQ FP-100C -L01 AQ FP100-C -0000-A 100PIN PQ FP (C ER AM IC ) 100 50 31 PIN N o. 1 IN D EX 0.7 1.01.3 ± 0.3 0.45 5.7g SO N Y C O D E EIAJ C O D E JED EC C O D E PAC KAG E M ATER IAL LEAD TR EATM EN T LEAD M ATER IAL PAC KAG E M ASS C ER AM IC 2.4g PQ FP-100C -L05 AQ FP100-C -0000 100PIN PQ FP(C ER AM IC ) 16.0 ± 0.5 14.0 ± 0.2 1 25 5175 100 12.0 ± 0.15 0.18 – 0.03 + 0.08 0.5± 0.05 1.5 3.2 ± 0.2 0.8 ± 0.1IN D EX 12.4 IN D EX 3.32 0.127 – 0.02 0.2 – 0.13 6.9 + 0.05 + 0.15