CXK77B1810AGB SONY | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 4

Technical content

Features

  • Fast cycle time (Cycle) (Frequency) CXK77B1810AGB-5 5ns 200MHz -6 6ns 167MHz
  • Inputs and outputs are GTL/HSTL compatible
  • Controlled Impedance Driver
  • Single 3.3V power supply: 3.3V±0.15V
  • Byte-write possible
  • OE asynchronization
  • JTAG test circuit
  • Package 119TBGA
  • 4 kinds of synchronous operation mode Register-Register mode (R-R mode) Register-Flow Thru mode (R-F mode) Register-Latch mode (R-L mode) Dual clock mode (D-C mode) Function 65536 word x 18bit High Speed Bi-CMOS Synchronous SRAM Structure Silicon gate Bi-CMOS IC – 1 – CXK77B1810AGB -5/6 119 pin BGA (Plastic) PE96811 High Speed Bi-CMOS Synchronous Static RAM Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. Preliminary

– 2 – CXK77B1810AGB Block Diagram

16 Input

Reg. Write Store Reg. 2:1 Mux Add. Write pulse Dout Din 64K × 18 2:1 Mux Output latch Reg. Read Comp. Reg. S Reg.W Reg.BW a to b K/K G Mode Control Self Time Write Logic DQ A0 to 15 C/C Output Clock

– 3 – CXK77B1810AGB Pin Configuration (Top View) VDD Q NC NC DQb NC V DD Q NC DQb VDD Q NC DQb VDD Q DQb NC NC NC V DD Q A DQx K K C C VREF W Address Input Data I/O in byte (a to b) Positive Clock Negative Clock Output Positive Clock(*) Output Negative Clock(*) Input Reference Write Enable BWX S G ZZ TCK TMS TDI TDO Byte Write Enable (a to b) Chip Select Asyn Output Enable Sleep Mode Select JTAG Clock JTAG Mode Select JTAG Data In JTAG Data Out V DD VDD Q VSS M1, M2 ZQ NC +3.3V power supply Output power supply Ground Mode Select Output Impedance Control No Connect A B C D E F G H J K L M N P R T U A NC A NC DQb NC DQb NC V DD DQb NC DQb NC DQb A A TMS A NC A V SS VSS VSS BWb VSS VREF VSS VSS VSS VSS VSS A TDI NC NC VDD ZQ S G C C V DD K K W A A V DD NC TCK A NC A VSS VSS VSS VSS VSS VREF VSS BWa VSS VSS VSS A TDO A NC A DQa NC DQa NC DQa VDD NC DQa NC DQa NC A A NC V DD Q NC NC NC DQa V DD Q DQa NC VDD Q DQa NC VDD Q NC DQa NC ZZ VDD Q 1234567 Pin Description Symbol Description Symbol Description Symbol Description (*) These pins should be tied to VDD or VSS except D-C mode.

– 4 – CXK77B1810AGB Package Outline Unit: mm SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL BOARD MATERIAL TERMINAL MATERIAL PACKAGE WEIGHT EPOXY RESIN COPPER-CLAD LAMINATE SOLDER 0.8g

119 TERMINAL BGA(PLASTIC)

0.15C DETAIL X 0.35 C C 0.6}0.1 19. 0.6}0.1 1.5 270. 3.19 1.27 7.62 ƒÓ0.75}0.15 20. 1 2 3 4 5 6 7 U T R P N M L K J H G F E D C B A ƒÓ0.3 C AB ƒÓ0.1 3-C1. 14.0 11.5 A B 0.10 ~4 4-C0. C1. 22. X