CXK5T8257BTM SONY | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 10

Technical content

Features

  • Extended operating temperature range: –25 to +85°C
  • Wide supply voltage range operation: 2.7 to 3.6V
  • Fast access time: (Access time) 3.0V operation -10LLX 100ns (Max.) -12LLX 120ns (Max.) 3.3V operation -10LLX 85ns (Max.) -12LLX 100ns (Max.)
  • Low standby current: 7.0µA (Max.)
  • Low power data retention: 2.0V (Min.)
  • Available in many packages CXK5T8257BTM/BYM 8mm · 13.4mm 28 pin TSOP Package CXK5T8257BM 450mil 28 pin SOP Package Function 32768-word · 8 bit static RAM Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. CXK5T8257BTM 28 pin TSOP (Plastic) CXK5T8257BYM 28 pin TSOP (Plastic) CXK5T8257BM 28 pin SOP (Plastic) Memory Matrix 512 × 512 I/O Gate Column Decoder Row DecoderBuffer Buffer Buffer I/O Buffer VCC GND I/O1 I/O8 A14 A13 A12 A11 A10 OE WE CE Block Diagram Preliminary

– 2 – CXK5T8257BTM/BYM/BM 14 15 28 V CC WE A13 A11 OE A10 CE I/O8 I/O7 I/O6 I/O5 I/O4GND I/O3 I/O2 I/O1 A12 A14 CXK5T8257BM A11 A13 WE VCC A14 A12 OE A10 CE I/O8 I/O7 I/O6 I/O5 I/O4 GND I/O3 I/O2 I/O1 A2A3 7 8 CXK5T8257BTM (Standard Pinout) A12 A14 V CC WE A13 A11 A3 A2 I/O1 I/O2 I/O3 GND I/O4 I/O5 I/O6 I/O7 I/O8 CE A10OE 22 21 CXK5T8257BYM (Standard Pinout) Address input Data input/output Chip enable input Write enable input Output enable input Power supply Ground A0 to A14 I/O1 to I/O8 CE WE OE V CC GND Symbol Description Pin DescriptionPin Configuration (Top View) Supply voltage Input voltage Input and output voltage Allowable power dissipation Operating temperature Storage temperature Soldering temperature · time V CC VIN VI/O PD Topr Tstg Tsolder –0.5 to +4.6 –0.5* 1 to VCC + 0.5 –0.5*1 to VCC + 0.5 0.7 –25 to +85 –55 to +150 235 · 10 V V V W °C · s Item Symbol Rating Unit H L L L H L H H L Not selected Output disable Read Write High Z High Z Data out Data in I SB1 , ISB2 ICC1 , ICC2 ICC1 , ICC2 ICC1 , ICC2 CE OE WE Mode I/O1 to I/O8 V CC Current Absolute Maximum Ratings (Ta = 25°C, GND = 0V) *1 VIN, VI/O= –3.0V Min. for pulse width less than 50ns. Truth Table

– 3 – CXK5T8257BTM/BYM/BM

Electrical Characteristics

  • DC characteristics (VCC = 2.7 to 3.6V, GND = 0V, Ta = –25 to +85°C) Item Symbol Test Conditions Min. Typ. *2 Max. Unit Input leakage current Output leakage current Operating power supply current Average operating current Standby current Output high voltage Output low voltage I LI ILO ICC1 ICC2 ISB1 ISB2 VOH VOL VIN = GND to VCC CE = VIH OE = VIH or WE = VIL VI/O= GND to VCC CE = VIL VIN = VIH or VIL IOUT = 0mA Min. cycle duty = 100%, IOUT = 0mA CE ‡ VCC – 0.2V CE = VIH IOH = –2mA IOL = 2.0mA –0.5 –0.5 2.4 0.5 0.5 35* 7.0 3.5 0.7 0.4 0.9 18* 0.12 0.06 µA mA µA mA V *2 VCC = 3.3V, Ta = 25°C *3 ICC2 = 21mA for 3.3V operation (VCC = 3.3V ± 0.3V) *4 ICC3 = 40mA for 3.3V operation (VCC = 3.3V ± 0.3V) 10LLX 12LLX –25 to +85°C –25 to +70°C +25°C DC Recommended Operating Conditions (Ta = –25 to +85°C, GND = 0V) *1 VIL=–3.0V Min. for pulse width less than 50ns. Supply voltage Input high voltage Input low voltage Item Symbol Min. V CC = 2.7 to 3.6V V CC = 3.3V ± 0.3V Typ. Max. Unit VCC VIH VIL 2.7 2.4 –0.3*1 3.3 3.6 V CC + 0.3 0.4 Min. Typ. Max. 3.0 2.2 –0.3*1 3.3 3.6 V CC + 0.3 0.6 V

– 4 – CXK5T8257BTM/BYM/BM Input capacitance I/O capacitance Item Symbol Test condition Min. Typ. Max. Unit C IN C I/O pF pF VIN = 0V VI/O= 0V TTL C L AC Characteristics

  • AC test conditions (Ta = –25 to +85°C) *1 C L includes scope and jig capacitances. I/O capacitance (Ta = 25°C, f = 1MHz) Note) This parameter is sampled and is not 100% tested. Input pulse high level Input pulse low level Input rise time Input fall time Input and output reference level Output load conditions V IH = 2.4V VIL= 0.4V tr = 5ns tf = 5ns 1.4V C L*1 = 100pF, 1TTL C L*1 = 100pF, 1TTL Item VCC = 2.7 to 3.6V Conditions VIH = 2.2V VIL= 0.6V tr = 5ns tf = 5ns 1.4V C L*1 = 30pF, 1TTL C L*1 = 100pF, 1TTL VCC = 3.3V ± 0.3V -10LLX -12LLX

– 5 – CXK5T8257BTM/BYM/BM Write cycle time Address valid to end of write Chip enable to end of write Data to write time overlap Data hold from write time Write pulse width Address setup time Write recovery time (WE) Write recovery time (CE) Output active from end of write Write to output in high Z Item Symbol Min. Max. Min. Max. -10LLX VCC = 2.7 to 3.6V V CC = 3.3V ± 0.3V -12LLX Unit tRC tAA tCO tOE tOH tLZ tOLZ tHZ *1 tOHZ *1 100 100 100 120 120 120 Min. Max. Min. Max. -10LLX -12LLX 100 100 100 Read cycle time Address access time Chip enable access time (CE) Chip enable to output valid Chip hold from address change Chip enable to output in low Z (CE) Output enable to output in low Z (OE) Chip disable to output in high Z (CE) Output disable to output in high Z (OE)

  • Read cycle(WE = “H”) *1 tHZ and tOHZ are defined as the time required for outputs to turn to high impedance state and are not referred to as output voltage levels. *2 tWHZ is defined as the time requied for outputs to turn to high impedance state and is not referred to as output voltage level.
  • Write cycle ns Item Symbol Min. Max. Min. Max. -10LLX VCC = 2.7 to 3.6V V CC = 3.3V ± 0.3V -12LLX Unit tWC tAW tCW tDW tDH tWP tAS tWR tWR1 tOW tWHZ *2 100 120 100 100 Min. Max. Min. Max. -10LLX -12LLX 100 ns

– 6 – CXK5T8257BTM/BYM/BM Timing waveform

  • Read cycle (1): CE = OE =VIL, WE = VIH Address tAA tRC tOH Data out Previous data valid Data valid
  • Read cycle (2): WE = VIH Address tAA tRC tCO tLZ tHZ tOHZtOE tOLZ CE OE Data out High impedance Data valid
  • Write cycle (1): WE contorl Address tAW tWC tCW tAS tWP tDH tWHZ tDW CE WE Data out High impedance Data valid tOW [∗2] [∗2] OE Data in tWR [∗1]

– 7 – CXK5T8257BTM/BYM/BM

  • Write cycle (2): CE control Address OE tWC tAW Data valid tAS tCW tWR1 tWP tDW tDH High impedance CE WE Data out Data in *1 Write is executed when both CE and WE are at low simultaneously. *2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is output condition.

– 8 – CXK5T8257BTM/BYM/BM VCC 2.7V 2.2V VDR CE GND tCDRS Data retention mode tR CE ≥ VCC – 0.2V Data Retention Waveform

  • Low supply voltage data retention waveform Data retention voltage Data retention current Data retention setup time Recovery time V DR ICCDR1 ICCDR2 tCDRS tR CE ‡ VCC – 0.2V VCC = 2.0 to 3.6V CE ‡ VCC – 0.2V Chip disable to data retention mode 0.1 0.12* 3.6 7.0 V µA ns ms Item Symbol Test conditions Min. Typ. Max. Unit Data Retention Characteristics (Ta = –25 to +85°C) *1 VCC = 3.3V, Ta = 25°C VCC = 3.0V CE ‡ 2.8V –25 to +85°C –25 to +70°C +25°C

– 9 – CXK5T8257BTM/BYM/BM Package Outline Unit: mm CXK5T8257BTM CXK5T8257BYM SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING COPPER / 42 ALLOY 28PIN TSOP (Plastic) ∗8.0 ± 0.1 0.55 ± 0.1

1.2 MAX

0.5 ± 0.1 0° to 10° 0.2 – 0.05 + 0.1 0.05 – 0.05 + 0.1 0.127 – 0.02 + 0.07 A 712822 821 TSOP-28P-L01 TSOP028-P-0000-A 0.1 DETAIL A 0.2g NOTE: Dimension “∗” does not include mold protrusion. SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING COPPER / 42 ALLOY 28PIN TSOP (Plastic) ∗8.0 ± 0.1 0.55 ± 0.1 0.5 ± 0.1 0.2 – 0.05 + 0.1 0.05 – 0.05 + 0.1 0.127 – 0.02 + 0.07 A 222817 218 TSOP-28P-L01R TSOP028-P-0000-B 0.1 0° to 10° DETAIL A 0.2g NOTE: Dimension “∗” does not include mold protrusion.

– 10 – CXK5T8257BTM/BYM/BM CXK5T8257BM SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING

42 ALLOY

28PIN SOP (PLASTIC) SOP-28P-L05 ∗SOP028-P-0450 0.7g M 18.0 – 0.1 + 0.4 0.4 ± 0.1 1.27 8.4 – 0.1 + 0.3 11.8 ± 0.4 0° to 10° 0.15 – 0.05 + 0.1 1.0 ± 0.2 0.1 – 0.05 + 0.2 0.15 2.3 – 0.15 + 0.4 141 0.24