CXK591000TM SONY | Alldatasheet

Document overview

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Technical content

Features

  • Fast access time CXK591000TM/YM/M (Access time) -55LL 55ns (Max.) -70LL 70ns (Max.) -10LL 100ns (Max.)
  • Low standby current CXK591000TM/YM/M -55LL/70LL/10LL 24µA (Max.)
  • Low data retention current CXK591000TM/YM/M -55LL/70LL/10LL 14µA (Max.)
  • Single +5V supply: 5V ± 10%.
  • Low voltage date retention: 2.0V (Min.)
  • Broad package line-up CXK591000TM/YM 8mm · 20mm 32 pin TSOP Package CXK591000M 525mil 32 pin SOP Package Function 131072 word · 9 bit static RAM Structure Silicon gate CMOS IC – 1 – CXK591000TM/YM/M -55LL/70LL/10LL E93X06-PS 131,072-word · 9-bit High Speed CMOS Static RAM Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. CXK591000TM 32 pin TSOP (PIastic) CXK591000YM 32 pin TSOP (PIastic) CXK591000M 32 pin SOP (PIastic) Block Diagram I /O Gate Column Decoder Row DecoderBuffer Buffer Buffer VCC GND I/O1 I/O9 OE WE CE1 A10 A11 A15 A16 A14 A12 A13 CE2 I /O Buffer Memory Matrix 1024 × 1152

– 2 – CXK591000TM/YM/M Address input Data input/output Chip enable 1, 2 input Write enable input Output enable input Power supply Ground Symbol Description Supply voltage Input voltage Input and output voltage Allowable power dissipation Operating temperature Storage temperature Soldering temperrature · time V CC VIN VI/O PD Topr Tstg Tsolder –0.5 to +7.0 –0.5* to V CC + 0.5 –0.5* to VCC + 0.5 0.7 0 to +70 –55 to +150 235 · 10 V V V W °C · s Item Symbol Rating Unit Absolute Maximum Ratings (Ta = 25°C, GND = 0V) * VIN, VI/O = –3.0V Min. for pulse width less than 50ns. Pin Description A0 to A16 I/O1 to I/O9 CE1, CE2 WE OE V CC GND A16 A14 A12 I/O1 I/O2 I/O3 I/O4 GND CXK591000M Vcc A15 CE2 WE A13 A11 OE A10 CE1 I/O9 I/O8 I/O7 I/O6 I/O5 OE A10 CE1 I/O9 I/O8 I/O7 I/O6 I/O5 GND I/O4 I/O3 I/O2 I/O1 A11 A13 WE CE2 A15 Vcc A16 A14 A12 I/O1 I/O2 I/O3 I/O4 GND I/O5 I/O6 I/O7 I/O8 I/O9 CE1 A10 OE A12 A14 A16 Vcc A15 CE2 WE A13 A11 CXK591000TM (Standard Pinout) CXK591000YM (Mirror Image Pinout) Pin Configuration (Top View) H L L L L H H H H L H H L Not selected Not selected Output disable Read Write High Z High Z High Z Data out Data in I SB1 , ISB2 ISB1 , ISB2 ICC1 , ICC2 , ICC3 ICC1 , ICC2 , ICC3 ICC1 , ICC2 , ICC3 CE1 CE2 OE WE Mode I/O pin V CC Current Truth Table

– 3 – CXK591000TM/YM/M Supply voltage Input high voltage Input low voltage Item Symbol Min. Typ. Max. Unit VCC VIH VIL 4.5 2.2 –0.3* 5.0 5.5 V CC + 0.3 0.8 V V V DC Recommended Operating Conditions (Ta = 0 to +70°C, GND = 0V) * VIL = –3.0V Min. for pulse width less than 50ns. Input leakage current Output leakage current Operating power supply current ILI ILO ICC1 VIN = GND to VCC CE1 = VIH or CE2 = VILor OE = VIH or WE = VIL VI/O = GND to VCC CE1 = VIL, CE2 = VIH VIN = VIH or VIL IOUT = 0mA -55LL -70LL -10LL 0 to +70°C 0 to +40°C +25°C — 12 24 0.8 0.6 2.4 µA mA 100 µA µA mA mA mA Item System Min. Typ.* Max. UnitTest conditions

Electrical Characteristics

  • DC Characteristics (VCC = 5V ± 10%, GND = 0V, Ta = 0 to +70°C) * VCC = 5V, Ta = 25°C Average operating current Output high voltage Output low voltage Standby current ICC2 ICC3 ISB1 ISB2 VOH VOL Min. cycle duty = 100% I OUT = 0mA Cycle time 1µs duty = 100% I OUT = 0mA CE1 ≤ 0.2V CE2 ‡ Vcc – 0.2V VIL≤ 0.2V VIH ‡ Vcc – 0.2V CE2 ≤ 0.2V CE1 ‡ Vcc – 0.2V CE2 ‡ Vcc – 0.2V CE1 = VIH or CE2 = VIL IOL = 2.1mA 2.4 0.4 V V IOH = –1.0mA

– 4 – CXK591000TM/YM/M Input capacitance I/O capacitance Item Symbol Test conditions Min. Typ. Max. Unit C IN C I/O pF pF VIN = 0V VI/O = 0V Input pulse high level Input pulse low level Input rise time Input fall time Input and output reference level -55LL -70LL/10LL V IH = 2.2V VIL = 0.8V tr = 5ns tf = 5ns 1.5V C L* = 30pF, 1TTL C L* = 100pF, 1TTL Item Conditions Output load conditions AC Characteristics

  • AC test conditions (VCC = 5V ± 10%, Ta = 0 to +70°C) * C L includes scope and jig capacitances. I/O capacitance (Ta = 25°C, f = 1MHz) Note)This parameter is sampled and is not 100% tested. TTL C L
  • Test circuit

– 5 – CXK591000TM/YM/M Item Symbol -55LL -70LL -10LL Unit tRC tAA tCO1 tCO2 tOE tOH tLZ1, tLZ2 tOLZ tHZ1 , tHZ2 * tOHZ * 100 100 100 100 ns ns ns ns ns ns ns ns ns ns Read cycle time Address access time Chip enable access time (CE1) Chip enable access time (CE2) Output enable to output valid Output hold from address change Chip enable to output in low Z (CE1, CE2) Output enable to output in low Z (OE) Chip disable to output in high Z (CE1, CE2) Output disable to output in high Z (OE)

  • Read cycle (WE = "H") * tHZ1 , tHZ2 and tOHZ are defined as the time required for outputs to turn to high impedance state and are not referred to as output voltage levels. * tWHZ is defined as the time required for outputs to turn to high impedance state and is not referred to as output voltage level. Item Symbol -55LL -70LL -10LL Unit tWC tAW tCW tDW tDH tWP tAS tWR tWR1 tOW tWHZ * 100 ns ns ns ns ns ns ns ns ns ns ns Write cycle time Address valid to end of write Chip enable to end of write Data to write time overlap Data hold from write time Write pulse width Address setup time Write recovery time (WE) Write recovery time (CE1, CE2) Output active from end of write Write to output in high Z
  • Write cycle

– 6 – CXK591000TM/YM/M Address tAA tRC tOH Data out Previous data valid Data valid Address tAA tRC tLZ2 tOHZtOE tOLZ CE1 OE Data out High impedance Data valid tCO1 tHZ tLZ1 tHZ1 tHZ2 tCO2CE2 Timing Waveform

  • Read cycle (1) : CE1 = OE = VIL, CE2 = VIH, WE = VIH
  • Read cycle (2) : WE = VIH

– 7 – CXK591000TM/YM/M Address tAW tWC tCW tDH tWHZ tDW CE1 WE Data out High impedance Data valid tOW (∗2) (∗2) OE Data in tWR tAS tWP (∗1) tCW CE2

  • Write cycle (1) : WE control
  • Write cycle (2) : CE1 control Address OE tWC tAW Data valid tAS tCW tWR1 tWP tDW tDH High impedance CE1 WE Data out Data in tCW (∗3) CE2

– 8 – CXK591000TM/YM/M *1 Write is executed when both CE1 and WE are at low and CE2 is at high simultaneously. *2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition. *3 tWR1 is tested from either the rising edge of CE1 or the falling edge of CE2, whichever comes earlier, until the end of the write cycle.

  • Write cycle (3) : CE2 control Address OE tWC tAW Data valid tCW tWR1 tWP tDW tDH High impedance CE1 WE Data out Data in tAS tCW (∗3) CE2

– 9 – CXK591000TM/YM/M Data retention voltage Data retention setup time Recovery time VDR ICCDR1 ICCDR2 tCDRS tR 0 to +70°C 0 to +40°C +25°C V CC = 2.0 to 5.5V*1 Chip disable to data retention mode 2.0 0.5 0.8* 5.5 1.4 V µA µA ns ms Item Symbol Test conditions Min. Typ. Max. Unit Data Retention Characteristics (Ta = 0 to +70°C) *1 CE1 ‡ Vcc – 0.2V, CE2 ‡ Vcc – 0.2V (CE1 control) or CE2 ≤ 0.2V (CE2 control) *2 VCC = 5V, Ta = 25°C Data retention current VCC = 3.0V*1 VCC 4.5V 2.2V VDR CE1 GND tCDRS Data retention mode CE1 ≥ VCC – 0.2V tR Data retention mode tRtCDRS CE2 ≤ 0.2V VCC 4.5V 0.4V CE2 GND VDR Data retention waveform

  • Low supply voltage data retention waveform (1) (CE1 control)
  • Low supply voltage data retention waveform (2) (CE2 control)

– 10 – CXK591000TM/YM/M Example of Representative Characteristics 4.5 4.75 5 5.25 5.5 0.6 0.8 1.0 1.2 1.4 0 20 40 60 80 0.8 0.9 1.0 1.1 1.2 0 20 40 60 80 0.6 0.8 1.0 1.2 1.4 TOE TAA , TCO1 , TCO2 Ta = 25°C ICC 1 ICC 2 (Write) ICC 2 (Read) VCC = 5.0V TOE TCO1 , TCO2 , TAA VCC = 5.0V 4.5 4.75 5 5.25 5.5 1.5 1.25 0.5 ICC 1 ICC 2 Ta = 25°C 1.0 0.75 048 1 2 2 0 0.2 0.4 0.6 1.0 Read 55ns100ns 0.8 Write Vcc = 5.0V Ta = 25°C 70ns 0 100 200 300 400 0.6 1.0 1.2 1.4 1.6 1.8 2.0 TOE TAA , TCO1 , TCO2 VCC = 5.0V Ta = 25°C 0.8 Supply current vs. Supply voltage Supply current vs. Frequency Access time vs. Supply voltage Access time vs. Ambient temperature Access time vs. Load capacitance Supply current vs. Ambient temperature ICC1 , I CC2 – Supply current (Relative Value) ICC2 – Supply current (Relative Value) T AA , T CO1 , T CO2 , T OE – Access time (Relative Value) ICC1 , I CC2 – Supply current (Relative Value) T AA , T CO1 , T CO2 , T OE – Access time (Relative Value) T AA , T CO1 , T CO2 , T OE – Access time (Relative Value) Ta – Ambient temperature [°C] C L – Load capacity [pF] Ta – Ambient temperature [°C]VCC – Supply voltage [V] Frequency (1/tRC , 1/tWC ) [MHz] VCC – Supply voltage [V]

– 11 – CXK591000TM/YM/M 1.2 0.8 1.4 1.2 1.0 0.8 0.6 1.4 1 2345 1.8 1.4 1.0 0.6 0 0.2 0.4 0.6 0.2 02 04 06 08 0 0.5 0 2 04 06 08 0 Vcc = 5.0V Vcc = 5.0VTa = 25°C 1.2 1.0 0.8 0.6 Vcc = 5.0V Ta = 25°C 0.8 Vcc = 5.0V Ta = 25°C 1.1 1.0 0.9 VIL, VIH 2.0 1.5 1.0 0.5 Ta = 25°C ISB1 ISB2 Standby current vs. Ambient temperatureStandby current vs. Supply voltage ISB1 – Standby current (Relative value) ISB2 – Standby current (Relative value) V IL , V IH – Input voltage (Relative value) Ta – Ambient temperature [°C] VCC – Supply voltage [V] VOL – Output low voltage [V] Output low current vs. Output low voltage Standby current vs. Ambient temperature Output high current vs. Output high voltage Input voltage level vs. Supply voltage Ta – Ambient temperature [°C] VOH – Output high voltage [V] IOH – Output high current (Ralative value) ISB1 , I SB2 – Standby current (Relative value) VCC – Supply voltage (V) IOL – Output low current (Ralative value)

– 12 – CXK591000TM/YM/M Package Outline Unit: mm CXK591000TM CXK591000YM SONY CODE EIAJ CODE JEDEC CODE TSOP-32P-L01 TSOP032-P-0820 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT

42 ALLOY

32PIN TSOP (PLASTIC) M0.08 0.5 0.2 – 0.03 + 0.08 161 1732 8.0 ± 0.2 1.07 – 0.1 + 0.2 0.127 – 0.02 + 0.05 0.1 ± 0.1 0.5 ± 0.1 0° to 10° A 0.1 DETAIL ANOTE : “∗” Dimensions do not include mold protrusion. 0.3g SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING 32PIN TSOP (PLASTIC) M0.08 0.5 0.2 – 0.03 + 0.08 16 1 17 32 8.0 ± 0.2 1.07 – 0.1 + 0.2 0.127 – 0.02 + 0.05 0.1 ± 0.1 0.5 ± 0.1 0° to 10° A 0.1 DETAIL A 0.3g NOTE: Dimension “∗” does not include mold protrusion.

– 13 – CXK591000TM/YM/M CXK591000M M0.12 1.27 161 0.4 ± 0.1 32 17 20.5 – 0.1 + 0.4 11.2 – 0.1 + 0.3 14.0 ± 0.4 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT SONY CODE EIAJ CODE JEDEC CODE SOP-32P-L02 SOP032-P-0525 EPOXY RESIN SOLDER PLATING 1.2g 32PIN SOP (PLASTIC) DETAIL A 2.9 – 0.25 + 0.15 0.1 A11.9 0.15 – 0.05 + 0.1 0.2 ± 0.1 0.8 ± 0.2 0° to 10°