Logic IC

CXD5091AGG

Sony Corporation

Ultra low power Audio Decoder LSI

Manufacturer: Sony Corporation

Document: 31 Pages / 352Kb

Request Quote Download Datasheet Read online HTML view

More from Sony Corporation Browse C parts

Online Datasheet

Read CXD5091AGG online.

CXD5091AGG SONY | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 31

Technical content

Features

CPU : ARM7TDMI RAM : 320K bytes ROM : 448K bytes Frequency : 45.1584MHz Peripherals Host interface : SRAM, NOR flash slave compatible Host processor can be connected. 16/8-bit data bus, 4-chip select Bus interface : 16/8-bit data bus, 5-chip select An external acknowledge device is also supported. NAND flash interface : 4-symbol ECC, Reed-Solomon error correction 4-chip select DMA controller : × 4ch Serial interface : × 2ch (1ch supports up to 3Mbps baud rate.) Clocked serial interface : × 2ch Memory Stick interface : MS-Pro × 1ch I2C bus interface : × 1ch Audio interface : × 1ch Either analog audio interface or I2S bus interface can be selected as transfer protocol. USB2.0 : PHY included, Low/Full/High-speed device, 5 end points, Control/Interrupt/ Bulk/Isochronous transfer 8-bit timer : × 8ch, internal clock/external event trigger Watchdog timer : 16-bit × 1ch PWM pulse generator : 8-bit × 1ch A/D converter : 10-bit × 8 analog inputs, SAR, 1Msps Audio D/A converter : 24-bit × 2

2 - Sampling rate converter : 8 to 96kHz sampling frequency is converted to 44.1kHz. Peak detection Magic Gate : × 1ch Interrupt controller : External event × 12 General-purpose I/O : 116 (When all multiplexed pins are set as GPIO), Direction individually selected Signal processing accelerator : Virtual Mobile Engine Oscillator Main : 45.1584MHz input, Crystal/Ceramic selectable Sub : 12MHz input, Crystal/Ceramic selectable Process : CMOS 0.13 μm Conventions In this data sheet abbreviations shown below are used to simplify descriptions. Abbreviation Description fSYS Frequency of system clock which can be selected either in 45MHz, 22MHz, 11MHz, 5.6MHz, 2.8MHz or 1.4MHz tSYS Cycle time of system clock which can be selected either in 22ns, 44ns, 89ns, 177ns, 354ns or 708ns

3 - Pin Configuration Fig. 1 and Fig. 2 show the package of the CXD5091AGG. Fig. 1. 273-pin Package (Top View) Fig. 2. 273-pin Package (Bottom View) 1234567891011121314151617 A B C D E F G H J K L M N P R T U Pin 1 index mark 9mm × 9mm 273-pin TFBGA U T R P N M L K J H G F E D C B A U T R P N M L K J H G F E D C B A 258 253 256 268 267 269 264 265 255 263 266 254 259 251 257 262 248 249 246 252 260 261 240 245 239 247 250 244 243 242 100 238 241 237 230 234 221 233 232 104 113 101 107 236 235 231 224 226 215 183 168 153 110 121 108 106 105 120 228 229 225 217 216 191 112 137 115 109 111 117 220 213 207 211 209 188 193 178 163 148 161 152 141 127 128 116 102 208 212 205 197 196 182 181 172 167 162 158 151 136 132 129 126 122 223 201 204 199 192 184 177 176 171 166 157 146 144 139 134 131 130 218 206 194 195 190 185 180 175 170 165 160 155 150 145 140 133 135 NC 202 203 189 186 179 174 169 164 149 156 123 124 125 159 154 NC NC NC 222 227 219 214 210 187 200 198 173 143 147 142 119 118 114 103 138

Table 1. Pin Coordinates

1 C3 NAD0/GPIOC0 38 K5 EVA

2 D3 NAD1/GPIOC1 39 L6 TREQA

3 D4 NAD2/GPIOC2 40 R1 TACK

4 F6 NAD3/GPIOC3 41 J2 SCL/GPIOK0

5 D1 NAD4/GPIOC4 42 M6 SDA/GPIOK1

6 C2 NAD5/GPIOC5 43 L5 EC0/INT6/GPIOL0

7 E3 NAD6/GPIOC6 44 M5 T1/GPIOL1

8 E4 NAD7/GPIOC7 45 K3 EC2/INT7/GPIOL2

9 G6 NCLE/GPIOC8 46 T3 T3/GPIOL3

10 B3 NALE/GPIOC9 47 N4 BEEP/GPIOL4

11 D2 NCE0

12 H6 NCE1 /GPIOC11 49 T2 DVS

13 F5 NCE2 /GPIOC12 50 L3 DVDIO2

14 F4 NCE3 /GPIOC13 51 M4 DVDIO2

15 E1 NRE /GPIOC14 52 T1 DVS

16 E2 NWE /GPIOC15 53 M3 DVDK2

17 F3 NWP /GPIOC16 54 U3 DVS

18 G4 NRB0 /GPIOC17 55 N3 AVDLPF

19 G3 NRB1 /GPIOC18 56 J1 VREFL

20 F1 NRB2 /GPIOC19 57 K1 AOUTL

21 G5 NRB3 /GPIOC20 58 L1 AOUTR

22 J6 DVS 59 M1 VREFR

23 G1 DVDIO2 60 P3 AVSLPF

24 H5 DVDIO2 61 P5 AVDADC

25 B1 DVS 62 K2 AN0

26 F2 DVDK2 63 L2 AN1

27 C1 DVS 64 N1 AN2

28 H4 GPION0/INT8 65 M2 AN3

29 K6 GPION1/INT9 66 N2 AN4

30 H1 GPION2/INT10 67 P2 AN5

31 G2 GPION3/INT11 68 R2 AN6

32 J5 TDI 69 P1 AN7

33 J4 TMS 70 R4

34 J3 TCK 71 R3 NC

35 H3 TDO 72 T4 INT1/GPIOF0

36 H2 TRST

73 P4 DREQ/INT2/GPIOF1

37 K4 TEST 74 R5 DACK/INT3/GPIOF2

5 - Pin No. Coordinate Pin name Pin No. Coordinate Pin name

75 P6 INT4/GPIOF3 112 M11 SCS0 /GPIOG2

76 N5 INT5/GPIOF4 113 N9 SI1/GPIOH1

77 U2 DVS 114 T12 SO1/GPIOH0

78 R6 DVDIO2 115 P11 SCK1

79 M7 DVDK2 116 T13 SCS1 /GPIOH2

80 U6 DVS 117 U11 DVS

81 T5 DVDIO2 118 R12 DVDIO1

82 U7 DVS 119 P12 DVDIO1

83 N6 MSBS/INT0/GPIOE0 120 U10 DVS

84 R7 MSSCLK 121 N10 DVDK1

85 K8 MSDIO0/GPIOE1 122 U14 DVS

86 P7 MSDIO1/GPIOE2 123 M17 FS256

87 N7 MSDIO2/GPIOE3 124 N17 LRCK/WS

88 P8 MSDIO3/GPIOE4 125 P17 BCK/SCK

89 T6 MSINS

/GPIOE5 126 T14 ADDT/SDI/GPIOM0

90 R8 MCSEL 127 P13 DADT/SDO/GPIOM1

91 M8 AVDOSC1 128 R13 MUTFGL/GPIOM2

92 U4 EXTAL 129 R14 MUTFGR/GPIOM3

93 U5 XTAL 130 U15

94 T7 AVSOSC 131 T15 DVDIO2

95 U8 TEX 132 P14 DVDIO2

96 U9 TX 133 T16 DVS

97 M9 AVDOSC2 134 R15 DVDK2

98 P9 AVSPLL 135 U16 DVS

99 T8 AVDPLL 136 N14 NBOOT

100 N8 AVDUSB 137 N11 A0/GPIOA0

101 R9 AVSUSB 138 L12 A1

102 U13 DP 139 P15 A2

103 U12 DM 140 R16 A3

104 K9 VBUS/GPIOD0 141 N13 A4

105 T10 TxD0/GPIOI0 142 N12 A5

106 R10 RxD0/GPIOI1 143 K12 A6

107 T9 TxD1/GPIOJ0 144 N15 A7

108 P10 RxD1/GPIOJ1 145 P16 A8

109 R11 SI0/GPIOG1 146 M15 A9

110 M10 SO0/GPIOG0 147 M12 A10

111 T11 SCK0

148 K13 A11

6 - Pin No. Coordinate Pin name Pin No. Coordinate Pin name

149 K17 A12 185 F16 D10/GPIOA14

150 N16 A13 186 E17 D11/GPIOA15

151 M14 A14 187 F12 D12/GPIOA16

152 M13 A15 188 F13 D13/GPIOA17

153 K10 A16 189 D17 D14/GPIOA18

154 T17

155 M16 DVDIO2 191 F11 WAIT /GPIOA20

156 L17 DVDIO2 192 E15 CS0 /GPIOA21

157 L15 DVS 193 G13 CS1 /GPIOA22

158 L14 DVDK2 194 C16 CS2 /GPIOA23

159 R17 DVS 195 D16 CS3 /GPIOA24

160 L16 A17 196 E14 CS4 /GPIOA25

161 L13 A18 197 D14 RE /GPIOA26

162 K14 A19 198 H12 WE /GPIOA27

163 J13 A20 199 D15 LB /GPIOA28

164 J17 A21 200 G12 UB /GPIOA29

165 K16 A22 201 B15 DVDK2

166 K15 A23/GPIOA1 202 B17 DVS

167 J14 A24/GPIOA2 203 C17 DVS

168 J10 A25/GPIOA3 204 C15 DVDIO2

169 H17 D0/GPIOA4 205 C14 DVDIO2

170 J16 D1/GPIOA5 206 B16 DVS

171 J15 D2/GPIOA6 207 C13 HA0

172 H14 D3/GPIOA7 208 A14 HA1

173 J12 D4/GPIOA8 209 E13 HA2

174 G17 D5/GPIOA9 210 E12 HA3

175 H16 D6/GPIOA10 211 D13 HA4

176 H15 D7/GPIOA11 212 B14 HA5

177 G15

178 H13 DVDIO2 214 D12 HA7

179 F17 DVDIO2 215 F10 HA8

180 G16 DVS 216 E11 HA9

181 G14 DVDK2 217 D11 HA10

182 F14 DVS 218 A16 DVS

183 H10 D8/GPIOA12 219 C12 DVDIO0

184 F15 D9/GPIOA13 220 A13 DVDIO0

7 - Pin No. Coordinate Pin name Pin No. Coordinate Pin name

221 F9 DVS 252 D7 HD15/GPIOB17

222 A12 DVDK0 253 B2 DVS

223 A15 DVS 254 A6 DVDIO0

224 D10 HA11 255 C5 DVDK0

225 C11 HA12 256 A3 DVS

226 E10 HA13 257 D6 DVDIO0

227 B12 HA14 258 A2 DVS

228 A11 HA15 259 B6 RST

229 B11 HA16/GPIOB0 260 E7 HWAIT /GPIOB18

230 D9 HA17/GPIOB1 261 F7 HCS /GPIOB19

231 C10 HD0/GPIOB2 262 E6 HBUS8 /GPIOB20

232 J9 HD1/GPIOB3 263 D5 HBIG/GPIOB21

233 H9 HD2/GPIOB4 264 A5 HADMUX/GPIOB22

234 E9 HD3/GPIOB5 265 B5 HALE/GPIOB23

235 B10

236 A10 DVDIO0 267 B4 HWE /GPIOB25

237 C9 DVDK0 268 A4 HLB /GPIOB26

238 A9 DVS 269 C4 HUB /GPIOB27

239 C8 DVDIO0

240 A8 DVS

241 B9 HD4/GPIOB6

242 J8 HD5/GPIOB7

243 H8 HD6/GPIOB8

244 F8 HD7/GPIOB9

245 B8 HD8/GPIOB10

246 C7 HD9/GPIOB11

247 D8 HD10/GPIOB12

248 A7 HD11/GPIOB13

249 B7 HD12/GPIOB14

250 E8 HD13 / GPIOB15

251 C6 HD14 / GPIOB16

Table 2 shows the pin description. Table 2. Pin Description

9 - EC0/INT6/GPIOL0 Input / Input / I/O Event clock input 0 Interrupt 6 GPIO group L 0 to 5 T1/GPIOL1 Output / I/O Event trigger output 1 EC2/INT7/GPIOL2 Input / Input / I/O Event clock input 2 Interrupt 7 T3/GPIOL3 Output / I/O Event trigger output 3 BEEP/GPIOL4 Output / I/O Beep output PWM/SUSPEND/ GPIOL5 Output / Output / I/O PWM output USB2.0 suspend status VREFL Output LPF reference voltage output (Lch) AOUTL Output LPF output (Lch) AOUTR Output LPF output (Rch) VREFR Output LPF reference voltage output (Rch) AN0 Input SAR A/D converter analog input (ch0) AN1 Input SAR A/D converter analog input (ch1) AN2 Input SAR A/D converter analog input (ch2) AN3 Input SAR A/D converter analog input (ch3) AN4 Input SAR A/D converter analog input (ch4) AN5 Input SAR A/D converter analog input (ch5) AN6 Input SAR A/D converter analog input (ch6) AN7 Input SAR A/D converter analog input (ch7) INT1/GPIOF0 Input / I/O — Interrupt 1 to 5 GPIO group F 0 to 4 DREQ/INT2/GPIOF1 Input / Input / I/O BIU external acknowledge device DMA request input DACK/INT3/GPIOF2 Output / Input / I/O BIU external acknowledge device DMA request output INT4/GPIOF3 Input / I/O — INT5/GPIOF4 Input / I/O — MSSCLK Output MS Pro I/F clock output MSBS/INT0/GPIOE0 Output / Input / I/O MS Pro I/F bus state output Interrupt 0 GPIO group E 0 to 5 MSDIO0/GPIOE1 I/O / I/O MS Pro I/F data 0 to 3 I/O MSDIO1/GPIOE2 I/O / I/O MSDIO2/GPIOE3 I/O / I/O MSDIO3/GPIOE4 I/O / I/O MSINSN/GPIOE5 Input / I/O MS Pro I/F attach detection MCSEL Input Main oscillator ceramic select. H: ceramic, L: crystal EXTAL Input Main oscillator 45.1584MHz input XTAL Output Main oscillator output TEX Input Sub oscillator 12MHz input TX Output Sub oscillator output Pin name Direction Description

10 - DP I/O USB2.0 D+ DM I/O USB2.0 D– VBUS/GPIOD0 Input / I/O USB2.0 VBUS interrupt GPIO group D 0 TxD0/GPIOI0 Output / I/O UART0 transmit data GPIO group I 0 to 1 RxD0/GPIOI1 Input / I/O UART0 receive data TxD1/GPIOJ0 Output / I/O UART1 transmit data GPIO group J 0 to 1 RxD1/GPIOJ1 Input / I/O UART1 receive data SO0/GPIOG0 Output / I/O Clocked serial 0 transmit data GPIO group G 0 to 2SI0/GPIOG1 Input / I/O Clocked serial 0 receive data SCS0 /GPIOG2 Input / I/O Clocked serial 0 external start trigger SCK0 I/O Clocked serial 0 clock SO1/GPIOH0 Output / I/O Clocked serial 1 transmit data GPIO group H 0 SI1/GPIOH1 Input / Input Clocked serial 1 receive data GPIO group H 1 SCS1/GPIOH2 Input / I/O Clocked serial 1 external start trigger GPIO group H 2 SCK1 I/O Clocked serial 1 clock FS256 Output 256fs (11.2896MHz) clock output LRCK/WS I/O / I/O Audio serial LR clock I 2S word select BCK/SCK I/O / I/O Audio serial bit clock I 2S clock ADDT/SDI/GPIOM0 Input / Input / I/O Audio serial data input I2S data input GPIO group M 0 to 3 DADT/SDO/GPIOM1 Output / Output / I/O Audio serial data output I2S data output MUTFGL/GPIOM2 Output / I/O Mute (Lch) output MUTFGR/GPIOM3 Output / I/O Mute (Rch) output NBOOT Input NAND flash ROM boot select. H: NAND boot, L: NOR boot Pin name Direction Description

11 - A0/GPIOA0 Output / I/O BIU address 0 GPIO group A 0 A1 Output BIU address 1 to 22 A2 Output A3 Output A4 Output A5 Output A6 Output A7 Output A8 Output A9 Output A10 Output A11 Output A12 Output A13 Output A14 Output A15 Output A16 Output A17 Output A18 Output A19 Output A20 Output A21 Output A22 Output A23/GPIOA1 Output / I/O BIU address 23 to 25 GPIO group A 1 to 3A24/GPIOA2 Output / I/O A25/GPIOA3 Output / I/O Pin name Direction Description

12 - D0/GPIOA4 I/O / I/O BIU data 0 to 15 GPIO group A 4 to 29 D1/GPIOA5 I/O / I/O D2/GPIOA6 I/O / I/O D3/GPIOA7 I/O / I/O D4/GPIOA8 I/O / I/O D5/GPIOA9 I/O / I/O D6/GPIOA10 I/O / I/O D7/GPIOA11 I/O / I/O D8/GPIOA12 I/O / I/O D9/GPIOA13 I/O / I/O D10/GPIOA14 I/O / I/O D11/GPIOA15 I/O / I/O D12/GPIOA16 I/O / I/O D13/GPIOA17 I/O / I/O D14/GPIOA18 I/O / I/O D15/GPIOA19 I/O / I/O WAIT /GPIOA20 Input / I/O BIU wait input CS0/GPIOA21 Output / I/O BIU chip select bank 0 CS1/GPIOA22 Output / I/O BIU chip select bank 1 CS2/GPIOA23 Output / I/O BIU chip select bank 2 CS3/GPIOA24 Output / I/O BIU chip select bank 3 CS4/GPIOA25 Output / I/O BIU chip select bank 4 RE/GPIOA26 Output / I/O BIU read enable WE/GPIOA27 Output / I/O BIU write enable LB/GPIOA28 Output / I/O BIU lower byte enable UB/GPIOA29 Output / I/O BIU upper byte enable RST Input System reset Pin name Direction Description

13 - HA0 I/O HOST I/F address input, data I/O (address/data multiplex mode) HA1 I/O HA2 I/O HA3 I/O HA4 I/O HA5 I/O HA6 I/O HA7 I/O HA8 I/O HA9 I/O HA10 I/O HA11 I/O HA12 I/O HA13 I/O HA14 I/O HA15 I/O Pin name Direction Description

14 - HA16/GPIOB0 Input / I/O HOST I/F address input GPIO group B 0 to 27 HA17/GPIOB1 Input / I/O HD0/GPIOB2 I/O / I/O Host I/F data I/O (Address/data separate mode) HD1/GPIOB3 I/O / I/O HD2/GPIOB4 I/O / I/O HD3/GPIOB5 I/O / I/O HD4/GPIOB6 I/O / I/O HD5/GPIOB7 I/O / I/O HD6/GPIOB8 I/O / I/O HD7/GPIOB9 I/O / I/O HD8/GPIOB10 I/O / I/O HD9/GPIOB11 I/O / I/O HD10/GPIOB12 I/O / I/O HD11/GPIOB13 I/O / I/O HD12/GPIOB14 I/O / I/O HD13/GPIOB15 I/O / I/O HD14/GPIOB16 I/O / I/O HD15/GPIOB17 I/O / I/O HWAIT /GPIOB18 Output / I/O Host I/F wait output HCS/GPIOB19 Input / I/O Host I/F chip select HBUS8/GPIOB20 Input / I/O Host I/F 8/16-bit data select HBIG/GPIOB21 Input / I/O Host I/F endianness select HADMUX/GPIOB22 Input / I/O Address/data separate, multiplex select HALE/GPIOB23 Input / I/O Address latch enable (address data mux) HRE /GPIOB24 Input / I/O Host I/F read enable HWE/GPIOB25 Input / I/O Host I/F write enable HLB/GPIOB26 Input / I/O Host I/F lower byte enable HUB/GPIOB27 Input / I/O Host I/F upper byte enable Pin name Direction Description

Table 3 shows the correspondence of power supply/GND pins to general pins. Table 3. Power Supply/GND Correspondence to General Pins

16 - State of Pins Table 4 shows the state of pins at certain conditions.

Table 4. State of Pins

description

after reset, pull-up or pull-down Output drivability*1 Termination when not used I/O type NAD0/GPIOC0 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NAD1/GPIOC1 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NAD2/GPIOC2 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NAD3/GPIOC3 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NAD4/GPIOC4 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NAD5/GPIOC5 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NAD6/GPIOC6 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NAD7/GPIOC7 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NCLE/GPIOC8 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NALE/GPIOC9 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NCE0/GPIOC10 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 NCE1/GPIOC11 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 NCE2/GPIOC12 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 NCE3/GPIOC13 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 NRE/GPIOC14 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NWE/GPIOC15 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NWP/GPIOC16 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 NRB0/GPIOC17 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 1 NRB1/GPIOC18 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 1 NRB2/GPIOC19 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 1 NRB3/GPIOC20 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 1 GPION0/INT8 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 2 GPION1/INT9 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 2 GPION2/INT10 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 2 GPION3/INT11 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 2 TDI Input Test pin Pull-up Open Input Note 3 TMS Input Test pin Pull-up Open Input Note 3 TCK Input Test pin Pull-up Open Input Note 3 TDO Low output Test pin DIOH1, DIOL1 Open Output Note 5 TRST Input Test pin None DVDIO2 Input Note 3 TEST Input Test pin Pull-down Open Input Note 3 EVA Input Test pin Pull-down Open Input Note 3 TREQA Input Test pin Pull-down Open Input Note 3

17 - TACK Low output Test pin DIOH1, DIOL1 Open Output Note 5 SCL/GPIOK0 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 7 SDA/GPIOK1 Input GPIO None DI OH1, DIOL1 DVDIO2 I/O Note 6 EC0/INT6/GPIOL0 Input GPIO None DI OH1, DIOL1 DVS I/O Note 2 T1/GPIOL1 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 EC2/INT7/GPIOL2 Input GPIO None DI OH1, DIOL1 DVS I/O Note 2 T3/GPIOL3 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 BEEP/GPIOL4 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 PWM/SUSPEND/ GPIOL5 Input GPIO None DI OH2, DIOL2 DVS I/O Note 1 VREFL Unknown output Functional Open Analog AOUTL Unknown output Functional Open Analog AOUTR Unknown output Functional Open Analog VREFR Unknown output Functional Open Analog AN0 Input Functional Open Analog AN1 Input Functional Open Analog AN2 Input Functional Open Analog AN3 Input Functional Open Analog AN4 Input Functional Open Analog AN5 Input Functional Open Analog AN6 Input Functional Open Analog AN7 Input Functional Open Analog INT1/GPIOF0 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 DREQ/INT2/GPIOF1 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 DACK/INT3/GPIOF2 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 INT4/GPIOF3 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 INT5/GPIOF4 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 MSSCLK Low output Functional DIOH2, DIOL2 Open Output Note 5 MSBS/INT0/GPIOE0 Input GPIO None DI OH1, DIOL1 DVS I/O Note 2 MSDIO0/GPIOE1 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 MSDIO1/GPIOE2 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 MSDIO2/GPIOE3 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 MSDIO3/GPIOE4 Input GPIO None DI OH1, DIOL1 DVS I/O Note 1 MSINS/GPIOE5 Input GPIO None DI OH1, DIOL1 DVS I/O Note 2 MCSEL Input Functional None DVS Input Note 3 Pin name On reset/ after reset, state of pins On reset/ after reset,