CXA2013

CXA2013M SONY | Alldatasheet

Document overview

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Technical content

Features

• Adjustment free of filter  Audio multiplexing decoder  Sound processor — One external input — Bass control — T reble control — Volume control — Balance control are all included in a single chip. Almost any sort of signal processing is possible through this IC.  Separation adjustment, each mode control and sound processor control are possible through I 2C BUS.

Applications

Bipolar silicon monolithic IC EIAJ Sound Multiplexing Decoder Absolute Maximum Ratings (T a = 25°C)  Supply voltage V CC 12 V  Operating temperature T opr –20 to +75 °C  Storage temperature Tstg –65 to +150°C  Allowable power dissipation PD 1000 mW Operating Supply Voltage Range 8.5 to 9.5 V Pin Configuration

– 2 – CXA2013M Block Diagram SUBDEEM MATRIX SW TONE BASS TRE VOL BAL VCA FM DEMOD MAINDEEM MAIN SUB VOLTAGE REGULATOR SUB DET SUB BPF 4.5fH TRAP CUE BPF VCA ATT MPX SIGNAL AM DEMOD 952Hz BPF 952Hz CLOCKCOMP IIL LOGIC & CONT 3.5fH VCO 3.5fH CLOCK CUE CARRIOR IBIAS BIAS CURRENT BIAS VOLTAGE BUFFER

16 LS OUT-L

2 GND

3 REFL

4 Vcc

5 MPX IN

6 CUBI

8 SDA

9 SCL

– 3 – CXA2013M 1 SUBI 4.1V

2 GND 0

4V CC — 3 REFL 1.2V 5 MPX IN 4.1V 6 CUBI 4.1V 23, NC 147 64k Vcc 20µ80µ 16k 1.7V4.2V 147 1k16k Vcc Vcc 147 GND 3.3k 20k 20k 24k Vcc 147 80µ GND 87.9k 50k 30k 4.2V 27.6k Vcc 147 40k 40k 40k Vcc 11k 4.2V Pin Description (T a = 25°C, VCC = 9V) Pin No. Symbol Pin voltage Equivalent circuit Description Bias capacitor connection of sub FM detector Analog block GND Power supply The noise elimination filter connection of internal reference voltage Sound multiplexing signal input. T ypical input level = 110mVrms (monoural 100%) Bias capacitor connection of Cue pulse generator — ——

– 4 – CXA2013M 8S D A

10 DGND

11 BAL 4.2V 12 TRE 4.2V 13 BASS 4.2V 14 VOL 5.2V 7.5k 4.5k 7.5k 2.1V 35µ VCC 7.5k 35µ 2.1V 10.5k ×4 VCC 5.2V 40k 20k 75µ VCC 5.2V 10k 300µ VCC ×4 ×4 Serial data I/O pin VIH > 3.0V VIL < 1.5V Serial clock I/O pin VIH > 3.0V VIL < 1.5V Digital block GND DAC output pin. (BAL) Connect LPF capacitance of DAC. Internal impedance is approximately 20kΩ . DAC output pin. (TRE) Connect LPF capacitance of DAC. Internal impedance is approximately 20kΩ . DAC output pin. (BASS) Connect LPF capacitance of DAC. Internal impedance is approximately 20kΩ . DAC output pin. (VOL) Connect LPF capacitance of DAC. Internal impedance is approximately 5kΩ . Pin No. Symbol Pin voltage Equivalent circuit Description

– 5 – CXA2013M Vcc 250µ 5.7k 147 250µ 5.7k 6k 4.2V 15 4.2V 16 4.2V 500147 500 VCC 84k 10p 20 CL-R 4.2V 19 CL-L 4.2V Vcc 250µ 12.3k 147 250µ 10.7k 5.4k 4.2V

18 CH-R

17 CH-L 4.2V LS OUT -R LS OUT -L 22 AUX-L 4.2V 21 AUX-R 4.2V Vcc 10µ 36k 12k 147 4.2V Left channel external input pin Right channel external input pin LSOUT right channel output pin LSOUT left channel output pin Bass filter pin (Right channel) Bass filter pin (Left channel) T reble filter pin (Right channel) T reble filter pin (Left channel) Pin No. Symbol Pin voltage Equivalent circuit Description

– 6 – CXA2013M 25 TV OUT -L 4.2V 24 TV OUT -R 4.2V 580 580147 14.3k 35.7k 4.2V VCC 30 SC OUT 3.9V 28 SC IN 4.1V 4.2V 320µ 40k Vcc Vcc 16k 4.2V 147 147 8k8k 80µ GND Vcc 27 MC OUT 3.4V 26 MC IN 4.1V Vcc Vcc 147 160µ 147 8k 8k 80µ GND Vcc 16k 4.2V TVOUT left channel output pin TVOUT right channel output pin DC cut capacitor connection of sub signal DC cut capacitor connection of main signal Pin No. Symbol Pin voltage Equivalent circuit Description

– 7 – CXA2013M

Electrical Characteristics

(T a = 25°C, VCC = 9V) Input pin Measurement conditions Output pin Filter Current consumption MPX input level MPX input level range MONO output level MONO frequency response MONO distortion MONO distortion at maximum input MONO S/N Sub output level Sub frequency response Sub distortion Sub S/N ST output level L-ch ST output level R-ch Icc Vin Vrange Vmain Fcmain THDm THDmmax SNmain Vsub Fcsub THDsub SNsub Vstl Vstr MONO MONO MONO MONO MONO BIL BIL BIL BIL ST ST No input MONO 1kHz, 100% mod. MONO 1kHz 100% mod. Sub: Career OFF , Cue: OFF MONO 10kHz 100% mod. Sub: Career OFF , Cue: OFF MONO 1kHz 100% mod. Sub: Career OFF , Cue: OFF MONO 1kHz 300% mod. Sub: Career OFF , Cue: OFF MONO 1kHz 100% mod. Sub: Career OFF , Cue: OFF SUB 1kHz 100% mod. Main 0% mod., Cue: BIL SUB 10kHz 100% mod. Main 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL ST -L 1kHz 100% mod. Cue: Stereo ST -R 1kHz 100% mod. Cue: Stereo 20 log ('10k'/'1k') 20 log ('10k'/'1k') 15kLPF 15kLPF 15kLPF 15kLPF 15kLPF 15kLPF 15kLPF 15kLPF 15kLPF 400 –15.4 400 –18.4 400 400 600 –11.4 1.0 2.0 600 –13.4 2.0 600 600 110 500 –13.4 0.2 0.3 500 –15.9 1.0 500 500 mA mVrms dB mVrms dB dB mVrms dB dB mVrms mVrms No. Item Symbol Mode Input signal Min. T yp. Max. Unit

– 8 – CXA2013M ST distortion L-ch ST distortion R-ch ST separation L → R ST separation R → L Cross talk Main → Sub Cross talk Sub → Main Cross talk Main → Sub BOTH mode Cross talk Sub → Main BOTH mode Sub residual carrier Main residual carrier TVOUT mute attenuation DC offset stereo L-ch DC offset stereo R-ch Cue detection sensitivity SUB detection sensitivity Cue BPF gain Input pin Measurement conditions Output pin FilterNo. Item Symbol Mode Input signal Min. T yp. Max. Unit THDstl THDstr STLsep STRsep CTms CTsm CTmsb CTsmb CLsub CLmain Mutv OSstl OSstr THcue THsub BPcue ST ST ST ST BIL BIL BIL BIL BIL BIL MONO ST ST BIL BIL ST -L 1kHz 100% mod. Cue: Stereo ST -R 1kHz 100% mod. Cue: Stereo ST -L 1kHz 100% mod. Cue: Stereo ST -R 1kHz 100% mod. Cue: Stereo Main 1kHz 100% mod. Sub: 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL Main 1kHz 100% mod. Sub: 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL Main 0% mod. Sub: 0% mod., Cue: BIL Main 0% mod. Sub: 0% mod., Cue: BIL MONO 1kHz 100% mod. Sub: Career OFF , Cue: OFF ST 0% mod. Cue: Stereo ST 0% mod. Cue: Stereo Change Cue level Change SUB career level Sine wave 55.069kHz, 8.8mVrms 20 log ('Lch'/'Rch') 20 log ('Rch'/'Lch') 0 log ('Lch'/'Rch') S1 = '1' 20 log ('Rch'/'Lch') S1 = '1' 20 log (MUTE TV = '0'/ MUTE TV = '1') MUTE TV = '1' – MUTE TV = '0' MUTE TV = '1' – MUTE TV = '0' 20 log ('100%mod.'/ 'BIL-on level') 20 log ('100%mod.'/ 'BIL-on level') TEST = '1' 15kLPF 15kLPF 15kLPF 15kLPF 1kBPF 1kBPF 1kBPF 1kBPF 1kBPF 0.2 0.2 –80 480 dB dB dB dB dB dB mVrms mVrms dB mV mV dB dB mVrms –100 –100 330 1.5 1.5 –70 100 100 620 BUS RETURN BUS RETURN

– 9 – CXA2013M 4.5fH trap attenuation level LSOUT output level LSOUT cross talk EXT → INT LSOUT cross talk INT → EXT LSOUT mute attenuation LSOUT DC offset LSOUT S/N LSOUT distortion BASS maximum boost BASS maximum attenuation TREBLE maximum boost TREBLE maximum attenuation Volume maximum attenuation Volume minimum noise No. Item Symbol Mode Input signal Min. T yp. Max. Unit TR45 Vls CTls1 CTls2 MUls OSls SNls THDls TBmax TBmin TTmax TTmin VOLmin VOLminn EXT INT EXT EXT EXT EXT EXT EXT EXT EXT EXT EXT EXT Sine wave 66mVrms Sine wave 1kHz 500mVrms Sine wave 1kHz 500mVrms Main 1kHz 100% mod. Sub: 0% mod. , Cue: BIL Sine wave 1kHz 500mVrms No input Sine wave 1kHz 500mVrms Sine wave 1kHz 500mVrms Sine wave 100Hz 500mVrms Sine wave 100Hz 500mVrms Sine wave 10kHz 500mVrms Sine wave 10kHz 500mVrms Sine wave 1kHz 500mVrms No input 20 log ('31.47kHz'/ '70.8kHz') EXT = '1' 20 log (EXT = '1'/EXT = '0') 20 log (EXT = '0'/EXT = '1') EXT = '1' MUTE LS = '0' EXT = '1' MUTE LS = '1' – MUTE LS = '0' EXT = '1' EXT = '1' EXT = '1' BASS = '1F' EXT = '1' BASS = '0' EXT = '1' TREBLE = '1F' EXT = '1' TREBLE = '0 ' EXT = '1' VOL = '0' EXT = '1', 20 log (VOL = '0'/ '500mVrms') 1kBPF 1kBPF 1kBPF 15kLPF 15kLPF 1kBPF 15kLPF 500 0.1 11.0 –11.0 11.0 –11.0 –90 –90 dB mVrms dB dB dB mV dB dB dB dB dB dB dB 400 –50 8.5 –13.5 8.5 –13.5 630 –70 0.5 13.5 –8.5 13.5 –8.5 –70 –80 Input pin Measurement conditions Output pin Filter

– 10 – CXA2013M Electrical Characteristics Measurement Circuit SW22 C15 4.7µ C16 C17 SW21 C14 4.7µ C13 0.01µ DGND SIGNAL GENERATOR I 2C BUS DATA SW20 A MEASURES (AC VOLTMETER) FILTER 1kHz BPF 15kHz LPF 30kHz LPF C12 0.01µ 10k C11 4700p C10 4700p 220 220 R3 10k SWC1 0.1µ 0.1µ 0.1µ 0.1µ Vcc 47µ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 SC OUT NC SC IN MC OUT MC IN TV OUT-L TV OUT-R NC AUX-L AUX-R CL-R CL-L CH-R CH-L LS OUT-L SUBI GND REFL Vcc MPX IN CUBI NC SDA SCL DGND BAL TRE BASS VOL LS OUT-R SW

– 11 – CXA2013M Adjustment method Separation adjustment Procedure 1) Connect components as shown in Fig.1. (TEST = 0) 2) Set the encoder to MONO mode, and input 110mVrms (1kHz 100% modulation) to MPX IN (Pin 5). 3) Set the encoder to stereo mode, and input only left channel signal (1kHz 100% modulation) to MPX IN (Pin 5). 4) Monitor the oscilloscope and AC voltmeter and adjust A TT so that the R-ch is at a minimum. (Separation standard: more than 35dB) Fig. 1 MPX IN TV OUT -LTV OUT -R LR CH1 CH2 15kHz LPF EIAJ sound multiplexing encoder OscilloscopeApplication circuit Switch AC Voltmeter

– 12 – CXA2013M Register Specification Slave address SLAVE RECEIVER 84H SLAVE TRANSMITTER 85H Register table Status resigter Note) When the IC is powered on, the registers "MUTE TV", "MUTE LS" and "VOL" are set to "0". SUB ADDRESS MSB LSB DATA ∗∗∗∗0000 ∗∗∗∗0001 ∗∗∗∗0010 ∗∗∗∗0011 ∗∗∗∗0100 ∗∗∗∗0101 FOMO S1 S0 BASS (5) TREBLE (5) MUTE TV MUTE LSEXT TEST VOL (8) A TT (7) BAL (6) ∗: Don't care STA1 BIT7 PON STA2 BIT6 ST STA3 BIT5 BIL STA4 BIT4 STA5 BIT3 STA6 BIT2 STA7 BIT1 STA8 BIT0 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0

– 13 – CXA2013M Description of registers Control registers ∗ Classification U: User control A: Adjustment T: T est (when IC manufactured) TEST AT T EXT FOMO MUTE TV MUTE LS BASS TREBLE VOL BAL Status Registers PON ST BIL RegisterNumber of bits Register T A U U U U U U U U U U DAC test mode for VCA, checking Cue BPF mode. 1: TEST Adjustment of stereo separation Selection of TV mode or external input mode for LSOUT output1: External Selection of forced MONO mode ON/OFF 1: Forced MONO Selection of TV OUT , LS OUT output signal Selection of TV OUT , LS OUT output signal Selection of TV OUT mute ON/OFF 0: Mute ON, 1: Mute OFF Selection of LS OUT mute ON/OFF 0: Mute ON, 1: Mute OFF LS OUT output bass control LS OUT output treble control LS OUT output signal level control LS OUT -L, R output signal level (balance) control FF POWER ON RESET detection 1: RESET Stereo detection of the MPXIN input signal 1: Stereo Bilingual detection of the MPXIN input signal 1: Bilingual Classi- fication∗ Standard setting Contents Number of bits Contens

– 14 – CXA2013M Description of Control Registers TEST (1) : DAC test mode for VCA and checking Cue BPF mode. Use only for the electrical characteristics inspection process of IC. 0 = Normal mode 1 = T est mode, the Cue signal component through Cue BPF to TV OUT -L. Output DAC voltage for VCA to TV OUT -R. A TT (7) : Perform the separation adjustment by varying the signal level input to MPX IN (Pin 5). Variable range of the input signal: Normal input level ±3.0dB 0 = Level Min. 34 = Center 7F = Level Max. EXT (1) : Select TV mode or external input mode for LS OUT output 0 = TV mode 1 = External input mode FOMO (1) : Select ON/OFF forced MONO mode 0 = Forced MONO OFF 1 = Forced MONO ON S1 (1) : Select output signal for TV OUT , LS OUT S0 (1) : Select output signal for TV OUT , LS OUT MUTE TV (1) : Mute TV OUT output 0 = Mute ON 1 = Mute OFF MUTE LS (1) : Mute LS OUT output 0 = Mute ON 1 = Mute OFF BASS (5) : LS OUT output bass control 0 = Bass Min. 10 = Bass Center (0dB) 1F = Bass Max. TREBLE (5) : LS OUT output treble contorl 0 = T reble Min. 10 = T reble Center (0dB) 1F = T reble Max. VOL (8) : LS OUT output signal level control 0 = Volume Min. (–90dB T yp.) FF = Volume Max. (0dB) BAL (6) : LS OUT -L, R output signal level (balance) control 0 = Lch Min., Rch Max. 20 = Center (Lch 0dB, Rch 0dB) 3F = Lch Max., Rch Min.

– 15 – CXA2013M TV OUT/LS OUT output mode control table (TEST = 0 normal mode) EXT TV mode External mode TV OUT L LS OUT RLR TV mode Lch TV mode Lch TV mode Rch TV mode Rch TV mode Lch EXT Lch TV mode Rch EXT Rch LS OUT output mode control table (TEST = 0 normal mode, EXT = 0 TV mode) ST BIL FOMO S1 S0 MUTE LS LR MUTE MAIN MUTE L + R L L L MUTE MAIN SUB MAIN MUTE MAIN MUTE L + R R R R MUTE MAIN SUB SUB ∗: Don't care Description of Mode Control TV OUT output mode control table (TEST = 0 normal mode) ∗: Don't care ST BIL FOMO S1 S0 MUTE TV LR MUTE MAIN MUTE L + R L L L MUTE MAIN SUB MAIN MUTE MAIN MUTE L + R R R R MUTE MAIN SUB SUB Input signal Mode detection Mode control TV OUT output MONO Bilingual Stereo Input signal Mode detection Mode control LS OUT output MONO Bilingual Stereo

– 16 – CXA2013M Description of Operation The sound mutiplexing signal input from Pin 5 is passed through IN AMP and is applied to the Cue BPF , Sub BPF , and Main de-emphasis circuit. 1. Discrimination circuits Cue BPF passes only the Cue signal component from the multiplex signal. In the AM demodulator, the signal (AM wave) is AM detected and one of two sine waves is generated, either a 922.5Hz signal for bilingual broadcasts or a 982.5Hz signal for stereo broadcasts. In the 952Hz BPF , the 3.5fH carrier component is eliminated from the Cue signal after AM wave detection. The Cue signal, from which the carrier component has been eliminated, is waveform shaped by COMP , with the resulting 922.5Hz or 982.5Hz pulse being applied to the Logic section. In the 3.5f H VCO, a 3.5fH pulse locked onto the Cue signal carrier (3.5fH ) is created and sent to the Logic section. In the Logic section, the broadcast mode is identified using the countdown method. Depending on this result as well as the presence of a SUB signal from SUB detector and the MUTE ON/OFF , MODE switching, and FOMO ON/OFF instructions from CONT , the output switching control signal is created. This signal is used to control the output condition of OUTPUT SW and MAIN OUT . 2. Main circuits In MAIN DEEM, de-emphasis is applied to the Main signal component and the Sub and Cue components are removed. After passing through the MAIN DEEM, the Main signal is applied to MA TRIX, OUTPUT AMP , and MAINOUT . 3. Sub circuits In SUB BPF , only the SUB signal component out of multiplex signals is passed through. In the 4.5f H trap, the digital facsimile signal component is removed. In FM Demod, the SUB signal is FM demodulated. In SUB DEEM, the FM demodulated Sub signal is de-emphasized and the carrier component is removed. After passing through SUB DEEM, the Sub signal is applied to MA TRIX and OUTPUT AMP . 4. MA TRIX and output circuits In MA TRIX, the L and R signals are created by adding and subtracting the Main signal from MAIN DEEM and the Sub signal from SUB DEEM in stereo broadcast. In OUTPUT AMP and OUTPUT SW, the output signal is switched under the control of Logic. In addition, MAIN OUT always outputs the MAIN signal component, regardless of the broadcast mode. 5. TONE circuit Control BASS and TREBLE. Bass and TREBLE characteristics are decided by each C L and CH external capacitance. 6. BALANCE, VOLUME curcuit Control BALANCE and VOLUME. BALANCE has 64steps and VOLUME has 256 steps. 7. DAC DAC is the circuit that control BASS, TREBLE, VOLUME and BALANCE. Internal impedance is approximately 20kΩ (approximately 5kΩ for VOLUME). Connect the external capacitance for LPF to each pins.

– 17 – CXA2013M Application Circuit C17 10µ C18 10µ C20 C21 C19 10µ C16 10µ C15 0.1µ DGND C14 0.1µ C13 4700p C12 4700p C11 10µ C10 10µ 10µ 10µ 10µ 4.7µ 4.7µ 4.7µ 4.7µ 10µ Vcc 100µ 1 2 3 4 5 6 7 8 11 12 13 14 15 30 29 28 27 26 23 20 19 18 17 16 SC OUT NC SC IN MC OUT MC IN TV OUT-L TV OUT-R NC AUX-L AUX-R CL-R CL-L CH-R CH-L LS OUT-L SUBI GND REFL Vcc MPX IN CUBI NC SDA SCL DGND BAL TRE BASS VOL LS OUT-R 109 220 220 Composite baseband signal input 2425 22 21 LSOUT output External inputTVOUT output µ-com Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

– 18 – CXA2013M I2C Bus Block Items (SDA, SCL) I2C bus load conditions: Pull-up resistor 4kΩ (Connect to +5V) Load capacitor 200pF (Connect to GND) I2C Bus Control Signal No. Item High level input voltage Low level input voltage High level input current Low level input current Low level output voltage SDA (Pin 8) during 3mA inflow Maximum inflow current Input capacitance Maximum clock frequency Minimum waiting time for data change Minimum waiting time for start of data transfer Low level clock pulse width High level clock pulse width Minimum waiting time for start preparation Minimum data hold time Minimum data preparation time Rise time Fall time Minimum waiting time for stop preparation Symbol VIH VIL IIH IIL VOL IOL C I fSCL tBUF tHD :ST A tLOW tHIGH tSU :ST A tHD :DA T tSU :DA T tR tF tSU :STO 3.0 4.7 4.0 4.7 4.0 4.7 250 4.7 Min. Ty p. 5.0 1.5 0.4 100 300 Max. V µA V mA pF kHz µs ns µs ns µs Unit SDA SCL tBUF P S tHD :STA tLOW tHD :DAT tHIGH tR tF tHD :STA tSU :STASr tSU :STO PtSU :DAT

– 19 – CXA2013M I2C Bus Signal There are I2C signals, SDA (Serial DA T A) and SCL (Serial CLOCK) signals. SDA is a bidirectional signal.  Accordingly there are 3 values outputs, H, L, and Hi-Z.  I2C transfer begins with Start Condition and ends with STOP condition. H L Hi-Z L SDA SCL Start Condition S Stop Condition P

– 20 – CXA2013M  I2C data write (Write from I2C controller to the IC) ∗ Data can be transferred in 8-bit units to be set as required. Sub address is incremented automatically.  I2C data read (Read from the IC to I2C controller)  Read timing ∗ Data Read is performed during SCL rise. S Address 12 34567891 89 SDA SCL MSB L during Write MSB LSB Hi-Z Hi-Z ACK Sub Address ACK ACKACKDATA DATA P 891 89 Hi-Z Hi-Z DATA (n) DATA (n + 1)ACK 18 9 1 8 9 ACK DATA (n + 2) Hi-Z Hi-Z LSBMSB S Address 16 7 8 9 1 8 9SCL ACK DATA ACK SDA H during Read Hi-Z P DATA 12 3456789 9 IC output SDA SCL MSB LSB ACK ACKRead timing

– 21 – CXA2013M Example of Representative Characteristics 3.5fH –40k –60 –40 –20 3.5fH –20k 3.5fH 3.5fH +20k 3.5fH +40k Distortion [%] 100 200 300 400 500 100 1k 10k –15 –10 –60 –40 –20 20 30 40 50 60 70 80 100 90 40 80 C0 FF –80 –70 –60 –50 –40 –30 –20 –10 10 20 30 3F –80 –70 –60 –50 –40 –30 –20 –10 OUT R OUT L Cue BPF frequency characteristics Attenuation level [dB] Frequency [Hz] MAIN distortion characteristics MAIN modulation factor [%] De-emphasis characteristics Output level [dB] Frequency [Hz] SUB BPF frequency characteristics Output level [dB] Frequency [kHz] VOL CONTROL characteristics BUS data [VOL] LS OUT -L, R [dB] BALANCE CONTROL characteristics BUS data [BALANCE] LS OUT -L, R [dB] Main Sub

– 22 – CXA2013M 100 1k 10k –20 –10 BASS-TREBLE MAX. BASS-TREBLE MIN. TONE characteristics LS OUT -L, R [dB] Frequency [Hz]

– 23 – CXA2013M 0.45 ± 0.1 1.27 7.6 – 0.1+ 0.3 10.3 ± 0.4 1630 18.8 – 0.1 + 0.4 0.2 M 0.1 0.2 – 0.05 + 0.1 0.5 ± 0.2 0.1 – 0.05 A(9.3) 2.3 – 0.15 + 0.4 30PIN SOP (PLASTIC) SONY CODE EIAJ CODE JEDEC CODE SOP-30P-L03 SOP030-P-0375 PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY PACKAGE STRUCTURE 0.7g 0˚ to 10˚ + 0.2 DETAIL A Sony Corporation Package Outline Unit: mm LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL COPPER ALLOY SOLDER COMPOSITION Sn-Bi Bi:1-4wt% PLATING THICKNESS 5-18µm SPEC.