CTLDM8120-M621H_15 CENTRAL | Alldatasheet

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Technical content

DESCRIPTION: The CENTRAL SEMICONDUCTOR CTLDM8120-M621H is a very low profile (0.4mm) P-Channel enhancement-mode MOSFET in a small, thermally efficient, 1.5mm x 2mm TLM™ package. MARKING CODE: CNF FEATURES:

  • Low rDS(ON) (0.24Ω MAX @ VDS=1.8V)
  • High Current (ID=0.95A)
  • Logic Level Compatible
  • Small, 1.5 x 2.0 x 0.4mm Ultra Low Height Profile TLM APPLICATIONS:
  • Load / Power Switches
  • Power Supply Converter Circuits
  • Battery Powered Portable Equipment MAXIMUM RATINGS: (TA=25°C) SYMBOL UNITS Drain-Source Voltage V DS 20 V Gate-Source Voltage V GS 8.0 V Continuous Drain Current (Steady State) I D 860 mA Continuous Drain Current, t≤5.0s I D 950 mA Continuous Source Current (Body Diode) I S 360 mA Maximum Pulsed Drain Current, tp=10μs I DM 4.0 A Maximum Pulsed Source Current, tp=10μs I SM 4.0 A Power Dissipation (Note 1) P D 1.6 W Operating and Storage Junction Temperature T J, Tstg -65 to +150 °C Thermal Resistance (Note 1) ΘJA 75 °C/W ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP MAX UNITS IGSSF, IGSSR V GS=8.0V, VDS=0 1.0 50 nA IDSS V DS=20V, VGS=0 5.0 500 nA BVDSS V GS=0, ID=250μA 20 24 V VGS(th) VDS=VGS, ID=250μA 0.45 0.76 1.0 V VSD VGS=0, IS=360mA 0.9 V rDS(ON) V GS=4.5V, ID=0.95A 85 150 mΩ rDS(ON) V GS=4.5V, ID=0.77A 85 142 mΩ rDS(ON) V GS=2.5V, ID=0.67A 130 200 mΩ rDS(ON) V GS=1.8V, ID=0.2A 190 240 mΩ Qg(tot) V DS=10V, VGS=4.5V, ID=1.0A 3.56 nC Qgs V DS=10V, VGS=4.5V, ID=1.0A 0.36 nC Qgd V DS=10V, VGS=4.5V, ID=1.0A 1.52 nC Notes: (1) Mounted on a 4-layer JEDEC test board with one thermal vias connecting the exposed thermal pad to the first buried plane. PCB was constructed as per JEDEC standards JESD51-5 and JESD51-7. TLM621H CASE R2 (2-August 2011) www.centralsemi.com
  • Device is Halogen Free by design

ELECTRICAL CHARACTERISTICS - Continued: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP MAX UNITS gFS V DS=10V, ID=810mA 2.0 S Crss V DS=16V, VGS=0, f=1.0MHz 80 pF Ciss V DS=16V, VGS=0, f=1.0MHz 200 pF Coss VDS=16V, VGS=0, f=1.0MHz 60 pF ton VDD=10V, VGS=4.5V, ID=950mA, RG=6.0Ω 20 ns toff VDD=10V, VGS=4.5V, ID=950mA, RG=6.0Ω 25 ns TLM621H CASE - MECHANICAL OUTLINE LEAD CODE: 1) Source 2) Drain 3) Drain 4) Drain 5) Drain 6) Gate MARKING CODE: CNF PIN CONFIGURATION For standard mounting refer to TLM621H Package Details *Exposed pad P internally connected to pins 2, 3, 4, and 5. OPTIONAL MOUNTING PADS (Dimensions in mm) www.centralsemi.com R2 (2-August 2011)