CPC7581 CLARE | Alldatasheet
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Technical content
1www.clare.com CPC7581 DS-CPC7581-R2 The CPC7581 is a monolithic solid state switch in a 16 pin surface mount SOIC package. It provides the necessary functions to replace a 2-Form-C electromechanical relay on analog line cards found in Central Office, Access and PBX equipment. The device contains solid state switches for tip and ring line break and ring injection/ring return. The CPC7581 requires only a +5V supply and offers “break-before-make” or “make-before-break” switch oper- ation using simple logic level input control. There are two versions of the CPC7581, the CPC7581BA and the CPC7581BB. The “BA” version has a protection SCR which provides protection to the SLIC device and subse- quent circuitry during fault conditions.
- Central office (CO)
- Digital Loop Carrier (DLC)
- PBX Systems
- Digitally Added Main Line (DAML)
- Hybrid Fiber Coax (HFC)
- Fiber in the Loop (FITL)
- Pair Gain System
- Channel Banks
- Small 16 pin surface mount SOIC package
- Monolithic IC reliability
- Low matched RDS ON
- Eliminates the need for zero cross switching
- Flexible switch timing to transition from ringing mode to idle/talk mode
- Clean, bounce free switching
- Tertiary Protection consisting of integrated current limiting, thermal shutdown and SLIC protection
- 5V operation with power consumption <10mW
- Intelligent battery monitor
- Latched logic level inputs, no drive circuitry
- Pin to pin compatible to the Lucent 7581 family
Applications
Ordering Information
Part # Description CPC7581BA 4 Pole with protection SCR CPC7581BB 4 Pole without protection SCR CPC7581BA-TR Tape & Reel Version CPC7581BB-TR Tape & Reel Version Block Diagram R2Ring TIP Secondary Protection SW1 Break SW2 Break SW3 Ringing Return SW4 Ringing Access SCR and Trip Circuit TBAT RBAT SLIC Ring Generator VBAT Reference (16) CPC7581BA Battery+ RLINE TLINE RRING (12) (14) (3) TRING (6) (2) (15)
Absolute Maximum Ratings are stress ratings. the device and effect its reliability. and are the result of engineering evaluations. Typical values are provided for information purposes only. 1 VBAT is used only as a reference for internal protection circuitry. If VBAT rises above -10V, the device will enter an all off state and will remain in the all off state until the battery voltage drops b elow -15V. Table 1. Break Switch, SW1 and SW2 secondary protection in place. 1 Applied voltage is 100 Vp-p square wave at 100Hz.
Table 3. Ringing Access Switch, SW4 Table 2. Ring Return Switch, SW3 secondary protection in place.
Table 4. Additional Electrical Characteristics 1 Temperature shutdown flag (TSD) will be high during normal operation and low during temperature shutdown state.
Table 5. Make-Before-Break Operation (Ringing to Idle/Talk Transition) Table 6. Break-Before-Make Operation (Ringing to Idle/Talk Transition)
Table 8. Truth Table 1 Thermal shutdown mechanism is active with TSD floating or equal to 5V and cannot be disabled. 2 Forcing TSD to ground overrides the logic input pins and forces an all off state. Table 7. Electrical Specifications, Protection Circuitry
- Passes GR1089 & ITU-T K.20 with appropriate secondary protection in place.
www.clare.com 7Rev. 2 Package Pinout * Only the CPC7581BA contains the protection SCR. CPC7581 T BAT SW3 SW1 SW4 SW2 Temperature Shutdown FGND TLINE TRING VDD TSD DGND VBAT RBAT RLINE RRING LATCH INPUT NC NC NC SCR and TRIP CKT Pin Name Function 1F GND Fault ground 2T BAT Connect to TIP on SLIC side 3T LINE Connect to TIP on line side
4 NC No Connect
5 NC No Connect
6T RING Connect to return ground for ringing generator 7V DD + 5V Supply 8 TSD Temperature shutdown pin. Can be used as a logic level input or output. See Tables 5, 6 and 8 for more details. As an output, will read +5V when device is in its operational mode and 0V in the thermal shutdown mode. 9D GND Digital Ground
10 INPUT Logic level input switch control
11 LATCH Data latch control, active high,
12 R RING Connect to ringing generator
13 NC No Connect
14 R LINE Connect to RING on line side
15 R BAT Connect to RING on SLIC side
16 V BAT Battery voltage. Reference for protection circuit
www.clare.com8 CPC7581 Rev. 2 Functional Description Introduction The CPC7581 has three states:
- Idle/talk state (line break switches SW1, and SW2 closed, ringing switches SW3, SW4 open)
- Ringing state (line break switches SW1, and SW2 open, ringing switches SW3, SW4 closed)
- All Off state (line break switches SW1, and SW2 open, ringing switches SW3, SW4 open) The CPC7581 offers break-before-make and make- before-break switching with simple logic level input con- trol. Solid state switch construction means no impulse noise is generated when switching during ring cadence or ring trip, thus eliminating the need for external “zero cross” switching circuitry. State control is via logic level input so no additional driver circuitry is required. The line break switches SW1 and SW2 are linear switches that have exceptionally low RDSON and excellent matching characteristics. The ringing access switch SW4 has a breakdown voltage rating of >480V which is sufficiently high, with proper protection, to prevent breakdown in the presence of a transient fault condition. Integrated into the CPC7581 is a diode bridge/SCR clamping circuit, current limiting and thermal shutdown mechanism to provide protection to the SLIC device during a fault condition. Positive and negative surges are reduced by the current limiting circuitry and steered to ground via diodes and the integrated SCR. Power cross transients are also reduced by the current limiting and thermal shutdown circuits. Please note that only the CPC7581BA has the integrated protection SCR. To protect the CPC7581 from an overvoltage fault con- dition, use of a secondary protector is required. The secondary protector must limit the voltage seen at the tip and ring terminals to a level below the max break- down voltage of the switches. To minimize the stress on the solid-state contacts, use of a foldback or crowbar type secondary protector is recommended. With proper selection of the secondary protector, a line card using the CPC7581 will meet all relevant ITU, LSSGR, FCC or UL protection requirements. The CPC7581 operates from a +5V supply only. This gives the device extremely low idle and active power dis- sipation and allows use with virtually any range of battery voltage. A battery voltage is also used by the CPC7581 as a reference for the integrated protection circuit. In the event of a loss of battery voltage, the CPC7581 will enter an “all off” state. Switch Timing The CPC7581 provides, when switching from the ringing state to the idle/talk state, the ability to control the timing when the ringing access switches SW3 and SW4 are released relative to the state of the line break switches SW1 and SW2 using simple logic level input. This is referred to a “make before break” or “break before make” operation. When the line break switch contacts (SW1, SW2) are closed (or made) before the ringing access switch contact (SW3, SW4) is opened (or broken), this is referred to a “make-before-break” operation. “Break- before-make” operation occurs when the ringing access contact (SW3, SW4) is opened (broken) before the line break switch contacts (SW1, SW2) are closed (made). With the CPC7581 the “make before break” and “break before make” operations can easily be selected by apply- ing logic level inputs to pin 10 of the device. The logic sequences for either mode of operation are given in Tables 5 and 6. Logic states and explanations are given in Table 8. Ring Access Switch Zero Cross Current Turn Off After the application of a logic input to turn SW4 off, the ring access switch is designed to delay the change in state until the next zero crossing. Once on, the switch requires a zero current cross to turn off and therefore should not be used to switch a pure DC signal. The switch will remain in the on state no matter what logic input until the next zero crossing. For proper operation, pin 12 (R Ring) should be connected using proper imped- ance to a ring generator or other AC source. These switching characteristics will reduce and possibly elimi- nate overall system impulse noise normally associated with ringing access switches. The attributes of ringing access switch SW4 may make it possible to eliminate the need for a zero cross switching scheme. A minimum impedance of 300Ω in series with the ring generator is recommended. Power Supplies Both a +5V supply and battery voltage are connected to the CPC7581. CPC7581 switch state control is pow- ered exclusively by the +5V supply. As a result, the CPC7581 exhibits extremely low power dissipation dur- ing both active and idle states. The battery voltage is not used for switch control but rather as a reference by the integrated secondary pro- tection circuitry. The integrated SCR is designed to trig- ger when pin 2 (T BAT) or pin 15 (R BAT) drops 2 to 4V below the battery. This trigger prevents a fault induced overvoltage event at the T BAT or RBAT nodes.
www.clare.com 9Rev. 2 Battery Voltage Monitor The CPC7581 also uses the voltage reference to moni- tor battery voltage. If battery voltage is lost, the CPC7581 will immediately enter the “all off” state and remain in this state until the battery voltage is restored. The device will also enter the “all off” state if the battery voltage rises above –10V and will remain there until the battery volt- age drops below –15V. This battery monitor feature draws a small current from the battery (< 1µA typ.) and will add slightly to the device’s overall power dissipation. Protection Diode Bridge/SCR The CPC7581 uses a combination of current limited break switches, a diode bridge/SCR clamping circuit and a thermal shutdown mechanism to protect the SLIC device or other associated circuitry from damage during line transient events such as lightning. During a positive transient condition, the fault current is conducted through the diode bridge and to ground. Voltage is clamped to the diode drop above ground. During a neg- ative transient of two to four volts more negative than the battery, the SCR conducts and faults are shunted to ground via the SCR and diode bridge. Also, in order for the SCR to crowbar or foldback, the on voltage (see Table 7) of the SCR must be less negative than the battery reference voltage. If the battery voltage is less negative the SCR on voltage, the SCR will not crowbar, however it will conduct fault currents to ground. For power induction or power cross fault conditions, the positive cycle of the transient is clamped to the diode drop above ground and the fault current directed to ground. The negative cycle of the transient will cause the SCR to conduct when the voltage exceeds the bat- tery reference voltage by two to four volts, steering the current to ground. Current Limiting function If a lightning strike transient occurs when the device in the talk/idle state, the current is passed along the line to the integrated protection circuitry and limited by the dynamic current limit response of break switches SW1 and SW2. When a 1000V 10x1000 pulse (LSSGR light- ning) is applied to the line though a properly clamped external protector, the current seen at pins 2 (T BAT) and pin 15 (R BAT) will be a pulse with a typical magnitude and duration of 2.5A and < 0.5ms. If a power cross fault occurs with device in the talk/idle state, the current is passed though the break switches SW1 and SW2 on to the integrated protection circuit and is limited by the dynamic DC current limit response of the two break switches. The DC current limit, specified over temperature, is between 80mA and 425mA and the circuitry has a negative temperature coefficient. As a result, if the device is subjected to extended heating due to power cross fault, the measured current at pin 2 (T BAT) and pin 15 (RBAT) will decrease as the device tempera- ture increases. If the device temperature rises sufficient- ly, the temperature shutdown mechanism will activate and the device will default to the “all off” state. T emperature Shutdown The thermal shutdown mechanism will activate when the device temperature reaches a minimum of 110 °C placing the device in the “all off” state regardless of logic input. During this thermal shutdown mode, pin 8 (TSD) will read 0V. Normal output of TSD is +V DD If presented with a short duration transient such as a lightning event, the thermal shutdown feature will not typically activate. But in an extended power cross tran- sient, the device temperature will rise and the thermal shutdown will activate forcing the switches to an “all off” state. At this point the current measured at pin 2 (T BAT) and pin 15 (R BAT) will drop to zero. Once the device enters thermal shutdown it will remain in the “all off” state until the temperature of the device drops below the activation level of the thermal shutdown circuit. This will return the device to the state prior to thermal shut- down. If the transient has not passed, current will flow at the value allowed by the dynamic DC current limiting of the switches and heating will begin again, reactivat- ing the thermal shutdown mechanism. This cycle of entering and exiting the thermal shutdown mode will continue as long as the fault condition persists. If the magnitude of the fault condition is great enough, the external secondary protector could activate and shunt all current to ground. External Protection Elements The CPC7581 requires only one overvoltage secondary protector on the loop side of the device. The integrated protection feature described above negates the need for protection on the line side. The purpose of the sec- ondary protector is to limit voltage transients to levels that do not exceed the breakdown voltage or input-out- put isolation barrier of the CPC7581. A foldback or crowbar type protector is recommended to minimize stresses on the device. Consult Clare ’s application note, AN-100, “Designing Surge and Power Fault Protection Circuits for Solid State Subscriber Line Interfaces” for equations related to the specifications of external secondary protectors, fused resistors and PTCs.
www.clare.com10 CPC7581 Rev. 2 Data Latch The CPC7581 has an integrated data latch. The latch operation is controlled by logic level input pin 11 (LATCH). The data input of the latch is pin 10 (INPUT) and of the device while the output of the data latch is an internal node used for state control. When LATCH con- trol pin is at logic 0, the data latch is transparent and data control signals flow directly through to state control. A change in input will be reflected in a change is switch state. When LATCH control pin is at logic 1, the data latch is now active and a change in input control will not affect switch state. The switches will remain in the posi- tion they were in when the LATCH changed from logic 0 to logic 1 and will not respond to changes in input as long as the latch is at logic 1. In addition, TSD input is not tied to the data latch. Therefore, TSD is not affected by the LATCH input and TSD input will override state control via pin 10 (IN RING) and the LATCH.
www.clare.com 11Rev. 2 Dimensions mm (Inches) MECHANICAL DIMENSIONS 7.40 MIN / 7.60 MAX (.291 MIN / .299 MAX) 0.23 MIN / 0.32 MAX (.0091 MIN / .0125 MAX) 1.27 (.050) 2.44 MIN / 2.64 MAX (.096 MIN / .104 MAX) 0.51 MIN / 1.01 MAX (.020 MIN / .040 MAX) 10.11 MIN / 10.51 MAX (.398 MIN / .414 MAX) 0.36 MIN / 0.46 MAX (.014 MIN / .018 MAX) 10.11 MIN / 10.31 MAX (.398 MIN / .406 MAX)
16 Pin SOIC (JEDEC Package)
(Top View) 1.193 (.047) 9.728 ± .051 (.383 ± .002) .787 (.031) 1.270 (.050)
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