CPC3703 CLARE | Alldatasheet

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Technical content

Features

Description

Ordering Information

 Ignition Modules  Normally-on Switches  Solid State Relays  Converters  Telecommunications  Power Supply  Depletion mode device offers low RDS(ON) at cold temperatures  Low on resistance 4 ohms max. at 25ºC  High input impedance  High breakdown voltage 250V  Low V GS(off) voltage -1.6 to -3.9V  Small package size SOT89 The CPC3703 is an N-channel, depletion mode, field effect transistor (FET) that utilizes Clare’s proprietary third-generation vertical DMOS process. The third-generation process realizes world class, high voltage MOSFET performance in an economical silicon gate process. Our vertical DMOS process yields a robust device, with high input impedance, for use in high-power applications. The CPC3703 is a highly reliable FET device that has been used extensively in Clare’s Solid State Relays for industrial and telecommunications applications. This device excels in power applications that require low drain-source resistance, particularly in cold environments such as automotive ignition modules. The CPC3703 offers a low, 4Ω maximum, on-state resistance at 25ºC. The CPC3703 has a minimum breakdown voltage of 250V, and is available in an SOT89 package. As with all MOS devices, the FET structure prevents thermal runaway and thermal-induced secondary breakdown. (SOT89) G D S D D S G Package Pinout

www.clare.com2 CPC3703 R03 Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. Absolute Maximum Ratings

Electrical Characteristics

Drain-to-Source Voltage 250 V Gate-to-Source Voltage ±20 V T otal Package Dissipation 1 1.6 W Operational T emperature -55 to +125 ºC Storage T emperature -55 to +125 ºC 1 Mounted on 1"x1" FR4 board. Package I D (continuous) I D (pulsed) Power Dissipation @TA=25ºC θjc ºC/W IDR IDRM SOT -89 360mA 600mA 1.6W 15 360mA 600mA Thermal Characteristics Parameter Symbol Conditions Min Typ Max Units Drain-to-Source Breakdown Voltage BV DSX VGS= -5V , ID=100µA 250 - - V Gate-to-Source Off Voltage V GS(off) VDS= 15V , ID=1mA -1.6 - -3.9 V Change in VGS(off) with T emperature dV GS(off) /dT V DS= 15V , ID=1mA - - 4.5 mV/ ºC Gate Body Leakage Current I GSS VGS=±20V , VDS=0V - - 100 nA Drain-to-Source Leakage Current I D(off) VGS= -5V , VDS=Max Rating - - 1 µA VGS= -5V , VDS=200V , TA=125ºC - - 1 mA Saturated Drain-to-Source Current I DSS VGS= 0V , VDS=15V 300 - - mA Static Drain-to-Source On-State Resistance RDS(on) VGS= 0V , ID=200mA -- 4 Ω Change in RDS(on) with T emperature dR DS(on) /dT - - 1.1 %/ ºC Forward T ransconductance G FS ID= 100mA, VDS = 10V 225 - - m Input Capacitance C ISS VGS= -5V VDS= 25V f= 1MHz 327 350 pFCommon Source Output Capacitance C OSS 51 65 Reverse T ransfer Capacitance C RSS 27 35 T urn-ON Delay Time t d(on) VDD= 25V ID= 150mA VGS= 0V to -10V RGEN= 50Ω 23 35 ns Rise Time t r 82 0 T urn-OFF Delay Time t d(off) 17 25 Fall Time t f 70 80 Source-Drain Diode Voltage Drop V SD VGS= -5V , ISD=150mA - 0.6 1.8 V Ω 90% 10% 90% 90% 10%10% PULSE GENERATOR VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF) tFtr INPUT INPUT OUTPUT VDD Rgen -10V Switching Waveform & Test Circuit

www.clare.com 3R03 PERFORMANCE DATA* *The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifi cations, please contact our application department. Output Characteristics (TA=25ºC) VDS (V) ID (mA) 012345 1000 900 800 700 600 500 400 300 200 100 VGS=-1.0 VGS=-2.5 VGS=-2.0 VGS=-1.5 Transfer Characteristics (VDS=5V) VGS (V) ID (mA) 350 300 250 200 150 100 +125ºC -55ºC +25ºC VGS(OFF) & RON Vs. Temperature VGS(OFF) (V) -50 -0 50 100 150 5.5 5.0 4.5 4.0 3.5 3.0 2.5 RON V GS(OFF) VDS=10V ID=1mA VGS=0V ID=200mA RON (Ω) Temperature (ºC) Power Dissipation vs. Ambient Temperature Power Dissipation (W) 02 04 06 08 0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 100 120 140 Temperature (ºC) Transconductance vs. Drain Current (VDS=10V) ID (mA) 01 02 03 04 0 300 250 200 150 100 50 60 70 80 10090 GFS (m )Ω -55ºC +125ºC +25ºC VDS (V) ID (A) 0 10 100 1000 1.0 0.1 0.001 0.0001 Maximum Rated Safe Operating Area at 25ºC Capacitance vs. Drain Source Voltage (VGS=-5V) VDS (V) Capacitance (pF) 01 02 03 04 0 600 525 450 375 300 225 150 VRSS VOSS VISS On-Resistance vs. Drain Current (VGS=0V) ID (A) 0 0.1 0.2 0.3 0.4 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 RON (Ω)

Clare, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in Clare’s Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems in tended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of Clare’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS-CPC3703-R03 ©Copyright 2009, Clare, Inc. All rights reserved. Printed in USA. 10/13/09 For additional information please visit our website at: www.clare.com CPC3703 MECHANICAL DIMENSIONS RoHS 2002/95/EC e3Pb Manufacturing Information Soldering For proper assembly, the component must be processed in accordance with the current revision of IPC/JEDEC standard J-STD-020. Failure to follow the recommended guidelines may cause permanent damage to the device resulting in impaired performance and/or a reduced lifetime expectancy. Washing Clare does not recommend ultrasonic cleaning or the use of chlorinated solvents. 2.286 ± 2.591 (0.090 0.102) 3.937 - 4.242 (0.155 - 0.167) 1.397 - 1.600 (0.055 - 0.063) 0.356 - 0.432 (0.014 - 0.017) Dimensions mm (inches) 1.626 - 1.829 (R 0.010) 0.889 - 1.194 (0.035 - 0.047) 0.356 - 0.483 (0.014 - 0.019) 0.432 - 0.559 (0.017 - 0.022) 4.394 - 4.597 (0.173 - 0.181) 1.422 - 1.575 (0.056 - 0.062) 2.921 - 3.073 (0.115 - 0.121) 0.60 (0.024) TYP 3 1.40 (0.055) 2.70 (0.107) 1.90 (0.075) 1.90 (0.074) 45º 5.00 (0.197) 50º Top Cover Tape NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2 Tape and Reel Packaging for SOT89 Package Dimensions mm (inches) Embossment Embossed Carrier

330.2 Dia

(13.00 Dia) Top Cover Tape Thickness

0.102 Max

(0.004 Max) K0=1.90 ± 0.10 (0.075 ± 0.004) P=8.00 ± 0.10 (0.315 ± 0.004) A0=4.91 ± 0.10 (0.193 ± 0.004) B0=4.52 ± 0.10 (0.178 ± 0.004) W=12.00 ± 0.30 (0.472 ± 0.012)