CP350-CZDM8502N CENTRAL | Alldatasheet

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MECHANICAL SPECIFICATIONS: Die Size 108 x 82 MILS Die Thickness 11.8 MILS Gate Bonding Pad Size 13.8 x 18.9 MILS Source Bonding Pad Size 47.2 x 47.2 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Ag - 8,000Å Scribe Alley Width 3.15 MILS Wafer Diameter 6 INCHES Gross Die Per Wafer 2,564 R0 (27-August 2018) The CP350-CZDM8502N N-Channel MOSFET is designed for LED lighting and switching mode power supplies. FEATURES:  VDS=850V @ ID=2.0A  RDS(ON)=6.3Ω (MAX)  Qg(tot)=9.7nC (TYP) APPLICATIONS:  LED lighting  Switch-mode power supplies  Power factor corrections MAXIMUM RATINGS: (TA=25°C) SYMBOL UNITS Drain-Source Voltage V DS 850 V Gate-Source Voltage V GS 30 V Continuous Drain Current (Steady State) I D 2.0 A Continuous Drain Current (Steady State, TA=100°C) I D 1.2 A Maximum Pulsed Drain Current I DM 8.0 A Single Pulse Avalance Energy (Note 1) E AS 180 mJ Operating and Storage Junction Temperature T J, Tstg -55 to +150 °C Note 1: L=30mH, IS=3.3A, VDD=100V, RG=25Ω, Starting TJ=25°C ELECTRICAL CHARACTERISTICS - MOSFET: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP MAX UNITS IGSSF, IGSSR V GS=30V, VDS=0 100 nA IDSS V DS=850V, VGS=0 1.0 μA BVDSS V GS=0, ID=250μA 850 V VGS(th) VGS=VDS, ID=250μA 2.0 4.0 V rDS(ON) V GS=10V, ID=1.0A 6.3 Ω Crss V DS=25V, VGS=0, f=1.0MHz 1.6 pF Ciss V DS=25V, VGS=0, f=1.0MHz 383 pF Coss VDS=25V, VGS=0, f=1.0MHz 39 pF www.centralsemi. com

ELECTRICAL CHARACTERISTICS - MOSFET - Continued: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS TYP MAX UNITS Qg(tot) VDS=400V, VGS=10V, ID=2.0A (Note 2) 9.7 nC Qgs VDS=400V, VGS=10V, ID=2.0A (Note 2) 2.3 nC Qgd VDS=400V, VGS=10V, ID=2.0A (Note 2) 4.6 nC td(on) V DD=400V, VGS=10V, ID=2.0A, RG=25Ω (Note 2) 13 ns tr VDD=400V, VGS=10V, ID=2.0A, RG=25Ω (Note 2) 23 ns td(off) VDD=400V, VGS=10V, ID=2.0A, RG=25Ω (Note 2) 26 ns tf V DD=400V, VGS=10V, ID=2.0A, RG=25Ω (Note 2) 27 ns Note 2: Pulse Width < 300μs, Duty Cycle < 2% ELECTRICAL CHARACTERISTICS - Body Diode: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS TYP MAX UNITS VSD V GS=0, IS=2.0A 1.4 V trr VGS=0, IS=2.0A, di/dt=100A/μs 361 ns Qrr VGS=0, IS=2.0A, di/dt=100A/μs 1.2 μC R0 (27-August 2018) CP350-CZDM8502N N-Channel MOSFET Die Enhancement-Mode www.centralsemi. com

WN: Full wafer, unsawn, 100% tested with reject die inked. (example: CP211-PART NUMBER-WN) SAWN WAFER ON PLASTIC RING WR: Full wafer, sawn and mounted on plastic ring, 100% tested with reject die inked. (example: CP211-PART NUMBER-WR) Please note: Sawn Wafer on Metal Frame (WS) is possible as a special order. Please contact your Central Sales Representative at 631-435-1110. Visit the Central website for a complete listing of specifications: www.centralsemi.com/bdspecs BARE DIE IN TRAY (WAFFLE) PACK CT: Singulated die in tray (waffle) pack. (example: CP211-PART NUMBER-CT) CM: Singulated die in tray (waffle) pack 100% visually inspected as per MIL-STD-750, (method 2072 transistors, method 2073 diodes). (example: CP211-PART NUMBER-CM) R2 (3-April 2017) www.centralsemi.com

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