CLM7660 CALOGIC | Alldatasheet

Document overview

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Technical content

FEATURES

  • • Converts +5V Logic Supply to ±5 System
  • • RS232 Negative Power Supply
  • • Low Cost, Simple to Use

APPLICATIONS

  • • A-to-D Converters
  • • D-to-A Converters
  • • Multiplexers
  • • Operational Amplifiers

DESCRIPTION

Calogic CLM7660 DC-to-DC converter will generate a negative voltage from a positive source. The CLM7660 generates -5V in +5V digital systems and with two external capacitors, the device will convert a 1.5V to 10V input signal to a -1.5V to -10V level. Applications include analog-to-digital converters, digital-to-analog converters, operational amplifiers and multiplexers. Many of these systems require negative supply voltages. The CLM7660 allows +5V digital logic systems to incorporate these analog components without an additional main power source. Lower part count, less real estate, ease of use are just a few of the benefits of the CLM7660.

ORDERING INFORMATION

CLM7660CP 8 Pin DIP -40 oC to +85oC CLM7660DY 8 Pin SOIC -40 oC to +85oC CORPORATION CALOGIC CORPORATION, 237 Whitney Place, Fremont, California 94539, Telephone: 510-656-2900, FAX: 510-651-3025 PIN CONFIGURATION AND BLOCK DIAGRAM 1B-35 RC OSCILLATOR ÷2 VOLTAGE- LEVEL TRANSLATOR INTERNAL VOLTAGE REGULATOR LOGIC NETWORK LV OSC GND CAP VOUT CAP +V + LOW VOLTAGE (LV) 1K-17 NC 1 OSC V GND VOUT NC = NO INTERNAL CONNECTION CAP + CAP – CLM7660

++0.3V) for V+ <5.5V (V+-5.5V) to (V++0.3V) for V+ <5.5V Power Dissipation (Note 2) Operating T emperature Range oC to +85oC Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CLM7660 CALOGIC CORPORATION, 237 Whitney Place, Fremont, California 94539, Telephone: 510-656-2900, FAX: 510-651-3025 CORPORATION ELECTRICAL CHARACTERISTICS V+ = 5V, TA = +25oC, COSC = 0, Test Circuit (Figure 1), unless otherwise indicated. SYMBOL PARAMETER MIN TYP MAX UNIT TEST CONDITIONS I+ Supply Current - 80 180 µAR L = ∞ V+H1 Supply Voltage Range, High 3 - 6.5 V 0 oC ≤ TA ≤ +70oC, RL = 10kΩ , LV Open 3 - 5 V -55 oC ≤ TA ≤ +125oC, 10kΩ , LV Open V+L1 Supply Voltage Range, Low (DX Out of Circuit) 1.5 - 3.5 V Min ≤ TA ≤ Max, RL = 10kΩ , LV to GND V+H2 Supply Voltage Range, High (DX In Circuit) 3 - 10 V Min ≤ TA ≤ Max, RL = 10kΩ , LV Open V+L2 Supply Voltage Range, Low (DX In Circuit) 1.5 - 3.5 V Min ≤ TA ≤ Max, RL = 10kΩ , LV to GND R OUT Output Source Resistance - 55 100 Ω IOUT = 20mA, TA = 25oC -- 1 2 0 Ω IOUT = 20mA, 0oC ≤ TA ≤ +70oC (C Device) -- 3 0 0 Ω V+ = 2V, IOUT = 3mA, LV to GND 0oC ≤ TA ≤ +70oC fOSC Oscillator Frequency - 10 - kHz PEF Power Efficiency 95 98 - % R L = 5kΩ VOUT EF Voltage Conversion Efficiency 97 99.9 - % R L = ∞ ZOSC Oscillator Impedance - 1 - M Ω V+ = 2V -1 0 0- k Ω V+ = 5V NOTES: 1. Connecting any input terminal to voltages greater than C+ or less than GND may cause destructive latch-up. It is recommended that no inputs from sources operating from external supplies be applied prior to "power up" of the CLM7660. 2. Derate linearly above 50oC by 5.5mW/oC.

The CLM7660 is an excellent voltage doubler, the device has all the characteristic with the exception of two inexpensive 10µF polarized electrolytic external capacitors. Figure 3 demonstrates the most effective means of using the device as a voltage doubler. Capacitor C 1 is charged to a voltage, V+, for the half cycle when switches S1 and S3 are closed. (Note Switches S2 and S4 are open during this half cycle.) During the second half of the operation, switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 negatively by V+ volts. Charge is then transferred from C1 to C 2, such that voltage on C2 is exactly V+, asumming ideal switches and no load on C2. The four switches in Figure 3 are MOS power switches, S1 is a P-Channel device, S2, S3 and S4 are N-Channel devices. The major challenge with this approach while integrating the switches, the substrates of S3 and S4 must always remain reversed-biased with respect to their sources, but not so much as to degrade their ON-resistances. In addition, at circuit start-up, and under short circuit conditions (VOUT =V+), the output voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this will result in high power losses and probable device latch-up. The above problem is eliminated in the CLM7660 by a logic network which senses the output voltage (VOUT ) together with the level translators, and switches the substrates of S3 and S4 to the correct level to maintain necessary reverse bias. The voltage regulator portion of the CLM7660 is an integral part of the anti-latch-up circuitry. Its inherent voltage drop can degrade operation at low voltages. To improve low-voltage operation, the LV pin should be connected to GND, disabling the regulator. For supply voltages greater than 3.5V, the LV terminal must be left open to ensure latch-up proof operation and prevent device damage. THEORETICAL POWER EFFICI ENCY CONSIDERATIONS In theory, a voltage multiplier can approach 100% efficiency if certain conditions are met: 1. The drive circuitry consumes minimal power. 2. The output switches have extremely low ON-resistance and virtually no offset. 3. The impedances of the pump and reservoir capacitors are negligible at the pump frequency. When larger values of C 1 and C2 are used, the CLM7660 approaches the above conditions for negative voltage multiplication. Energy is lost only if the transfer of the charge between capacitors if a change in voltage occurs. The energy lost is defined by: E=1/2C 1 (V12-V22) During the pump and transfer cycles V1 and V 2 are the voltages on C1. If the impedances of C1 and C2 are high at the pump frequency (see Figure 3), compared to the value of R L, there will be a substantial difference in voltages V1 and V2. The most optimum selection would be to make C2 as large as possible to eliminate output voltage ripple, and to utilize a large value for C1 to achieve maximum efficiency of operation. OPERATIONAL RULES: Never exceed maximum supply voltages. Never connect LV terminal to GND for supply voltages over 3.5V. Never short circuit the output to V+ supply voltages above 5.5V for extended periods; however, transient conditions including start-up are acceptable. For polarized capacitors, the + terminal of C1 must be connected to pin 2 of the CLM7660 and the + terminal to of C2 must be connected to GND. For high-voltage, elevated temperature applications add a diode DX (reference Figure 1). The 1N914 diode is an appropriate choice. CALOGIC CORPORATION, 237 Whitney Place, Fremont, California 94539, Telephone: 510-656-2900, FAX: 510-651-3025

FIGURE 14. CLM7660 SUPPLIES -5V FOR CONVERTERS IN MICROPROCESSOR-CONTROLLED

OUTPUT CURRENT (mA) –10V 1K-13 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE 20 30 40 50 60 70 –9V –8V –7V –6V –5V –4V –3V –2V –1V 10V OSCILLATOR FREQUENCY (kHz) 1K-14 15 1 0 100µA 200µA 300µA 100% 90% 7.4 @ 5V POWER CONSUMPTION vs OSCILLATOR FREQUENCY (NO LOAD) @ 5V EFFICIENCY vs OSCILLATOR FREQUENCY (5mA) 12.6 INPUT VOLTAGE 1K-15 OUTPUT RESISTANCE vs SUPPLY VOLTAGE OUTPUT RESISTANCE 10V5V0 200Ω 100Ω CALOGIC CORPORATION , 237 Whitney Place, Fremont, California 94539, Telephone: 510-656-2900, FAX: 510-651-3025