CLF7045NIT-2R2-D

R1278S NISSHINBO | Alldatasheet

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30 V , 2 A Synchronous PWM Step-down DC/DC Converter

No. EA-530-201208 The R1278S is a 36 V maximun rated synchronous step-down DC/DC converter with built-in drivers. With the operating frequency at 2 MHz and a spread-spectrum clock generator, the interference effect on the AM band is small. When an input voltage drops, the switching frequency is automatically reduced to keep output voltage level constant.

Provides a high switching frequency at 2 MHz with the efficiency of 87%.
Maintains the output voltage constant when an input voltage drops by reducing a switching frequency to the minimum of 1/4.
Achieves the EMI noise reduction by using a spread spectrum clock generator. (Diffusion Rate: +10%).  Input Voltage Range (Maximum Ratings):

3.6 V to 30 V (36 V)

 Operating Temperature Range: −40°C to 105°C  Start-up Voltage: 4.5 V  Standby Current: Typ. 4 µA  Output Voltage Range: 3.3 V to 5.0 V  Feedback Voltage: 0.64 V ±1.0%  Adjustable Oscillator Frequency Using External Resistors: 2 MHz  External Synchronous Clock Frequency: 1.8 MHz to 2.2 MHz  Spread Spectrum Clock Generator (SSCG): Diffusion Rate: Typ. +10%  Minimum ON-Time: Typ. 70 ns  Minimum OFF-Time: Typ. 120 ns  Duty-over: Set Frequency (external input frequency) x 1 to 1/4  Soft-start: (Tracking available with an external voltage application)  Thermal Shutdown: Tj = 160°C  Undervoltage Lockout (UVLO): VCC = 3.3 V (Typ.)  Overvoltage Lockout (OVLO): VIN = 35 V (Typ.)  Overvoltage Detection (OVD): FB Pin Voltage (VFB) +10%  LX Current Limiting: Typ. 3 A  High-side Driver ON Resistance:Typ. 0.145 Ω  Low-side Driver ON Resistance: Typ. 0.095 Ω Efficiency (VOUT = 5 V) Choose the optional functions from below. Product Name SSCG R1278S003A Disable R1278S003C Enable

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APPLICATIONS

5.2 x 6.2 x 1.45 (mm) 100 0 500 1000 1500 2000 Efficiency [% ] Iout [mA] VIN=12V PACKAGE OPTIONAL FUNCTIONS

No. EA-530-201208 SELECTION GUIDE Selection Guide Product Name Package Quantity per Reel Pb Free Halogen Free R1278S003-E2-FE HSOP-18 1,000 pcs Yes Yes ：Select the optional functions.  Overcurrent Protection SSCG A Hiccup-type Disable C Hiccup-type Enable

No. EA-530-201208 BLOCK DIAGRAM INT Regulator S PGOOD BST LX Q R VCO Hiccup Slope Peak Current Limit FB RT CSS/TRK Soft Start Circuit Reference PFCMODE Under Voltage Detection UVD Thermal Shutdown CE 1.2V SHDN OVD UVD VOUT SHDN Mode Select Filter Mode Mode ILIM Drive Circuit VCC Regulator VCC Int_Reg VIN OVD VCC Set_Pulse Set_Pulse Reverse Detection GND Rev SHDN OVD VIN VOUT COMP Over Voltage Detection OVD OFF_PulseSoft_Start OFF_Pulse Int_Reg Soft_Start 2uA Freq Detection Freq_NG (BADFREQ) UVLO VCC Hiccup SHDN OVD SHDN UVDHiccup Soft_Start CLK SSCG_EN Freq_NG (BADFREQ) R1278S Block Diagram

No. EA-530-201208 PIN DESCRIPTIONS Top View Bottom View R1278S (HSOP-18) Pin Configuration  The tab on the bottom of the package is substrate level (GND). The tab must be connected to the ground plane on the board. R1278S Pin Descriptions Pin No. Pin Name Description 1, 2 VIN(1) Power Supply Pin

3 NC(2) No Connection

4 CE Chip Enable Pin, Active-high

5 CSS/TRK Soft-start Adjustment Pin

6 COMP Capacitor Connecting Pin for Error Amplifier’s Phase

7 FB Feedback Input Pin for Error Amplifier

8 PGOOD Power Good Output Pin

9 VOUT Output Voltage Feedback Input Pin

10 MODE(3) Mode Setting Input Pin

11 RT Oscillator Frequency Adjustment Pin

12 VCC VCC Output Pin

13 BST Bootstrap Pin

14, 15, 16 GND(1) GND Pin

17 NC(2) No Connection

18 LX Switching Pin

(1) The pins with the same name should be connected together when mounted on a board. (2) NC pin should be set to "Open”. (3) MODE pin should be used with High or with external clock input.

No. EA-530-201208 Equivalent Circuits for the Individual Terminals CE VIN Int_Reg CSS/TRK VIN Int_Reg Equivalent Circuit for CE Pin Equivalent Circuit for CSS/TRK Pin COMP FB Int_Reg VCC Equivalent Circuit for COMP Pin Equivalent Circuit for FB Pin PGOOD VOUT VIN Equivalent Circuit for PGOOD Pin Equivalent Circuit for VOUT Pin

No. EA-530-201208 MODE VCC RT Int_Reg Equivalent Circuit for MODE Pin Equivalent Circuit for RT Pin VCC VIN BST VCC LX Equivalent Circuit for VCC Pin Equivalent Circuit for BST Pin LX VIN Equivalent Circuit for LX Pin

No. EA-530-201208 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings Symbol Parameter Rating Unit VIN VIN Pin Input Voltage −0.3 to 36 V VCE CE Pin Voltage −0.3 to VIN +0.3 ≤ 36 V VCSS/TRK CSS/TRK Pin Voltage −0.3 to 3 V VOUT VOUT Pin Voltage −0.3 to 16 V VRT RT Pin Voltage −0.3 to 3 V VCOMP COMP Pin Voltage (1) −0.3 to 6 V VFB FB Pin Voltage −0.3 to 3 V VCC VCC Pin Voltage −0.3 to 6 V VCC Pin Output Current Internally Limited mA VBST BST Pin Voltage LX−0.3 to LX+6 V VLX LX Pin Voltage −0.3 to VIN +0.3 ≤ 36 V VMODE MODE Pin Voltage −0.3 to 6 V VPGOOD PGOOD Pin Voltage −0.3 to 6 V PD Power Dissipation Refer to Appendix “Power Dissipation” Tj Junction Temperature Range −40 to 125 °C Tstg Storage Temperature Range −55 to 125 °C ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause permanent damage and may degrade the lifetime and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings is not assured. RECOMMENDED OPERATING CONDITIONS Recommended Operating Conditions Symbol Parameter Rating Unit VIN Operating Input Voltage 3.6 to 30 V Ta Operating Temperature Range −40 to 105 °C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. (1) It should not exceed VCC + 0.3 V.

No. EA-530-201208

ELECTRICAL CHARACTERISTICS

VIN = 12 V, VCE = VIN, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at −40°C ≤ Ta ≤ 105°C. Symbol Parameter Conditions Min. Typ. Max. Unit VSTART Start-up Voltage 4.5 V VCC VCC Pin Voltage (VCC-GND) VFB = 0.672 V, VMODE = 5 V 4.75 5 5.25 V ISTANDBY Standby Current VIN = 30 V, VCE = 0 V 4 30 µA IVIN1 VIN Consumption Current 1 at PWM switching stop VFB = 0.672 V, VMODE = 5 V, VOUT = VLX = 5 V 1.0 1.35 mA VUVLO1 Undervoltage Lockout (UVLO) Threshold VCC Falling 3.1 3.3 3.4 V VUVLO2 VCC Rising 4.1 4.3 4.5 VOVLO1 Overvoltage Lockout (OVLO) Threshold VIN Rising 33.6 35 36 V VOVLO2 VIN Falling 32 34 VFB FB Voltage Accuracy Ta = 25°C 0.6336 0.64 0.6464 V −40°C ≤ Ta ≤ 105°C 0.6272 0.6528 fOSC0 Oscillator Frequency 0 RRT = 14 kΩ 1800 2000 2200 kHz fSYNC Synchronizing Frequency 1800 2200 kHz tSS1 Soft-start Time 1 CSS = OPEN 0.36 0.75 ms tSS2 Soft-start Time 2 CSS = 4.7 nF 1.4 2 ms ITSS CSS/TRK Pin Charging Current VCSS/TRK = 0 V 1.8 2 2.2 µA VSSEND CSS/TRK Pin Voltage at Soft-start stop VFB VFB +0.03 VFB+0.06 V RDIS_CSS/TRK CSS/TRK Pin Discharge Resistance VIN = 4.5 V, VCE = 0 V, VCSS/TRK = 3 V 1.8 3 5 kΩ ILXLIMIT LX Current Limiting High-side Transistor, DC Current 2.55 3.0 3.45 A IREVLIMIT Reverse Current Limiting Low-side Transistor, DC Current 1.35 2.0 A VCEH CE “High” Input Voltage 1.25 V VCEL CE “Low” Input Voltage 1.1 V ICEH CE “High” Input Current VIN = VCE = 30 V 1.2 2.45 µA ICEL CE “Low” Input Current CE “Low” −0.1 0 0.1 µA IFBH FB “High” Input Current VFB = 0.672 V −0.1 0 0.1 µA IFBL FB “Low” Input Current VFB = 0 V −0.1 0 0.1 µA All test items listed in Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C).

No. EA-530-201208 VIN = 12 V, VCE = VIN, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at −40°C ≤ Ta ≤ 105°C. Symbol Parameter Conditions Min. Typ. Max. Unit VMODEH MODE “High” Input Voltage 1.40 V IMODEH MODE “High” Input Current VMODE = 5 V 6.25 14.0 µA VPGOODOFF PGOOD “Low” Output Voltage VIN = 3.6 V, IPGOOD = 1 mA 0.25 V IPGOODOFF PGOOD Pin Leakage Current VIN = 30 V, VPGOOD = 6 V 100 nA VFBOVD1 FB Pin Overvoltage Detection (OVD) Threshold VFB Rising VFB x1.060 VFB x1.10 VFB x1.140 V VFBOVD2 VFB Falling VFB x1.024 VFB x 1.07 VFB x1.111 V VFBUVD1 FB Pin Undervoltage Detection (UVD) Threshold VFB Falling VFB x0.860 VFB x 0.90 VFB x0.946 V VFBUVD2 VFB Rising VFB x0.895 VFB x 0.93 VFB x0.974 V All test items listed in Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C).

No. EA-530-201208 TYPICAL APPLICATION CIRCUIT MODE CSS/TRK GND LX RTOP RBOT RCCC RPG CBST CVCC L COUT CIN2CIN1 VOUT CE PGOOD COMP VOUT FB CSS CC2 NC VIN VCC BST R1278Sxxxx VIN GND RT GND NC RRTCSPD RCE CE Control R1278S Typical Application Circuit Recommended Values VOUT CIN [μF] L [μH] COUT [μF] CBST [μF] CVCC [μF] CSPD(1) [pF] RTOP [kΩ] RBOT [kΩ] RRT [kΩ] RC [kΩ] CC [nF] CC2 [pF]

3.3 V 21

(10×2+1) 2.2 48.7 (150+12) 39 14 8.2 4.7 -

5.0 V 21

(10×2+1) 2.2 48.7 (220+47) 39 14 12 4.7 - It is recommended to set 1 kΩ or higher for RCE, and between 10 kΩ and 100 kΩ for RPG. Recommended Parts Symbol Capacitance Tolerance Voltage resistance Temperature characteristics CIN1, 2 1.0 µF ±10% 50 V X7R 10 µF ±10% 50 V X7S COUT 4.7 µF ±10% 25 V X7R 22 µF ±20% 16 V X7R CBST 0.1 µF ±10% 25 V X7R CVCC 1.0 µF ±10% 16 V X7R Symbol Inductance Tolerance Rated current L 2.2 µH ±30% 5.5 A (1) When changing RBOT from the recommended value, change CSPD accordingly so that RBOT x CSPD does not change from the recommended constant. Then the frequency characteristics become the same as the recommended value. For example, in case RBOT is multiplied by 1/10, CSPD is multiplied by 10 so that the frequency characteristic of the feedback resistor does not change.

No. EA-530-201208 Precautions for Selecting External Components Inductor Choose an inductor with small DC resistance, sufficient allowable current and hardly causing magnetic saturation. DC resistance affects efficiency. If the inductance value is extremely small, the peak current of LX may increase along with the load current. As a result, the current limit circuit may start to operate before reaching the intended load current. Capacitor

Choose a capacitor with DC bias characteristics and temperature characteristics equal or better than the measurement component of typical characteristics described in the datasheet, and with a sufficient margin to the drive voltage ratings.
Ceramic capacitors are recommended for the input capacitor (C IN) and the output capacitor (COUT). The combined use of a ceramic capacitor and an electrolyte capacitor is recommended. Especially, choose the electrolyte capacitor with the lowest possible ESR with consideration of the allowable ripple current rating (IRMS). IRMS can be calculated by the following equation. IRMS ≒ I OUT/ VIN x √{ VOUT x (VIN – VOUT) } The electrolyte capacitor has a characteristic of increasing ESR when it is at a low temperature, so careful consideration is required on the phase characteristics in case of using an electrolyte capacitor for C OUT.

No. EA-530-201208 THEORY OF OPERATION MODE Pin Function The R1278S switches the operation mode to either a forced PWM mode or a PLL PWM mode by applying a voltage or a pulse to the MODE pin. By applying 1.4 V or more to the MODE pin, the operation mode goes into the forced PWM mode and operates at forced PWM regardless of a load current. See Forced PWM Mode for more details. See Frequency Synchronization for the operation when an external clock is connected. Frequency Synchronization The R1278S can switch at the frequency synchronized with the external clock frequency input to the MODE pin by using PLL (Phase Lock Loop). The synchronizable frequency range is between 1.8 MHz to 2.2 MHz. During the synchronization, the operation mode is a forced PWM. The recommended pulse width of the external clock is 100 ns or more. When starting up the device while the external clock is sent to the MODE pin, the device synchronizes to the external clock while starting up with soft-start. Be aware that if the voltage difference between input and output is reduced and the device goes into the maxduty or duty-over condition, the device starts operating at 1/4 of the synchronous frequency and goes into the asynchronous condition with the MODE pin. Duty-over When the input voltage is dropped, the R1278S linearly changes the operating frequency to 1/4 of the set oscillator frequency in order to maintain the output voltage. This can make the on duty more than the normal maxduty and it can also reduce the voltage difference between input and output. The duty-over starts operating when it detects the minimum off-time in the set oscillator frequency and the external synchronous oscillator frequency. UVLO (Undervoltage Lockout) If the VCC pin voltage drops below the UVLO detection threshold of 3.3 V (Typ.) due to the input voltage drop, the R1278S turns the switching off to prevent the malfunction of the device. Due to the switching stop, the output voltage drops according to the load and C OUT. If the VCC pin voltage rises above the UVLO threshold of 4.3 V (Typ.), the device restarts the operation with soft-start. For the R1278S, 4.5 V, the maximum UVLO release voltage, is a start-up voltage. OVLO (Overvoltage Lockout) If the input voltage rises above the OVLO detection threshold of 35 V (Typ.), the R1278S turns the switching off to prevent malfunctions of the device or damage on the transistor due to overvoltage. Due to the switching stop, the output voltage drops according to the load and C OUT. If the input voltage drops below the OVLO release threshold of 34 V (Typ.), the device restarts the operation with soft-start. Note that this function does not guarantee the operation exceeding the absolute maximum ratings.

No. EA-530-201208 PGOOD (Power Good) Function The power good function with using a NMOS open drain output pin can detect the following states of the R1278S. The NMOS turns on and the PGOOD pin becomes “Low” when detecting them. After the device returns to its original state, the NMOS turns off and the PGOOD pin outputs “High” (PGOOD Input Voltage: VUP). ・CE = “Low” (Shut down) ・UVLO ・OVLO ・Thermal Shutdown ・Soft-start ・UVD ・OVD ・Hiccup-type Protection The PGOOD pin is designed to become 0.25 V or less in “Low” level when the current floating to the PGOOD pin is 1 mA. The use of the PGOOD input voltage (VUP) of 5.5 V or less and the pull-up resistor (RPG) of 10 kΩ to 100 kΩ are recommended. If not using the PGOOD pin, connect it to “Open” or “GND”. PGOOD “High” is detected under abnormal condition. VUP VPGOOD RPG Power Good Circuit

No. EA-530-201208 CE FB 0.64V PGOOD 120us (Typ.) time time time Rising / Falling Sequence of Power Good Circuit

No. EA-530-201208 Under Voltage Detection (UVD) The UVD function indirectly monitors the output voltage with using the FB pin. The PGOOD pin outputs “Low” when the UVD detector threshold is 90% (Typ.) of V FB and V FB is less than the UVD detector threshold for more than 15 µs (Typ.). When VFB is over 93% (Typ.) of 0.64 V, the PGOOD pin outputs “High” after delay time (Typ.120 µs). And, the hiccup-type overcurrent protection works when detecting a current limiting during the UVD detection. Overvoltage Detection (OVD) The OVD function indirectly monitors the output voltage with using the FB pin. Switching stops even if the internal circuit is active state, when detecting the overvoltage of VFB. The PGOOD pin outputs “Low” when the OVD detector threshold is 110% (Typ.) of VFB and VFB is over the OVD detector threshold for more than 15 µs (Typ.). When VFB is under 107% (Typ.) of 0.64 V, which is the OVD released voltage, the PGOOD pin outputs “High” after delay time (Typ.120 µs). Then, switching is controlled by normal operation. Hiccup-type Overcurrent Protection The hiccup-type overcurrent protection can work under the operating conditions that is the UVD can function during the current limiting. The hiccup type protection stops switching releases the circuit after the protection delay time (Typ. 7.5 ms). Since this protection is auto-release, the CE pin switching of “Low”/“High” is unnecessary. When the output is shorted to GND, switching of “ON” / “OFF” is repeated until the shorting is released. Minimum ON-Time The minimum on-time means the minimum time duration that the R1278S can turn the high-side transistor on during the oscillation period. The minimum on-time of the device (Typ. 70 ns) is determined by the internal circuit. The device cannot generate a pulse width that is less than the pulse width of minimum on-time. Therefore, when setting the output voltage and the oscillator frequency, be careful that the minimum step-down ratio [VOUT / VIN x (1 / fOSC)] is not less than the minimum on-time. If they are set to less than the minimum step- down ratio, the pulse skipping occurs, which outputs the V OUT but increases the output ripples of current and voltage. Minimum OFF-Time The minimum OFF-time means the minimum time duration that the R1278S can turn the high-side transistor off during the oscillation period. By the adoption of bootstrap method, the high-side transistor, which is used as the R1278S internal circuit for the minimum off-time, is used a NMOS. The voltage sufficient to drive the high-side transistor must be charged. Therefore, the minimum off-time is determined from the required time to charge the voltage. By the adoption of the frequency’s reduction method by one-quarter of a set value (Min.), if the input-output difference voltage becomes small or load transients are caused, the OFF period can be caused once in four-cycle period of normal cycle. As a result, the minimum off-time becomes 120 ns (Typ.) and the maximum duty cycle can be improved substantially.

No. EA-530-201208 Current Limit The output current of the R1278S is limited by the current limit using a peak current method. The current limit is set to 3.0 A (Typ. DC value) and it is fixed inside the IC. The current limit circuit limits the current by monitoring the drain and source voltage of a high-side transistor. The transitional current limit of the inductor current is set to be higher than the DC value. The current limit of the device starts operating after the minimum on-time, so it has to be careful especially when the device is used close to the minimum on-time because the current limit will increase. The following diagram shows the relation between current limit and on-time using our evaluation board. The longer the on-time is, the more the current approaches the current limit value of 3.0 A (Typ. DC value). R1278S Current Limit vs LX ON Time 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 70 80 90 100 110 120 130 140 ILIM (A) ON Time(ns)

No. EA-530-201208 Precautions for Operating in Low Input Voltage When using the R1278S with VIN = 5 V or less, the load current may be limited in following two cases. First Case: The device designed to reach current limit by monitoring the voltage difference between VIN and LX. During the low input voltage operation, the driving capability of high-side transistor decreases, so the voltage difference between VIN and LX becomes larger with smaller output current. Therefore, the load current may be limited during the low input voltage operation. Second Case: During the low input voltage operation, the duty-over function decreases the oscillator frequency. While the oscillator frequency is 1/4 of the set frequency, drawing the load current can cause a voltage difference between the input and output. These make the device to exit from duty-over condition, and as a result, the output voltage drops. Both cases show that the current limit is depending on the input voltage and load current. Careful consideration is required when applying a heavy load while the input voltage is low. The following graph shows the relation between input voltage and load current. If the BST voltage between BST and LX drops extremely, the device forcibly turns off the switching to charge the BST voltage. This may occur when V IN is 4.5 V or less and it may affect the output voltage ripple. Also, if VIN is less than 4.5 V and UVD is detected as the output voltage decreases, the hiccup-type overcurrent protection may work due to the protection function inside the IC. VOUT = 3.3 V Setting R1278S Output Current vs Input Voltage 1.4 1.6 1.8 2.0 2.2 2.4 2.6 IOUT (A) VIN (V) Ta=25℃ Ta=105℃ Ta=125℃

No. EA-530-201208 Output Voltage Setting The output voltage (V OUT) can be set by adjustable values of R TOP and R BOT. The value of V OUT can be calculated by Equation 1: For example, when setting VOUT = 3.3 V and setting RBOT = 39 kΩ, RTOP can be calculated by substituting them to Equation 1. As a result of the expanding Equation 2, RTOP can be set to 162 kΩ. To make 162 kΩ with using the E24 type resistors, the connecting use of 160 kΩ and 2 kΩ resistors in series is required. If the tolerance level of the set output voltage is wide, using a resistor of 160 kΩ to RTOP can reduce the number of components. RBOT is recommended to be 39kΩ or less. RTOP = (3.3 V / 0.64 V - 1) × 39 kΩ R1278S is designed assuming RTOP and RBOT resistance variation of ± 1%. Oscillator Frequency Setting Connecting a 14-kΩ (Typ.) oscillation frequency setting resistor (RRT) between the RT pin and GND can control the oscillation frequency to 2 MHz. The following equation can calculate the variation in resistance of oscillator frequencies. To reduce the variation of oscillator frequencies, it is recommended that a ±1% or less R RT be used. For the SSCG type (R1278S003C), an up-spreading modulation is used (Typ. +10%). RRT [kΩ] = 37773 × fOSC [kHz] ^ (-1.04) R1278S Oscillator Frequency vs Oscillator Frequency Setting Resistance 1600 1700 1800 1900 2000 2100 2200 2300 2400 fOSC (kHz) RRT (kΩ)

No. EA-530-201208 Soft-start Adjustment The soft-start time is a time between a rising edge (“High” level) of the CE pin and the timing when the output voltage reaches the set output voltage. Connecting a capacitor (C SS) to the CSS/TRK pin can adjust the soft- start time (tSS) – provided the internal soft-start time of 500 µs (Typ.) as a lower limit. The adjustable soft-start time (tSS2) is 1.6 ms (Typ.) when connecting an external capacitor of 4.7 nF with the charging current of 2.0 μA (Typ.) and 0.64 V (Typ.). If not required to adjust the soft-start time, set the CSS/TRK pin to “Open” to enable the internal soft-start time (tSS1) of 500 µs (Typ.). When a large-capacitance output capacitor is connected, the overcurrent protection may work due to an inflow of large current at startup. Thus, set a longer soft start time to reduce the amount of current and prevent from operating the protections due to the rapid startup. Each of soft-start time (tss1/ tss2) is guaranteed under the conditions described in the chapter of “ Electrical Characteristics”. Soft-start Time Adjustment Capacitor vs Soft-start Time CE VOUT VSET tSS tVO_S PGOOD 120us (Typ.) 1.25V time time time Soft-start Sequence CSS [nF] = (tSS – tVO_S) / 0.64 × 2.0 tSS: Soft-start time (ms) tVO_S: Time period from CE = “High” to VOUT’s rising (Typ. 0.160 ms)

No. EA-530-201208 Tracking Function Applying an external tracking voltage to the CSS / TRK pin can control the soft-start sequence – provided that the lowest internal soft-start time is limited to 500 µs (Typ.). Since V FB becomes nearly equal to V CSS/TRK at tracking, the complex start timing and soft-start can be easily designed. The available voltage at tracking is between 0 V and 0.64 V. If the tracking voltage is over 0.64 V, the internal reference voltage of 0.64 V is enabled. Also, an arbitrary falling waveform can be generated by reducing V CSS/TRK to 0.64 V (Typ.) or less, because the R1278S supports both of up- and down- tracking. CSS/TRK VOUT 0.64V SS Normal Operation SS Tracking Sequence Reverse Current Limit The reverse current limit start operating when the reverse current flowing through the low-side transistor exceeds the set reverse current threshold. It turns off the low-side transistor to control the reverse current. The reverse current limit is 1.35 A (Typ.). This function operates when the output voltage is pulled up more than the set output voltage due to short-circuiting. SSCG (Spread Spectrum Clock Generator) The SSCG function works for EMI reduction at the PWM mode. This function is enabled in the R1278S003C. This function makes EMI waveforms decrease in amplitude to generate a triangular waveform within approximately +10.0% (Typ.) of the oscillator frequency (f OSC). The modulation cycle is f OSC / 128. SSCG is enabled only when MODE = High. SSCG is not effective when a clock is externally applied. The oscillator frequencies are not modulated during the soft-start.

No. EA-530-201208 Bad Frequency Protection (BADFREQ) If a current equivalent to 4 MHz (Typ.) and more, or 125 kHz (Typ.) or less is applied to the RT pin when the oscillator frequency setting resistor (R RT) of the RT pin is in open / short, the R1278S will stop switching to protect the IC and will cause the internal state to transition to its state before the soft-start. The R1278S will restart under the normal control from the state of soft-start when recover after the abnormal condition. BADFREQ Detection/ Release Sequence Thermal Shutdown Function When the junction temperature exceeds the thermal shutdown detection threshold (Typ. 160°C), R1278S cuts off the output from DC/DC and suppresses the self-heating. When the junction temperature falls below the thermal shutdown release threshold (Typ. 140°C), the IC will restart with the soft start operation.

No. EA-530-201208 Operation of Step-down DC/DC Converter The basic operation of the step-down DC/DC converter is shown in the following figures. This step-down DC/DC converter charges energy in the inductor while the high-side transistor turns on, and discharges the energy from the inductor when the high-side transistor turns off. This inductor reduces the energy loss to provide the lower output voltage (VOUT) than the input voltage (VIN). VIN High Side Tr. Low Side Tr. VOUT COUT L IOUT Basic Circuit Current Through Inductor Step1. When the high-side transistor turns on, current IL (= i1) flows through the L to charge COUT and provide IOUT. At this moment, I L = i1 increases from I LMIN to reach I LMAX in proportion to the on-time period (tONHS) of the high-side transistor. Step2. When the high-side transistor turns off, the low-side transistor turns on in order to maintain I L at ILMAX, and current IL (= i2) flows. Step3. The low-side transistor turns on until going to the next cycle. Therefore, even if I L = 0, ILMIN < 0 may occur by keeping the low-side transistor “On”. In the PWM mode, the output voltage is maintained constant by controlling t ONHS with the constant switching frequency (fOSC). ILMAX ILMIN tONHS tOFFHS T=1/fOSC IL IOUT t ΔIL i1 i2

No. EA-530-201208 Calculation of Inductor Current The peak inductor current ILMAX can be estimated by the following equation. ILMAX = IOUT + 1 / 2 × (V IN – VOUT) / L × V OUT / VIN / fOSC Example: ILMAX = 1A + 1/2 × (12V – 5V) / 2.2µH × 5V / 12V / 2MHz = 1.331 A The above can be calculated from the equation with the inductor current in continuous mode of a general step-down DC/DC converter. The P-P value of the inductor ripple current is “ΔIL”. The ΔIL is calculated by Equation 1 when the high side transistor is ON. The ΔIL is calculated by Equation 2 when the high side transistor is OFF. Using Equation 2 to Equation 1, the ON duty of the high side transistor t ONHS / (tONHS + tOFFHS) = DON is solved by Equation 3. And then, the ripple current ΔIL is calculated by substituting tONHS = Don / fOSC into Equation 1. At this time, ILMAX flowing in the inductor and high side transistor is calculated by Equation 5. Therefor ILMIN is calculated by Equation 6. Note that the input-output conditions and peripheral components should be determined in consideration of ILMAX and ILMIN. The above calculations are based on the ideal operation in continuous mode.

No. EA-530-201208 Forced PWM Mode The R1278S goes into the forced PWM mode by setting the MODE pin “High” or applying the external clock to the MODE pin. The forced PWM mode operates at fixed switching frequency even during the light load in order to reduce noise. Therefore, when the output current (IOUT) is less than ∆IL / 2, ILMIN becomes less than "0”. That is, the electric charge, which is charged to C OUT, is discharged via transistor for the durations – when IL reaches “0” from ILMIN during the tONHS periods and when IL reaches ILMIN from “0” during tOFFHS periods. But, pulses are skipped to prevent the overvoltage when high-side transistor is set to ON under the condition that the output voltage being more than the set output voltage. ILMAX ILMIN tONHS tOFFHS T=1/fOSC IL IOUT t ΔIL i1 i2 Forced PWM Mode

No. EA-530-201208 TECHNICAL NOTES The performance of a power source circuit using this device is highly dependent on a peripheral circuit. A peripheral component or the device mounted on PCB should not exceed a rated voltage, a rated current or a rated power. When designing a peripheral circuit, please be fully aware of the following points.

External components must be connected as close as possible to the ICs and make wiring as short as possible. Especially, the capacitor connected in between VIN pin and GND pin must be wiring the shortest. If their impedance is high, internal voltage of the IC may shift by the switching current, and the operating may be unstable. Make the power supply and GND lines sufficient.
Place a capacitor (C BST) as close as possible to the LX pin and the BST pin. If controlling slew rate for EMI, a resistor (RBST) should be in series between the BST pin and the capacitor (CBST).
The tab on the bottom of the HSOP-18 package must be connected to GND when mounted on the board. To improve thermal dissipation on the multilayer board, set via to release the heat to the other layer in the connecting part of the tab on the bottom.
The NC pin must be set to “Open”.
The MODE pin requires the high voltages with the high stability when the forced PWM mode (MODE = “High”) is enabled. If the voltage with the high stability cannot be applied, connection to the VCC pin as “High” level is recommended. Avoid the use of the MODE pin being “GND” or “Open”.
If V OUT is a minus potential, the setup cannot occur.
Shorten the wiring between the Lx pin and the inductor so that the parasitic capacitance is not provided.
It is recommended to place the input capacitor (C IN) on the same side as the IC. If it is placed on the different side as the IC by using via, the noise may be increased due to the parasitic inductance component of via.
Feedback the output voltage near the C OUT.
Place R TOP, RBOT, and CSPD near FB pin and mount them at a position apart from the inductor, Lx pin, and BST pin to prevent the effect of noise.
The thermal shutdown function prevents the IC from fuming and ignition but does not ensure the IC’s reliability or keep the IC below the absolute maximum ratings. The thermal shutdown function does not operate on the heat generated by other than the normal IC operation such as latch-up and overvoltage application.
The thermal shutdown function operates in a state over the absolute maximum ratings, therefore the thermal shutdown function should not be used for a system design.

No. EA-530-201208

APPLICATION INFORMATION

Layer 1 (Top) Layer 2 Layer 3 Layer 4 (Bottom)

No. EA-530-201208 TYPICAL CHARACTERISTICS Note: Typical Characteristics are intended to be used as reference data; they are not guaranteed. 1) FB Voltage 2) Oscillator Frequency 0

2 MHz (RRT = 14 kΩ)

3) Soft-start Time Internally Fixed Soft-start Time Externally Adjustable Soft-start Time (CSS = Open) (CSS = 4.7 nF) 4) LX Limit Current 5) VIN Consumption Current 1 VIN = 12 V, MODE = High

No. EA-530-201208 6) UVLO 7) CE Input Voltage 8) Efficiency VOUT = 3.3 V, fOSC = 2 MHz, Ta = 25°C VOUT = 5.0 V, fOSC = 2 MHz, Ta = 25°C 9) Load Transient Response VIN = 12 V, VOUT = 3.3 V, fOSC = 2 MHz, MODE = High, Ta = 25°C

No. EA-530-201208 10) Load Regulation VOUT = 3.3 V, fOSC = 2 MHz, Ta = 25°C VOUT = 5.0 V, fOSC = 2 MHz, Ta = 25°C 11) Input Voltage Transient Response 12) Line Regulation VIN = 8 V -> 16 V, tr = tf = 100 μs VOUT = 3.3 V, fOSC = 2 MHz, IOUT = 1 A, Ta = 25°C VOUT = 3.3 V, fOSC = 2 MHz IOUT = 1 A, Ta = 25°C 13) Transient Voltage Surge VOUT = 3.3 V, fOSC = 2 MHz IOUT = 100 mA, Ta = 25°C

No. EA-530-201208 Test Circuit Test Circuit for Typical Characteristics Measurement Components for Typical Characteristics Symbol Capacitance Tolerance Voltage resistance Temperature characteristics Parts number CIN1 1.0 µF ±10% 50 V X7R CGA4J3X7R1H105K (TDK) CIN2 10 µF ±10% 50 V X7S CGA6P3X7S1H106K (TDK) COUT 4.7 µF ±10% 25 V X7R CGA5L1X7R1E475K (TDK) 22 µF ±20% 16 V X7R CGA6P1X7R1C226M (TDK) CBST 0.1 µF ±10% 25 V X7R CGA3E2X7R1E104K (TDK) CVCC 1.0 µF ±10% 16 V X7R CGA3E1X7R1C105K (TDK) Symbol Inductance Tolerance Rated current Parts number L 2.2 µH ±30% 5.5 A CLF7045NIT-2R2-D (TDK) MODE CSS/TRK GND LX RTOP RBOT RCCC RPG CBST CVCC L COUT CIN2CIN1 VOUT CE PGOOD COMP VOUT FB CSS CC2 NC VIN VCC BST R1278Sxxxx VIN GND RT GND NC RRTCSPD RCE CE Control

PD-HSOP-18-(105125)-JE-C i The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD. 51-7. Measurement Conditions Item Measurement Conditions Environment Mounting on Board (Wind Velocity = 0 m/s) Board Material Glass Cloth Epoxy Plastic (Four-Layer Board) Board Dimensions 76.2 mm × 114.3 mm × 0.8 mm Copper Ratio Outer Layer (First Layer): Less than 95% of 50 mm Square Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square Through-holes  0.3 mm × 21 pcs Measurement Result (Ta = 25°C, Tjmax = 125°C) Item Measurement Result Power Dissipation 3100 mW Thermal Resistance (ja) ja = 32°C/W Thermal Characterization Parameter (ψjt) ψjt = 8°C/W ja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter Power Dissipation vs. Ambient Temperature Measurement Board Pattern 500 1000 1500 2000 2500 3000 3500 0 25 50 75 100 125 Power Dissipation PD (mW) Ambient Temperature (°C) 105 3100

PACKAGE DIMENSIONS HSOP-18 i DM-HSOP-18-JE-B

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Summary

30 V, 2 A Synchronous PWM Step-down DC/DC Converter

Description